| /drivers/acpi/acpica/ |
| H A D | utbuffer.c | 61 * base_offset - Beginning buffer offset (display only)
68 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset) argument
90 acpi_os_printf("%6.4X: ", (base_offset + i));
216 * base_offset - Beginning buffer offset (display only)
226 u8 *buffer, u32 count, u32 display, u32 base_offset)
249 acpi_ut_file_printf(file, "%6.4X: ", (base_offset + i));
225 acpi_ut_dump_buffer_to_file(ACPI_FILE file, u8 *buffer, u32 count, u32 display, u32 base_offset) argument
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| H A D | acutils.h | 362 u32 count, u32 display, u32 base_offset);
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| /drivers/xen/xen-pciback/ |
| H A D | conf_space.h | 63 unsigned int base_offset; member in struct:config_field_entry
67 #define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset)
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| H A D | conf_space.c | 364 unsigned int base_offset)
379 cfg_entry->base_offset = base_offset;
362 xen_pcibk_config_add_field_offset(struct pci_dev *dev, const struct config_field *field, unsigned int base_offset) argument
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| H A D | pci_stub.c | 1297 cfg_entry->base_offset +
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| /drivers/scsi/aic7xxx/ |
| H A D | aic79xx_osm_pci.c | 279 u_long base_offset; local
290 base_offset = start - base_page;
296 *maddr = ioremap_nocache(base_page, base_offset + 512);
301 *maddr += base_offset;
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| /drivers/thunderbolt/ |
| H A D | tb_regs.h | 72 u32 base_offset:8; /* member in struct:tb_cap_link_controller
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| /drivers/net/ethernet/brocade/bna/ |
| H A D | bnad_ethtool.c | 941 u32 *base_offset)
975 *base_offset = flash_attr->part[i].part_off;
996 u32 flash_part = 0, base_offset = 0; local
1005 eeprom->offset, &base_offset);
1016 eeprom->offset - base_offset,
1036 u32 flash_part = 0, base_offset = 0; local
1047 eeprom->offset, &base_offset);
1058 eeprom->offset - base_offset,
940 bnad_get_flash_partition_by_offset(struct bnad *bnad, u32 offset, u32 *base_offset) argument
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| /drivers/gpu/drm/radeon/ |
| H A D | r600_cs.c | 354 u64 base_offset, base_align; local
379 base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i];
422 if (!IS_ALIGNED(base_offset, base_align)) {
424 base_offset, base_align, array_mode);
523 u64 base_offset, base_align; local
574 base_offset = track->db_bo_mc + track->db_offset;
613 if (!IS_ALIGNED(base_offset, base_align)) {
615 base_offset, base_align, array_mode);
1472 u64 base_offset,
1491 base_offset <<
1469 r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, struct radeon_bo *texture, struct radeon_bo *mipmap, u64 base_offset, u64 mip_offset, u32 tiling_flags) argument
1955 u32 size, offset, base_offset, mip_offset; local
[all...] |
| /drivers/net/ethernet/seeq/ |
| H A D | ether3.h | 173 unsigned long base_offset; member in struct:ether3_data
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| H A D | ether3.c | 779 ec->irqaddr = priv(dev)->base + data->base_offset;
782 priv(dev)->seeq = priv(dev)->base + data->base_offset;
862 .base_offset = 0,
867 .base_offset = 0x800,
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| /drivers/pci/hotplug/ |
| H A D | shpchp.h | 202 volatile u32 base_offset; member in struct:ctrl_reg
219 BASE_OFFSET = offsetof(struct ctrl_reg, base_offset),
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| /drivers/staging/dgap/ |
| H A D | dgap.c | 4366 u32 base_offset; local
4404 base_offset = 0;
4410 while (base_offset <= EXPANSION_ROM_SIZE) {
4424 base_offset + 0x18);
4435 base_offset += image_length;
4437 byte1 = readb(brd->re_map_membase + base_offset);
4438 byte2 = readb(brd->re_map_membase + base_offset + 1);
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