| /drivers/media/pci/cx23885/ |
| H A D | cimax2.c | 213 cx_clear(MC417_RWD, NETUP_ADLO);
216 cx_clear(MC417_RWD, NETUP_ADHI);
224 cx_clear(MC417_RWD,
227 cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
|
| H A D | cx23885-alsa.c | 173 cx_clear(AUD_INT_DMA_CTL, 0x11);
222 cx_clear(AUD_INT_DMA_CTL, 0x11);
225 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
226 cx_clear(AUDIO_INT_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
252 cx_clear(AUD_INT_DMA_CTL, 0x11);
|
| H A D | cx23885-cards.c | 1141 cx_clear(GP0_IO, 2);
1144 cx_clear(GP0_IO, 7);
1208 cx_clear(GP0_IO, bitmask);
1229 cx_clear(GP0_IO, 0x00000005);
1278 cx_clear(GP0_IO, 0x00000005);
1299 cx_clear(GP0_IO, 0x00000005);
1311 cx_clear(GP0_IO, 0x00000005);
1324 cx_clear(GP0_IO, 0x0000000f);
1338 cx_clear(GP0_IO, 0x0000000f);
1356 cx_clear(GP0_I
[all...] |
| H A D | cx23885-core.c | 346 cx_clear(PCI_INT_MSK, mask);
362 cx_clear(PCI_INT_MSK, mask);
664 cx_clear(RDR_TLCTL0, 1 << 4);
1015 cx_clear(RDR_RDRCTL1, 1 << 8);
1020 cx_clear(RDR_RDRCTL1, 1 << 8);
1318 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1425 cx_clear(port->reg_ts_int_msk, port->ts_int_msk_val);
1426 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1591 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1638 cx_clear(por
[all...] |
| H A D | cx23885-dvb.c | 806 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
|
| H A D | cx23885-vbi.c | 249 cx_clear(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */
|
| H A D | cx23885-video.c | 297 cx_clear(VID_A_DMA_CTL, 0x11);
496 cx_clear(VID_A_DMA_CTL, 0x11);
|
| H A D | cx23885.h | 492 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) macro
|
| /drivers/media/pci/cx25821/ |
| H A D | cx25821-alsa.c | 161 cx_clear(AUD_INT_DMA_CTL,
215 cx_clear(AUD_INT_DMA_CTL,
219 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
220 cx_clear(AUD_A_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
264 cx_clear(AUD_INT_DMA_CTL,
|
| H A D | cx25821-video.c | 203 cx_clear(channel->dma_ctl, 0x11);
236 cx_clear(channel->dma_ctl, 0x11);
1017 cx_clear(PCI_INT_MSK, 1);
|
| H A D | cx25821.h | 372 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) macro
|
| /drivers/media/pci/cx88/ |
| H A D | cx88-alsa.c | 144 cx_clear(MO_AUD_DMACNTRL, 0x11);
189 cx_clear(MO_AUD_DMACNTRL, 0x11);
192 cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
193 cx_clear(MO_AUD_INTMSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
240 cx_clear(MO_AUD_DMACNTRL, 0x11);
286 cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
|
| H A D | cx88-blackbird.c | 574 cx_clear(MO_INPUT_FORMAT, 0x100); /* chroma subcarrier lock to normal? */
576 cx_clear(MO_OUTPUT_FORMAT, 0x0008); /* Normal Y-limits to let the mpeg encoder sync */
615 cx_clear(AUD_VOL_CTL, (1 << 6));
1147 cx_clear(MO_GP0_IO, 0x00000080);
|
| H A D | cx88-cards.c | 2979 cx_clear(MO_GP0_IO, 0x00000010);
3036 cx_clear(MO_GP1_IO, 0x10);
3053 cx_clear(MO_GP1_IO, 0x10);
3214 cx_clear(MO_GP0_IO, 0x00000010);
3307 cx_clear(MO_GP0_IO, 0x00000088);
3334 cx_clear(MO_GP0_IO, 0x00000080);
3469 cx_clear(MO_GP0_IO, 0x00000040);
3478 cx_clear(MO_GP0_IO, 0x00000001);
3489 cx_clear(MO_GP2_IO, 0x00000001);
3491 cx_clear(MO_GP0_I
[all...] |
| H A D | cx88-dvb.c | 350 cx_clear(MO_GP0_IO, 8);
448 cx_clear(MO_GP0_IO, 0x20);
454 cx_clear(MO_GP0_IO, 0x20);
868 cx_clear(MO_GP0_IO, 0x08);
897 cx_clear(MO_GP0_IO, 0x80);
901 cx_clear(MO_GP0_IO, 0x80);
1188 cx_clear(MO_GP0_IO, 1);
1209 cx_clear(MO_GP0_IO, 1);
1227 cx_clear(MO_GP0_IO, 1);
1248 cx_clear(MO_GP0_I
[all...] |
| H A D | cx88-mpeg.c | 195 cx_clear(MO_TS_DMACNTRL, 0x11);
198 cx_clear(MO_PCI_INTMSK, PCI_INT_TSINT);
199 cx_clear(MO_TS_INTMSK, 0x1f0011);
401 cx_clear(MO_TS_DMACNTRL, 0x11);
|
| H A D | cx88-vbi.c | 86 cx_clear(MO_VID_DMACNTRL, 0x88);
89 cx_clear(VID_CAPTURE_CONTROL,0x18);
92 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
93 cx_clear(MO_VID_INTMSK, 0x0f0088);
125 cx_clear(MO_VID_DMACNTRL, 0x88);
126 cx_clear(VID_CAPTURE_CONTROL, 0x18);
|
| H A D | cx88-video.c | 375 cx_clear(MO_AFECFG_IO, 0x00000001);
376 cx_clear(MO_INPUT_FORMAT, 0x00010010);
377 cx_clear(MO_FILTER_EVEN, 0x00002020);
378 cx_clear(MO_FILTER_ODD, 0x00002020);
403 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
457 cx_clear(MO_VID_DMACNTRL, 0x11);
460 cx_clear(VID_CAPTURE_CONTROL,0x06);
463 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
464 cx_clear(MO_VID_INTMSK, 0x0f0011);
1417 cx_clear(MO_VID_DMACNTR
[all...] |
| H A D | cx88.h | 609 #define cx_clear(reg,bit) cx_andor((reg),(bit),0) macro
|