Searched refs:io_base (Results 1 - 25 of 72) sorted by relevance

123

/drivers/hwspinlock/
H A Du8500_hsem.c100 void __iomem *io_base; local
111 io_base = ioremap(res->start, resource_size(res));
112 if (!io_base)
116 val = readl(io_base + HSEM_CTRL_REG);
117 writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG);
120 writel(0xFFFF, io_base + HSEM_ICRALL);
131 hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i;
147 iounmap(io_base);
154 void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET; local
158 writel(0xFFFF, io_base
[all...]
H A Domap_hwspinlock.c87 void __iomem *io_base; local
97 io_base = ioremap(res->start, resource_size(res));
98 if (!io_base)
113 i = readl(io_base + SYSSTATUS_OFFSET);
141 hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
154 iounmap(io_base);
161 void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET; local
171 iounmap(io_base);
/drivers/pcmcia/
H A Dpd6729.h18 unsigned long io_base; /* base io address of the socket */ member in struct:pd6729_socket
H A Dbcm63xx_pcmcia.h57 void __iomem *io_base; member in struct:bcm63xx_pcmcia_socket
H A Delectra_cf.c54 unsigned int io_base; member in struct:electra_cf_socket
236 cf->io_base = (unsigned long)cf->io_virt - VMALLOC_END;
273 cf->socket.io_offset = cf->io_base;
282 if (!request_region(cf->io_base, cf->io_size, driver_name)) {
310 release_region(cf->io_base, cf->io_size);
345 release_region(cf->io_base, cf->io_size);
H A Di82092.c59 unsigned int io_base; /* base io address of the socket */ member in struct:socket_info
107 sockets[i].io_base = pci_resource_start(dev, 0);
188 port = sockets[socket].io_base;
203 port = sockets[socket].io_base;
220 port = sockets[socket].io_base;
233 port = sockets[socket].io_base;
250 port = sockets[socket].io_base;
266 port = sockets[socket].io_base;
366 if (sockets[socketno].io_base == 0)
697 if (sockets[0].io_base>
[all...]
H A Dbcm63xx_pcmcia.c370 skt->io_base = ioremap(res->start, iomem_size);
371 if (!skt->io_base) {
382 sock->io_offset = (unsigned long)skt->io_base;
429 if (skt->io_base)
430 iounmap(skt->io_base);
447 iounmap(skt->io_base);
/drivers/mtd/nand/
H A Dams-delta.c68 void __iomem *io_base = this->priv; local
70 writew(0, io_base + OMAP_MPUIO_IO_CNTL);
81 void __iomem *io_base = this->priv; local
85 writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
179 void __iomem *io_base; local
212 io_base = ioremap(res->start, resource_size(res));
213 if (io_base == NULL) {
219 this->priv = io_base;
222 this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
223 this->IO_ADDR_W = io_base
273 void __iomem *io_base = platform_get_drvdata(pdev); local
[all...]
H A Dlpc32xx_slc.c205 void __iomem *io_base; member in struct:lpc32xx_nand_host
227 writel(SLCCTRL_SW_RESET, SLC_CTRL(host->io_base));
231 writel(0, SLC_CFG(host->io_base));
232 writel(0, SLC_IEN(host->io_base));
234 SLC_ICR(host->io_base));
250 writel(tmp, SLC_TAC(host->io_base));
264 tmp = readl(SLC_CFG(host->io_base));
269 writel(tmp, SLC_CFG(host->io_base));
273 writel(cmd, SLC_CMD(host->io_base));
275 writel(cmd, SLC_ADDR(host->io_base));
[all...]
H A Dsocrates_nand.c34 void __iomem *io_base; member in struct:socrates_nand_host
52 out_be32(host->io_base, FPGA_NAND_ENABLE |
73 out_be32(host->io_base, val);
75 buf[i] = (in_be32(host->io_base) >>
125 out_be32(host->io_base, val);
136 if (in_be32(host->io_base) & FPGA_NAND_BUSY)
157 host->io_base = of_iomap(ofdev->dev.of_node, 0);
158 if (host->io_base == NULL) {
211 iounmap(host->io_base);
225 iounmap(host->io_base);
[all...]
H A Dplat_nand.c24 void __iomem *io_base; member in struct:plat_nand_data
58 data->io_base = devm_ioremap_resource(&pdev->dev, res);
59 if (IS_ERR(data->io_base))
60 return PTR_ERR(data->io_base);
67 data->chip.IO_ADDR_R = data->io_base;
68 data->chip.IO_ADDR_W = data->io_base;
H A Dorion_nand.c51 void __iomem *io_base = chip->IO_ADDR_R; local
56 *buf++ = readb(io_base);
68 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
73 buf[i++] = readb(io_base);
84 void __iomem *io_base; local
101 io_base = ioremap(res->start, resource_size(res));
102 if (!io_base) {
139 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
188 iounmap(io_base);
H A Dlpc32xx_mlc.c177 void __iomem *io_base; member in struct:lpc32xx_nand_host
233 writel(MLCCMD_RESET, MLC_CMD(host->io_base));
243 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base));
247 writel(tmp, MLC_ICR(host->io_base));
251 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base));
262 writel(tmp, MLC_TIME_REG(host->io_base));
266 MLC_IRQ_MR(host->io_base));
269 writel(MLCCEH_NORMAL, MLC_CEH(host->io_base));
283 writel(cmd, MLC_CMD(host->io_base));
285 writel(cmd, MLC_ADDR(host->io_base));
[all...]
H A Dfsl_upm.c41 void __iomem *io_base; member in struct:fsl_upm_nand
119 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
164 fun->chip.IO_ADDR_R = fun->io_base;
165 fun->chip.IO_ADDR_W = fun->io_base;
293 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
295 if (!fun->io_base) {
/drivers/input/keyboard/
H A Dspear-keyboard.c57 void __iomem *io_base; member in struct:spear_kbd
76 sts = readl_relaxed(kbd->io_base + STATUS_REG);
86 val = readl_relaxed(kbd->io_base + DATA_REG) &
97 writel_relaxed(0, kbd->io_base + STATUS_REG);
121 writel_relaxed(val, kbd->io_base + MODE_CTL_REG);
122 writel_relaxed(1, kbd->io_base + STATUS_REG);
125 val = readl_relaxed(kbd->io_base + MODE_CTL_REG);
127 writel_relaxed(val, kbd->io_base + MODE_CTL_REG);
138 val = readl_relaxed(kbd->io_base + MODE_CTL_REG);
140 writel_relaxed(val, kbd->io_base
[all...]
/drivers/scsi/
H A DNCR_Q720.c148 __u16 io_base; local
161 io_base = (pos2 & NCR_Q720_POS2_IO_MASK) << NCR_Q720_POS2_IO_SHIFT;
170 io_base = mca_device_transform_ioport(mca_dev, io_base);
177 i = inb(io_base) | (inb(io_base+1)<<8);
179 printk(KERN_ERR "NCR_Q720, adapter failed to I/O map registers correctly at 0x%x(0x%x)\n", io_base, i);
185 pos4 = inb(io_base + 4);
188 outb(pos4, io_base + 4);
191 asr10 = inb(io_base
[all...]
H A Din2000.h52 #define read1_io(a) (inb(hostdata->io_base+(a)))
53 #define read2_io(a) (inw(hostdata->io_base+(a)))
54 #define write1_io(b,a) (outb((b),hostdata->io_base+(a)))
55 #define write2_io(w,a) (outw((w),hostdata->io_base+(a)))
282 unsigned short io_base; /* IO port base */ member in struct:IN2000_hostdata
/drivers/char/hw_random/
H A Dtimeriomem-rng.c37 void __iomem *io_base; member in struct:timeriomem_rng_private_data
72 *data = readl(priv->io_base);
161 priv->io_base = devm_ioremap_resource(&pdev->dev, res);
162 if (IS_ERR(priv->io_base)) {
163 err = PTR_ERR(priv->io_base);
174 priv->io_base, period);
/drivers/mtd/devices/
H A Dspear_smi.c163 * @io_base: base address for registers of SMI.
174 void __iomem *io_base; member in struct:spear_smi
229 ctrlreg1 = readl(dev->io_base + SMI_CR1);
231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1);
235 dev->io_base + SMI_CR2);
248 writel(ctrlreg1, dev->io_base + SMI_CR1);
249 writel(0, dev->io_base + SMI_CR2);
301 status = readl(dev->io_base + SMI_SR);
307 writel(0, dev->io_base + SMI_SR);
343 writel(0, dev->io_base
[all...]
/drivers/platform/x86/
H A Dfujitsu-tablet.c177 int io_base; member in struct:__anon4836
183 return inb(fujitsu.io_base + 2);
188 return inb(fujitsu.io_base + 6);
193 outb(addr, fujitsu.io_base);
194 return inb(fujitsu.io_base + 4);
442 fujitsu.io_base = res->data.io.minimum;
447 if (fujitsu.irq && fujitsu.io_base)
467 if (ACPI_FAILURE(status) || !fujitsu.irq || !fujitsu.io_base)
481 if (!request_region(fujitsu.io_base, fujitsu.io_length, MODULENAME)) {
491 release_region(fujitsu.io_base, fujits
[all...]
/drivers/of/
H A Dof_pci.c126 * @io_base: pointer to a variable that will contain on return the physical
141 struct list_head *resources, resource_size_t *io_base)
150 if (io_base)
151 *io_base = (resource_size_t)OF_BAD_ADDR;
208 if (!io_base) {
209 pr_err("I/O range found for %s. Please provide an io_base pointer to save CPU base address\n",
214 if (*io_base != (resource_size_t)OF_BAD_ADDR)
217 *io_base = range.cpu_addr;
139 of_pci_get_host_bridge_resources(struct device_node *dev, unsigned char busno, unsigned char bus_max, struct list_head *resources, resource_size_t *io_base) argument
/drivers/video/fbdev/
H A Digafb.c65 unsigned long io_base; member in struct:iga_par
174 #define pci_inb(par, reg) readb(par->io_base+(reg))
175 #define pci_outb(par, val, reg) writeb(val, par->io_base+(reg))
449 if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) {
468 iounmap((void *)par->io_base);
529 iounmap((void *)par->io_base);
/drivers/ata/
H A Dpata_pcmcia.c204 unsigned long io_base, ctl_base; local
224 io_base = pdev->resource[0]->start;
239 io_addr = devm_ioport_map(&pdev->dev, io_base, 8);
276 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io_base, ctl_base);
/drivers/gpu/drm/qxl/
H A Dqxl_irq.c67 outb(0, qdev->io_base + QXL_IO_UPDATE_IRQ);
/drivers/ide/
H A Dide-cs.c193 unsigned long io_base, ctl_base; local
207 io_base = link->resource[0]->start;
227 host = idecs_register(io_base, ctl_base, link->irq, link);
230 host = idecs_register(io_base + 0x10, ctl_base + 0x10,

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