Searched refs:msk (Results 1 - 25 of 33) sorted by relevance

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/drivers/media/usb/pvrusb2/
H A Dpvrusb2-debug.h24 #define pvr2_trace(msk, fmt, arg...) do {if(msk & pvrusb2_debug) printk(KERN_INFO "pvrusb2: " fmt "\n", ##arg); } while (0)
H A Dpvrusb2-ctrl.c221 int msk; local
224 for (idx = 0, msk = 1; val; idx++, msk <<= 1) {
225 if (val & msk) {
305 static unsigned int gen_bitmask_string(int msk,int val,int msk_only, argument
318 for (idx = 0, sm = 1; msk; idx++, sm <<= 1) {
319 if (sm & msk) {
320 msk &= ~sm;
410 int msk; local
412 for (idx = 0, msk
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H A Dpvrusb2-debugifc.c28 unsigned long msk; member in struct:debugifc_mask_item
268 u32 msk,val; local
282 ret = debugifc_parse_unsigned_number(wptr,wlen,&msk);
289 val = msk;
290 msk = 0xffffffff;
293 ret = pvr2_hdw_gpio_chg_dir(hdw,msk,val);
295 ret = pvr2_hdw_gpio_chg_out(hdw,msk,val);
H A Dpvrusb2-hdw.h284 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val);
285 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val);
H A Dpvrusb2-hdw-internal.h66 typedef int (*pvr2_ctlf_set_value)(struct pvr2_ctrl *,int msk,int val);
67 typedef int (*pvr2_ctlf_val_to_sym)(struct pvr2_ctrl *,int msk,int val,
H A Dpvrusb2-sysfs.c235 int valid_bits, msk; local
240 for (msk = 1; valid_bits; msk <<= 1) {
241 if (!(msk & valid_bits)) continue;
242 valid_bits &= ~msk;
243 pvr2_ctrl_get_valname(cip->cptr, msk, buf + bcnt,
H A Dpvrusb2-hdw.c865 static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val, argument
869 *len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val);
959 #define DEFMASK(msk,tab) \
961 .def.type_bitmask.valid_bits = msk, \
1843 v4l2_std_id msk; /* Which bits we care about */ member in struct:pvr2_std_hack
1930 if (std_eeprom_maps[idx].msk ?
1933 std_eeprom_maps[idx].msk) :
4697 static unsigned int print_input_mask(unsigned int msk, argument
4703 if (!((1 << idx) & msk)) continue;
5015 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u3 argument
5036 pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val) argument
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/drivers/net/wireless/rtlwifi/
H A Dpwrseqcmd.h77 u8 msk; member in struct:wlan_pwr_cfg
87 #define GET_PWR_CFG_MASK(__PWR_CMD) (__PWR_CMD.msk)
/drivers/staging/rtl8188eu/include/
H A Dpwrseqcmd.h74 u8 msk; member in struct:wl_pwr_cfg
84 #define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
/drivers/staging/rtl8723au/include/
H A DHalPwrSeqCmd.h25 /* msk: the mask of the read value */
27 /* note: dirver shall implement this function by read & msk */
31 /* msk: the mask of the write bits */
33 /* note: driver shall implement this cmd by read & msk after write */
37 /* msk: the mask of the polled value */
41 /* if( (Read(offset) & msk) == (value & msk) ) */
47 /* msk: N/A */
52 /* msk: N/A */
105 u8 msk; member in struct:wlan_pwr_cfg
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/drivers/gpio/
H A Dgpio-mvebu.c501 u32 msk; local
508 msk = 1 << i;
509 is_out = !(io_conf & msk);
515 out & msk ? "hi" : "lo",
516 blink & msk ? "(blink )" : "");
521 (data_in ^ in_pol) & msk ? "hi" : "lo",
522 in_pol & msk ? "lo" : "hi");
523 if (!((edg_msk | lvl_msk) & msk)) {
527 if (edg_msk & msk)
529 if (lvl_msk & msk)
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H A Dgpio-pch.c360 u32 msk; local
412 msk = (1 << gpio_pins[chip->ioh]) - 1;
413 iowrite32(msk, &chip->reg->imask);
414 iowrite32(msk, &chip->reg->ien);
/drivers/mtd/nand/
H A Dnand_bbt.c94 uint8_t msk = (mark & BBT_ENTRY_MASK) << ((block & BBT_ENTRY_MASK) * 2); local
95 chip->bbt[block >> BBT_ENTRY_SHIFT] |= msk;
182 uint8_t msk = (uint8_t)((1 << bits) - 1); local
221 uint8_t tmp = (dat >> j) & msk;
222 if (tmp == msk)
629 uint8_t msk[4]; local
701 msk[2] = ~rcode;
703 case 1: sft = 3; sftmsk = 0x07; msk[0] = 0x00; msk[1] = 0x01;
704 msk[
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/drivers/video/fbdev/aty/
H A Dmach64_cursor.c145 u8 *msk = (u8 *)cursor->mask; local
163 m = *msk++;
/drivers/isdn/mISDN/
H A Dsocket.c72 struct mISDN_sock *msk; local
75 msk = container_of(ch, struct mISDN_sock, ch);
78 if (msk->sk.sk_state == MISDN_CLOSED)
81 err = sock_queue_rcv_skb(&msk->sk, skb);
90 struct mISDN_sock *msk; local
92 msk = container_of(ch, struct mISDN_sock, ch);
97 msk->sk.sk_state = MISDN_CLOSED;
H A Dstack.c428 struct mISDN_sock *msk = container_of(ch, struct mISDN_sock, ch); local
453 sk_add_node(&msk->sk, &dev->D.st->l1sock.head);
571 struct mISDN_sock *msk = container_of(ch, struct mISDN_sock, ch); local
594 sk_del_node_init(&msk->sk);
/drivers/net/can/
H A Dbfin_can.c131 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF);
132 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF);
140 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF);
141 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF);
/drivers/net/arcnet/
H A Darc-rimi.c78 #define AINTMASK(msk) writeb((msk),_INTMASK)
H A Dcom90io.c78 #define AINTMASK(msk) outb((msk),_INTMASK)
H A Dcom90xx.c98 #define AINTMASK(msk) outb((msk),_INTMASK)
/drivers/video/console/
H A Dbitblit.c317 u8 msk = 0xff; local
351 mask[i++] = ~msk;
354 mask[i++] = msk;
H A Dfbcon_ccw.c31 u8 c, msk = ~(0xff << offset), msk1 = 0; local
34 msk <<= (8 - mod);
45 c |= msk;
H A Dfbcon_ud.c340 u8 msk = 0xff; local
376 mask[i++] = msk;
381 mask[i++] = ~msk;
H A Dfbcon_cw.c30 u8 c, msk = ~(0xff >> offset); local
36 c |= msk;
/drivers/net/ethernet/marvell/
H A Dskge.c628 u32 msk = skge_read32(hw, B2_IRQM_MSK); local
630 if (msk & rxirqmask[port])
632 if (msk & txirqmask[port])
646 u32 msk = skge_read32(hw, B2_IRQM_MSK); local
650 msk &= ~rxirqmask[port];
655 msk |= rxirqmask[port];
660 msk &= ~txirqmask[port];
665 msk |= txirqmask[port];
669 skge_write32(hw, B2_IRQM_MSK, msk);
670 if (msk
1512 u16 msk = xm_read16(hw, port, XM_IMSK); local
1782 u16 cmd, msk; local
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