Searched refs:ph_state (Results 1 - 14 of 14) sorted by relevance

/drivers/isdn/hisax/
H A Dhisax_if.h59 unsigned long ph_state; member in struct:hisax_d_if
H A Damd7930_fn.c162 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
171 u_char index = stateHelper[cs->dc.amd7930.old_state] * 8 + stateHelper[cs->dc.amd7930.ph_state] - 1;
176 cs->dc.amd7930.ph_state, cs->dc.amd7930.old_state, message & 0x0f, index);
178 cs->dc.amd7930.old_state = cs->dc.amd7930.ph_state;
544 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
628 if ((cs->dc.amd7930.ph_state == 8)) {
635 cs->dc.amd7930.ph_state = 2;
641 cs->dc.amd7930.ph_state = 9;
H A Dhisax.h816 int ph_state; member in struct:isac_chip
832 int ph_state; member in struct:hfcd_chip
836 int ph_state; member in struct:hfcpci_chip
840 int ph_state; member in struct:hfcsx_chip
844 int ph_state; member in struct:w6692_chip
849 u_char ph_state; member in struct:amd7930_chip
859 int ph_state; member in struct:icc_chip
H A Disac.c51 switch (cs->dc.isac.ph_state) {
266 cs->dc.isac.ph_state = (exval >> 2) & 0xf;
268 debugl1(cs, "ph_state change %x", cs->dc.isac.ph_state);
503 if ((cs->dc.isac.ph_state == ISAC_IND_EI) ||
504 (cs->dc.isac.ph_state == ISAC_IND_DR) ||
505 (cs->dc.isac.ph_state == ISAC_IND_RS))
666 cs->dc.isac.ph_state = (val >> 2) & 0xf;
H A Dicc.c52 switch (cs->dc.icc.ph_state) {
263 cs->dc.icc.ph_state = (exval >> 2) & 0xf;
265 debugl1(cs, "ph_state change %x", cs->dc.icc.ph_state);
501 if ((cs->dc.icc.ph_state == ICC_IND_EI1) ||
502 (cs->dc.icc.ph_state == ICC_IND_DR))
670 cs->dc.icc.ph_state = (val >> 2) & 0xf;
H A Dipacx.c63 cs->dc.isac.ph_state);
83 cs->dc.isac.ph_state = event;
150 if ((cs->dc.isac.ph_state == IPACX_IND_RES) ||
151 (cs->dc.isac.ph_state == IPACX_IND_DR) ||
152 (cs->dc.isac.ph_state == IPACX_IND_DC))
H A Dw6692.c71 switch (cs->dc.w6692.ph_state) {
520 cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK;
522 debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state);
625 if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
630 cs->dc.w6692.ph_state = W_L1CMD_RST;
909 cs->dc.w6692.ph_state = W_L1CMD_RST;
H A Dhfc_sx.c611 cs->dc.hfcsx.ph_state = 1;
723 debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcsx.ph_state,
725 cs->dc.hfcsx.ph_state = exval;
1262 switch (cs->dc.hfcsx.ph_state) {
1281 switch (cs->dc.hfcsx.ph_state) {
1294 cs->dc.hfcsx.ph_state = 4;
1447 cs->dc.hfcsx.ph_state = 0;
H A Dhfcscard.c226 cs->dc.hfcd.ph_state = 0;
H A Dhfc_pci.c786 cs->dc.hfcpci.ph_state = 1;
958 debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcpci.ph_state,
960 cs->dc.hfcpci.ph_state = exval;
1512 switch (cs->dc.hfcpci.ph_state) {
1532 switch (cs->dc.hfcpci.ph_state) {
1543 cs->dc.hfcpci.ph_state = 4;
1650 cs->dc.hfcpci.ph_state = 0;
H A Dhfc_2bds0.c560 switch (cs->dc.hfcd.ph_state) {
779 debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcd.ph_state,
781 cs->dc.hfcd.ph_state = exval;
H A Dconfig.c1631 clear_bit(0, &hisax_d_if->ph_state);
1663 if (test_bit(0, &cs->hw.hisax_d_if->ph_state))
1700 set_bit(0, &d_if->ph_state);
1704 clear_bit(0, &d_if->ph_state);
/drivers/isdn/hardware/mISDN/
H A Dhfcpci.c1046 ph_state(struct dchannel *dch) function
1187 printk(KERN_DEBUG "ph_state chg %d->%d\n",
2091 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, ph_state);
H A Dhfcsusb.c679 ph_state(struct dchannel *dch) function
1843 mISDN_initdchannel(&hw->dch, MAX_DFRAME_LEN_L1, ph_state);

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