Searched refs:pin (Results 1 - 25 of 183) sorted by relevance

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/drivers/gpio/
H A Dgpio-vr41xx.c127 unsigned int pin; local
129 pin = GPIO_PIN_OF_IRQ(d->irq);
130 giu_clear(GIUINTENL, 1 << pin);
131 giu_write(GIUINTSTATL, 1 << pin);
179 unsigned int pin; local
181 pin = GPIO_PIN_OF_IRQ(d->irq) - GIUINT_HIGH_OFFSET;
182 giu_clear(GIUINTENH, 1 << pin);
183 giu_write(GIUINTSTATH, 1 << pin);
232 void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, argument
237 if (pin < GIUINT_HIGH_OFFSE
311 vr41xx_set_irq_level(unsigned int pin, irq_level_t level) argument
333 giu_set_direction(struct gpio_chip *chip, unsigned pin, int dir) argument
381 vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull) argument
419 vr41xx_gpio_get(struct gpio_chip *chip, unsigned pin) argument
446 vr41xx_gpio_set(struct gpio_chip *chip, unsigned pin, int value) argument
516 unsigned int trigger, i, pin; local
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H A Dgpio-ks8695.c40 static void ks8695_gpio_mode(unsigned int pin, short gpio) argument
45 if (pin > KS8695_GPIO_5) /* only GPIO 0..5 have internal functions */
52 x &= ~enable[pin];
54 x |= enable[pin];
64 * Configure GPIO pin as external interrupt source.
66 int ks8695_gpio_interrupt(unsigned int pin, unsigned int type) argument
70 if (pin > KS8695_GPIO_3) /* only GPIO 0..3 can generate IRQ */
75 /* set pin as input */
77 x &= ~IOPM(pin);
83 irq_set_irq_type(gpio_irq[pin], typ
99 ks8695_gpio_direction_input(struct gpio_chip *gc, unsigned int pin) argument
125 ks8695_gpio_direction_output(struct gpio_chip *gc, unsigned int pin, int state) argument
160 ks8695_gpio_set_value(struct gpio_chip *gc, unsigned int pin, int state) argument
185 ks8695_gpio_get_value(struct gpio_chip *gc, unsigned int pin) argument
200 ks8695_gpio_to_irq(struct gpio_chip *gc, unsigned int pin) argument
[all...]
H A Dgpio-lpc32xx.c175 unsigned pin, int input)
178 __raw_writel(GPIO012_PIN_TO_BIT(pin),
181 __raw_writel(GPIO012_PIN_TO_BIT(pin),
186 unsigned pin, int input)
188 u32 u = GPIO3_PIN_TO_BIT(pin);
197 unsigned pin, int high)
200 __raw_writel(GPIO012_PIN_TO_BIT(pin),
203 __raw_writel(GPIO012_PIN_TO_BIT(pin),
208 unsigned pin, int high)
210 u32 u = GPIO3_PIN_TO_BIT(pin);
174 __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, unsigned pin, int input) argument
185 __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int input) argument
196 __set_gpio_level_p012(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
207 __set_gpio_level_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
218 __set_gpo_level_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
227 __get_gpio_state_p012(struct lpc32xx_gpio_chip *group, unsigned pin) argument
234 __get_gpio_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
246 __get_gpi_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
252 __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
261 lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip, unsigned pin) argument
271 lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip, unsigned pin) argument
281 lpc32xx_gpio_dir_in_always(struct gpio_chip *chip, unsigned pin) argument
287 lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin) argument
294 lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin) argument
301 lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin) argument
308 lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin, int value) argument
319 lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin, int value) argument
330 lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin, int value) argument
339 lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin, int value) argument
347 lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin, int value) argument
355 lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin, int value) argument
363 lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin) argument
370 lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin) argument
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H A Dgpio-zevio.c66 static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin, argument
69 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
73 static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin, argument
76 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
81 static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) argument
87 dir = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_DIRECTION);
88 if (dir & BIT(ZEVIO_GPIO_BIT(pin)))
89 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_INPUT);
91 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_OUTPUT);
94 return (val >> ZEVIO_GPIO_BIT(pin))
97 zevio_gpio_set(struct gpio_chip *chip, unsigned pin, int value) argument
113 zevio_gpio_direction_input(struct gpio_chip *chip, unsigned pin) argument
129 zevio_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value) argument
152 zevio_gpio_to_irq(struct gpio_chip *chip, unsigned pin) argument
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H A Dgpiolib-acpi.c26 unsigned int pin; member in struct:acpi_gpio_event
33 unsigned int pin; member in struct:acpi_gpio_connection
59 * acpi_get_gpiod() - Translate ACPI GPIO pin to GPIO descriptor usable with GPIO API
61 * @pin: ACPI GPIO pin number (0-based, controller-relative)
67 static struct gpio_desc *acpi_get_gpiod(char *path, int pin) argument
81 if (pin < 0 || pin > chip->ngpio)
84 return gpiochip_get_desc(chip, pin);
100 acpi_execute_simple_method(event->handle, NULL, event->pin);
121 int ret, pin, irq; local
404 unsigned pin = agpio->pin_table[i]; local
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/drivers/acpi/
H A Dpci_irq.c49 u8 pin; member in struct:acpi_prt_entry
54 static inline char pin_name(int pin) argument
56 return 'A' + pin - 1;
105 unsigned char pin; member in struct:prt_quirk
114 * interrupt at the listed segment/bus/device/pin is connected to the first
146 entry->pin == quirk->pin &&
153 entry->id.device, pin_name(entry->pin),
161 int pin, struct acpi_pci_routing_table *prt,
170 prt->pin
160 acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev, int pin, struct acpi_pci_routing_table *prt, struct acpi_prt_entry **entry_ptr) argument
226 acpi_pci_irq_find_prt_entry(struct pci_dev *dev, int pin, struct acpi_prt_entry **entry_ptr) argument
318 acpi_pci_irq_lookup(struct pci_dev *dev, int pin) argument
401 u8 pin; local
478 u8 pin; local
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/drivers/input/misc/
H A Dixp4xx-beeper.c33 static void ixp4xx_spkr_control(unsigned int pin, unsigned int count) argument
40 gpio_direction_output(pin, 0);
43 gpio_direction_output(pin, 1);
44 gpio_direction_input(pin);
53 unsigned int pin = (unsigned int) input_get_drvdata(dev); local
72 ixp4xx_spkr_control(pin, count);
79 unsigned int pin = (unsigned int) dev_id; local
85 gpio_set_value(pin, !gpio_get_value(pin));
144 unsigned int pin local
161 unsigned int pin = (unsigned int) input_get_drvdata(input_dev); local
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/drivers/of/
H A Dof_pci_irq.c22 u8 pin; local
39 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
42 /* No pin, exit */
43 if (pin == 0)
80 pin = pci_swizzle_interrupt_pin(pdev, pin);
86 out_irq->args[0] = pin;
97 * @pin: PCI irq pin number; passed when used as map_irq callback. Unused
99 * @slot and @pin ar
102 of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin) argument
[all...]
/drivers/pci/
H A Dsetup-irq.c29 u8 pin, slot; local
33 which interrupt pin it will come in on. We know which slot it
38 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
40 if (pin > 4)
41 pin = 1;
43 if (pin != 0) {
45 slot = (*swizzle)(dev, &pin);
47 irq = (*map_irq)(dev, slot, pin);
/drivers/pinctrl/freescale/
H A Dpinctrl-imx1.h21 * struct imx1_pin - describes an IMX1/21/27 pin.
22 * @pin_id: ID of the described pin.
24 * @config: Configuration of the pin (currently only pullup-enable).
33 * struct imx1_pin_group - describes an IMX pin group
34 * @name: the name of this specific pin group
49 * @groups: corresponding pin groups
68 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
H A Dpinctrl-imx.h21 * struct imx_pin_group - describes a single i.MX pin
22 * @pin: the pin_id of this pin
23 * @mux_mode: the mux mode for this pin.
24 * @input_reg: the select input register offset for this pin if any
26 * @input_val: the select input value for this pin.
27 * @configs: the config for this pin.
30 unsigned int pin; member in struct:imx_pin
38 * struct imx_pin_group - describes an IMX pin group
39 * @name: the name of this specific pin grou
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H A Dpinctrl-mxs.h22 #define MXS_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
23 #define PINID(bank, pin) ((bank) * 32 + (pin))
29 * pin: 11..4 (8)
39 * pin config bit field definitions
/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.h31 #define SUNXI_PINCTRL_PIN(bank, pin) \
32 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)
87 struct pinctrl_pin_desc pin; member in struct:sunxi_desc_pin
107 unsigned pin; member in struct:sunxi_pinctrl_group
128 .pin = _pin, \
157 * 8 pins per register, each pin having a 4bits value
159 * 32 bits per register, each pin corresponding to one bit
161 * 16 pins per register, each pin having a 2bits value
163 * 16 pins per register, each pin havin
171 sunxi_mux_reg(u16 pin) argument
180 sunxi_mux_offset(u16 pin) argument
186 sunxi_data_reg(u16 pin) argument
195 sunxi_data_offset(u16 pin) argument
201 sunxi_dlevel_reg(u16 pin) argument
210 sunxi_dlevel_offset(u16 pin) argument
216 sunxi_pull_reg(u16 pin) argument
225 sunxi_pull_offset(u16 pin) argument
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H A Dpinctrl-sunxi.c78 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; local
80 if (!strcmp(pin->pin.name, pin_name)) {
81 struct sunxi_desc_function *func = pin->functions;
103 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; local
105 if (pin->pin.number == pin_num) {
106 struct sunxi_desc_function *func = pin->functions;
142 *pins = (unsigned *)&pctl->groups[group].pin;
190 dev_err(pctl->dev, "unknown pin
290 unsigned pin = g->pin - pctl->desc->pin_base; local
377 sunxi_pmx_set(struct pinctrl_dev *pctldev, unsigned pin, u8 config) argument
509 int pin, base; local
768 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; local
787 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; local
807 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; local
938 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; local
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/drivers/net/ethernet/sfc/
H A Dphy.h47 void falcon_txc_set_gpio_dir(struct efx_nic *efx, int pin, int dir);
48 void falcon_txc_set_gpio_val(struct efx_nic *efx, int pin, int val);
/drivers/pinctrl/
H A Dpinmux.h2 * Internal interface between the core pin control system and the
21 unsigned pin, unsigned gpio);
22 void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin,
26 unsigned pin, bool input);
48 unsigned pin, unsigned gpio)
54 unsigned pin,
61 unsigned pin, bool input)
46 pinmux_request_gpio(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned pin, unsigned gpio) argument
53 pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, struct pinctrl_gpio_range *range) argument
59 pinmux_gpio_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned pin, bool input) argument
H A Dpinctrl-at91.c85 * @groups: corresponding pin groups
103 * struct at91_pmx_pin - describes an At91 pin mux
104 * @bank: the bank of the pin
105 * @pin: the pin number in the @bank
106 * @mux: the mux mode : gpio or periph_x of the pin i.e. alternate function.
107 * @conf: the configuration of the pin: PULL_UP, MULTIDRIVE etc...
111 uint32_t pin; member in struct:at91_pmx_pin
117 * struct at91_pin_group - describes an At91 pin group
118 * @name: the name of this specific pin grou
328 pin_to_bank(unsigned pin) argument
333 pin_to_mask(unsigned int pin) argument
338 two_bit_pin_value_shift_amount(unsigned int pin) argument
346 sama5d3_get_drive_register(unsigned int pin) argument
354 at91sam9x5_get_drive_register(unsigned int pin) argument
367 at91_mux_get_pullup(void __iomem *pio, unsigned pin) argument
380 at91_mux_get_multidrive(void __iomem *pio, unsigned pin) argument
454 at91_mux_get_deglitch(void __iomem *pio, unsigned pin) argument
464 at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) argument
479 at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) argument
498 at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) argument
516 at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) argument
521 read_drive_strength(void __iomem *reg, unsigned pin) argument
530 at91_mux_sama5d3_get_drivestrength(void __iomem *pio, unsigned pin) argument
544 at91_mux_sam9x5_get_drivestrength(void __iomem *pio, unsigned pin) argument
557 set_drive_strength(void __iomem *reg, unsigned pin, u32 strength) argument
568 at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, u32 setting) argument
579 at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin, u32 setting) argument
641 at91_pin_dbg(const struct device *dev, const struct at91_pmx_pin *pin) argument
652 pin_check_config(struct at91_pinctrl *info, const char *name, int index, const struct at91_pmx_pin *pin) argument
706 const struct at91_pmx_pin *pin; local
841 unsigned pin; local
879 unsigned pin; local
1031 struct at91_pmx_pin *pin; local
1472 unsigned pin = d->hwirq; local
1488 unsigned pin = d->hwirq; local
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H A Dpinctrl-lantiq.c78 const char *group, *pin; local
118 of_property_for_each_string(np, "lantiq,pins", prop, pin) {
123 (*map)->name = pin;
124 (*map)->data.configs.group_or_pin = pin;
226 /* dont assume .mfp is linearly mapped. find the mfp with the correct .pin */
227 static int match_mfp(const struct ltq_pinmux_info *info, int pin) argument
231 if (info->mfp[i].pin == pin)
237 /* check whether current pin configuration is valid. Negative for failure */
242 int i, pin, re local
266 int i, pin, pin_func, ret; local
293 ltq_pmx_gpio_request_enable(struct pinctrl_dev *pctrldev, struct pinctrl_gpio_range *range, unsigned pin) argument
[all...]
/drivers/pinctrl/vt8500/
H A DKconfig13 bool "VIA VT8500 pin controller driver"
17 Say yes here to support the gpio/pin control module on
21 bool "Wondermedia WM8505 pin controller driver"
25 Say yes here to support the gpio/pin control module on
29 bool "Wondermedia WM8650 pin controller driver"
33 Say yes here to support the gpio/pin control module on
37 bool "Wondermedia WM8750 pin controller driver"
41 Say yes here to support the gpio/pin control module on
45 bool "Wondermedia WM8850 pin controller driver"
49 Say yes here to support the gpio/pin contro
[all...]
/drivers/input/mouse/
H A Dgpio_mouse.c53 int pin, i; local
69 pin = pdata->pins[i];
71 if (pin < 0) {
85 error = gpio_request(pin, "gpio_mouse");
87 dev_err(&pdev->dev, "fail %d pin (%d idx)\n",
88 pin, i);
92 gpio_direction_input(pin);
143 pin = pdata->pins[i];
144 if (pin)
145 gpio_free(pin);
155 int pin, i; local
[all...]
/drivers/md/bcache/
H A Djournal.h84 atomic_t *pin; member in struct:journal_replay
114 DECLARE_FIFO(atomic_t, pin);
157 (fifo_idx(&(c)->journal.pin, (l)) > fifo_idx(&(c)->journal.pin, (r)))
162 (!(j)->blocks_free || fifo_free(&(j)->pin) <= 1)
/drivers/gpu/drm/radeon/
H A Ddce6_afmt.c67 offset = rdev->audio.pin[i].offset;
71 rdev->audio.pin[i].connected = false;
73 rdev->audio.pin[i].connected = true;
84 if (rdev->audio.pin[i].connected)
85 return &rdev->audio.pin[i];
98 if (!dig || !dig->afmt || !dig->afmt->pin)
104 AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id));
117 if (!dig || !dig->afmt || !dig->afmt->pin)
120 offset = dig->afmt->pin->offset;
161 if (!dig || !dig->afmt || !dig->afmt->pin)
285 dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, u8 enable_mask) argument
[all...]
/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_dmabuf.c39 * @pin: Pin buffer if true.
83 * Flushes and unpins the query bo if @pin == true to avoid failures.
87 * @pin: Pin buffer if true.
95 bool pin, bool interruptible)
105 if (pin)
119 if (pin)
134 if (pin)
157 * @pin: Pin buffer in vram if true.
165 bool pin, bool interruptible)
169 if (pin)
93 vmw_dmabuf_to_vram_or_gmr(struct vmw_private *dev_priv, struct vmw_dma_buffer *buf, bool pin, bool interruptible) argument
163 vmw_dmabuf_to_vram(struct vmw_private *dev_priv, struct vmw_dma_buffer *buf, bool pin, bool interruptible) argument
195 vmw_dmabuf_to_start_of_vram(struct vmw_private *dev_priv, struct vmw_dma_buffer *buf, bool pin, bool interruptible) argument
300 vmw_bo_pin(struct ttm_buffer_object *bo, bool pin) argument
[all...]
/drivers/pwm/
H A Dpwm-bfin.c22 unsigned short pin; member in struct:bfin_pwm
42 priv->pin = pwm_to_gptimer_per[pwm->hwpwm];
44 ret = peripheral_request(priv->pin, NULL);
60 peripheral_free(priv->pin);
83 set_gptimer_config(priv->pin, TIMER_MODE_PWM | TIMER_PERIOD_CNT);
84 set_gptimer_pwidth(priv->pin, duty);
85 set_gptimer_period(priv->pin, period);
94 enable_gptimer(priv->pin);
103 disable_gptimer(priv->pin);
/drivers/pinctrl/sh-pfc/
H A DKconfig14 This enables pin control drivers for SH and SH Mobile platforms
20 This enables support for GPIOs within the SoC's pin function

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