Searched refs:pllvals (Results 1 - 5 of 5) sorted by path

/drivers/gpu/drm/nouveau/dispnv04/
H A Dcrtc.c119 struct nouveau_pll_vals *pv = &regp->pllvals;
H A Ddfp.c602 (&nv04_display(dev)->saved_reg.crtc_reg[head].pllvals);
H A Ddisp.h39 struct nouveau_pll_vals pllvals; member in struct:nv04_crtc_reg
H A Dhw.c133 uint32_t pll2, struct nouveau_pll_vals *pllvals)
140 pllvals->log2P = (pll1 >> 16) & 0x7;
141 pllvals->N2 = pllvals->M2 = 1;
144 pllvals->NM1 = pll2 & 0xffff;
147 pllvals->NM2 = pll2 >> 16;
149 pllvals->NM1 = pll1 & 0xffff;
151 pllvals->NM2 = pll2 & 0xffff;
153 pllvals->M1 &= 0xf; /* only 4 bits */
155 pllvals
132 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1, uint32_t pll2, struct nouveau_pll_vals *pllvals) argument
164 nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype, struct nouveau_pll_vals *pllvals) argument
217 struct nouveau_pll_vals pllvals; local
[all...]
H A Dhw.h45 struct nouveau_pll_vals *pllvals);
46 int nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pllvals);

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