Searched refs:rate (Results 1 - 25 of 565) sorted by relevance

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/drivers/clk/spear/
H A Dclk.c20 unsigned long prev_rate, rate = 0; local
23 prev_rate = rate;
24 rate = calc_rate(hw, parent_rate, *index);
25 if (drate < rate) {
28 rate = prev_rate;
38 return rate;
/drivers/clk/tegra/
H A Dclk-audio-sync.c28 return sync->rate;
31 static long clk_sync_source_round_rate(struct clk_hw *hw, unsigned long rate, argument
36 if (rate > sync->max_rate)
39 return rate;
42 static int clk_sync_source_set_rate(struct clk_hw *hw, unsigned long rate, argument
47 sync->rate = rate;
58 unsigned long rate, unsigned long max_rate)
70 sync->rate = rate;
57 tegra_clk_register_sync_source(const char *name, unsigned long rate, unsigned long max_rate) argument
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H A Dclk-divider.c33 static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate, argument
40 if (!rate)
49 divider_ux1 += rate - 1;
51 do_div(divider_ux1, rate);
73 u64 rate = parent_rate; local
81 rate *= mul;
82 rate += div - 1;
83 do_div(rate, div);
85 return rate;
88 static long clk_frac_div_round_rate(struct clk_hw *hw, unsigned long rate, argument
107 clk_frac_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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/drivers/net/wireless/iwlwifi/mvm/
H A Drs.h43 u8 prev_rs; /* previous rate used in rs algo */
44 u8 next_rs; /* next rate used in rs algo */
228 #define is_legacy(rate) is_type_legacy((rate)->type)
229 #define is_ht_siso(rate) is_type_ht_siso((rate)->type)
230 #define is_ht_mimo2(rate) is_type_ht_mimo2((rate)->type)
231 #define is_vht_siso(rate) is_type_vht_siso((rate)
294 struct rs_rate rate; member in struct:iwl_scale_tbl_info
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H A Drs.c60 /* max allowed rate miss before sync LQ cmd */
109 * rate, ht rate, prev rate, next rate
111 * If there isn't a valid next or previous rate then INV is used which
191 struct rs_rate *rate = &tbl->rate; local
195 if (is_ht20(rate) && (ht_cap->cap &
198 if (is_ht40(rate)
505 rs_dump_rate(struct iwl_mvm *mvm, const struct rs_rate *rate, const char *prefix) argument
698 ucode_rate_from_rs_rate(struct iwl_mvm *mvm, struct rs_rate *rate) argument
754 rs_rate_from_ucode_rate(const u32 ucode_rate, enum ieee80211_band band, struct rs_rate *rate) argument
828 rs_toggle_antenna(u32 valid_ant, struct rs_rate *rate) argument
852 rs_get_supported_rates(struct iwl_lq_sta *lq_sta, struct rs_rate *rate) argument
922 rs_rate_supported(struct iwl_lq_sta *lq_sta, struct rs_rate *rate) argument
931 rs_get_lower_rate_in_column(struct iwl_lq_sta *lq_sta, struct rs_rate *rate) argument
953 rs_get_lower_rate_down_column(struct iwl_lq_sta *lq_sta, struct rs_rate *rate) argument
1034 struct rs_rate rate; local
1363 struct rs_rate *rate = &tbl->rate; local
1511 rs_update_rate_tbl(struct iwl_mvm *mvm, struct ieee80211_sta *sta, struct iwl_lq_sta *lq_sta, struct rs_rate *rate) argument
1607 struct rs_rate *rate = &search_tbl->rate; local
1769 rs_tpc_allowed(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct rs_rate *rate, enum ieee80211_band band) argument
1875 struct rs_rate *rate = &tbl->rate; local
1981 struct rs_rate *rate; local
2312 rs_get_initial_rate(struct iwl_mvm *mvm, struct iwl_lq_sta *lq_sta, enum ieee80211_band band, struct rs_rate *rate) argument
2405 struct rs_rate *rate; local
2550 iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, struct iwl_mvm_frame_stats *stats, u32 rate, bool agg) argument
2743 struct rs_rate rate; local
2768 rs_fill_rates_for_column(struct iwl_mvm *mvm, struct iwl_lq_sta *lq_sta, struct rs_rate *rate, __le32 *rs_table, int *rs_table_index, int num_rates, int num_retries, u8 valid_tx_ant, bool toggle_ant) argument
2826 struct rs_rate rate; local
2961 rs_pretty_print_rate(char *buf, const u32 rate) argument
3074 struct rs_rate *rate = &tbl->rate; local
3154 struct rs_rate *rate; local
3227 int col, rate; local
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/drivers/clk/versatile/
H A Dclk-vexpress-osc.c35 u32 rate; local
37 regmap_read(osc->reg, 0, &rate);
39 return rate;
42 static long vexpress_osc_round_rate(struct clk_hw *hw, unsigned long rate, argument
47 if (WARN_ON(osc->rate_min && rate < osc->rate_min))
48 rate = osc->rate_min;
50 if (WARN_ON(osc->rate_max && rate > osc->rate_max))
51 rate = osc->rate_max;
53 return rate;
56 static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate, argument
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/drivers/clocksource/
H A Ddw_apb_timer_of.c27 void __iomem **base, u32 *rate)
52 *rate = clk_get_rate(timer_clk);
57 if (of_property_read_u32(np, "clock-freq", rate) &&
58 of_property_read_u32(np, "clock-frequency", rate))
66 u32 irq, rate; local
72 timer_get_base_and_rate(event_timer, &iobase, &rate);
75 rate);
89 u32 rate; local
91 timer_get_base_and_rate(source_timer, &iobase, &rate);
93 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
26 timer_get_base_and_rate(struct device_node *np, void __iomem **base, u32 *rate) argument
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H A Dclps711x-timer.c36 unsigned long rate; local
43 rate = clk_get_rate(clock);
47 clocksource_mmio_init(tcd, "clps711x-clocksource", rate, 300, 16,
50 sched_clock_register(clps711x_sched_clock_read, 16, rate);
73 unsigned long rate; local
86 rate = clk_get_rate(clock);
89 writew(DIV_ROUND_CLOSEST(rate, HZ), base);
/drivers/net/wireless/b43/
H A Dmain.h61 static inline int b43_is_cck_rate(int rate) argument
63 return (rate == B43_CCK_RATE_1MB ||
64 rate == B43_CCK_RATE_2MB ||
65 rate == B43_CCK_RATE_5MB || rate == B43_CCK_RATE_11MB);
68 static inline int b43_is_ofdm_rate(int rate) argument
70 return !b43_is_cck_rate(rate);
/drivers/net/wireless/b43legacy/
H A Dmain.h86 int b43legacy_is_cck_rate(int rate) argument
88 return (rate == B43legacy_CCK_RATE_1MB ||
89 rate == B43legacy_CCK_RATE_2MB ||
90 rate == B43legacy_CCK_RATE_5MB ||
91 rate == B43legacy_CCK_RATE_11MB);
95 int b43legacy_is_ofdm_rate(int rate) argument
97 return !b43legacy_is_cck_rate(rate);
/drivers/net/wireless/ti/wl18xx/
H A Dtx.c33 u8 band, struct ieee80211_tx_rate *rate)
38 wl1271_error("last Tx rate invalid: %d", fw_rate);
39 rate->idx = 0;
40 rate->flags = 0;
45 rate->idx = fw_rate;
47 rate->idx -= CONF_HW_RATE_INDEX_6MBPS;
48 rate->flags = 0;
50 rate->flags = IEEE80211_TX_RC_MCS;
51 rate->idx = fw_rate - CONF_HW_RATE_INDEX_MCS0;
53 /* SGI modifier is counted as a separate rate */
32 wl18xx_get_last_tx_rate(struct wl1271 *wl, struct ieee80211_vif *vif, u8 band, struct ieee80211_tx_rate *rate) argument
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/drivers/clk/at91/
H A Dclk-h32mx.c52 static long clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate, argument
57 if (rate > *parent_rate)
60 if (rate < div)
63 if (rate - div < *parent_rate - rate)
69 static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate, argument
76 if (parent_rate != rate && (parent_rate / 2) != rate)
81 if ((parent_rate / 2) == rate)
H A Dclk-plldiv.c39 static long clk_plldiv_round_rate(struct clk_hw *hw, unsigned long rate, argument
44 if (rate > *parent_rate)
47 if (rate < div)
50 if (rate - div < *parent_rate - rate)
56 static int clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate, argument
63 if (parent_rate != rate && (parent_rate / 2) != rate)
68 if ((parent_rate / 2) == rate)
/drivers/cpufreq/
H A Dcpufreq_opp.c53 unsigned long rate; local
69 for (i = 0, rate = 0; i < max_opps; i++, rate++) {
70 /* find next rate */
71 opp = dev_pm_opp_find_freq_ceil(dev, &rate);
77 freq_table[i].frequency = rate / 1000;
/drivers/clk/samsung/
H A Dclk-pll.h40 .rate = (_rate), \
48 .rate = (_rate), \
57 .rate = (_rate), \
66 .rate = (_rate), \
76 .rate = (_rate), \
89 unsigned int rate; member in struct:samsung_pll_rate_table
H A Dclk-pll.c32 struct samsung_clk_pll *pll, unsigned long rate)
38 if (rate == rate_table[i].rate)
54 if (drate >= rate_table[i].rate)
55 return rate_table[i].rate;
59 return rate_table[i - 1].rate;
162 const struct samsung_pll_rate_table *rate, u32 pll_con)
169 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv);
176 const struct samsung_pll_rate_table *rate; local
31 samsung_get_pll_settings( struct samsung_clk_pll *pll, unsigned long rate) argument
161 samsung_pll35xx_mp_change( const struct samsung_pll_rate_table *rate, u32 pll_con) argument
268 samsung_pll36xx_mpk_change( const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1) argument
286 const struct samsung_pll_rate_table *rate; local
381 samsung_pll45xx_mp_change(u32 pll_con0, u32 pll_con1, const struct samsung_pll_rate_table *rate) argument
398 const struct samsung_pll_rate_table *rate; local
528 samsung_pll46xx_mpk_change(u32 pll_con0, u32 pll_con1, const struct samsung_pll_rate_table *rate) argument
545 const struct samsung_pll_rate_table *rate; local
757 const struct samsung_pll_rate_table *rate; local
998 const struct samsung_pll_rate_table *rate; local
1098 const struct samsung_pll_rate_table *rate; local
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/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_audio.c102 "level_shift_value=%d, downmix_inhibit=%d, rate=%d",
104 info->level_shift_value, info->downmix_inhibit, audio->rate);
136 n = arcs->lut[audio->rate].n;
137 cts = arcs->lut[audio->rate].cts;
139 if ((MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate) ||
140 (MSM_HDMI_SAMPLE_RATE_176_4KHZ == audio->rate)) {
143 } else if ((MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) ||
144 (MSM_HDMI_SAMPLE_RATE_88_2KHZ == audio->rate)) {
157 if ((MSM_HDMI_SAMPLE_RATE_48KHZ == audio->rate) ||
158 (MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) ||
259 hdmi_audio_set_sample_rate(struct hdmi *hdmi, int rate) argument
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/drivers/staging/iio/gyro/
H A DKconfig11 yaw rate gyroscope with SPI.
/drivers/clk/mmp/
H A Dclk-frac.c38 unsigned long rate = 0, prev_rate; local
42 prev_rate = rate;
43 rate = (((*prate / 10000) * factor->ftbl[i].den) /
45 if (rate > drate)
49 return rate;
51 if ((drate - prev_rate) > (rate - drate))
52 return rate;
80 /* Configures new clock rate*/
88 unsigned long prev_rate, rate = 0; local
91 prev_rate = rate;
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/drivers/clk/qcom/
H A Dclk-rcg2.c125 * Calculate m/n:d rate
128 * rate = ----------- x ---
132 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) argument
135 rate *= 2;
136 rate /= hid_div + 1;
140 u64 tmp = rate;
143 rate = tmp;
146 return rate;
177 const struct freq_tbl *f, unsigned long rate,
182 f = qcom_find_freq(f, rate);
176 _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, unsigned long rate, unsigned long *p_rate, struct clk **p) argument
208 clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate, struct clk **p) argument
253 __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate) argument
265 clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
271 clk_rcg2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument
315 clk_edp_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
354 clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument
361 clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate, struct clk **p) argument
412 clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate, struct clk **p) argument
432 clk_byte_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
448 clk_byte_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument
474 clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate, struct clk **p) argument
499 clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
532 clk_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument
[all...]
/drivers/clk/mxs/
H A Dclk-ssp.c27 void mxs_ssp_set_clk_rate(struct mxs_ssp *ssp, unsigned int rate) argument
36 clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide);
44 "%s: cannot set clock to %d\n", __func__, rate);
60 __func__, clock_divide, clock_rate, ssp_clk, ssp_sck, rate);
/drivers/clk/ux500/
H A Dclk.h32 unsigned long rate,
43 unsigned long rate,
59 unsigned long rate,
77 unsigned long rate,
/drivers/gpu/drm/armada/
H A Darmada_510.c64 uint32_t rate, ref, div; local
66 rate = mode->clock * 1000;
67 ref = clk_round_rate(clk, rate);
68 div = DIV_ROUND_UP(ref, rate);
/drivers/clk/
H A Dclk-fixed-factor.c22 * rate - rate is fixed. clk->rate = parent->rate / div * mult
32 unsigned long long int rate; local
34 rate = (unsigned long long int)parent_rate * fix->mult;
35 do_div(rate, fix->div);
36 return (unsigned long)rate;
39 static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate, argument
47 best_parent = (rate / fi
55 clk_factor_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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/drivers/gpu/drm/msm/mdp/mdp4/
H A Dmdp4_lvds_pll.c37 unsigned long rate; member in struct:pll_rate
59 static const struct pll_rate *find_rate(unsigned long rate) argument
63 if (rate > freqtbl[i].rate)
75 DBG("pixclk=%lu (%lu)", lvds_pll->pixclk, pll_rate->rate);
112 static long mpd4_lvds_pll_round_rate(struct clk_hw *hw, unsigned long rate, argument
115 const struct pll_rate *pll_rate = find_rate(rate);
116 return pll_rate->rate;
119 static int mpd4_lvds_pll_set_rate(struct clk_hw *hw, unsigned long rate, argument
123 lvds_pll->pixclk = rate;
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