Searched refs:rd_reg32 (Results 1 - 4 of 4) sorted by relevance

/drivers/crypto/caam/
H A Dctrl.c93 while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
102 while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) &&
128 deco_dbg_reg = rd_reg32(&deco->desc_dbg);
139 *status = rd_reg32(&deco->op_status_hi) &
213 rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_IFMASK;
341 val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK)
349 val = rd_reg32(&r4tst->rtsdctl);
358 val = rd_reg32(&r4tst->rtmctl);
423 comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
458 scfgr = rd_reg32(
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H A Djr.c38 while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
42 if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
51 while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
135 irqstate = rd_reg32(&jrp->rregs->jrintstatus);
172 while (rd_reg32(&jrp->rregs->outring_used)) {
341 if (!rd_reg32(&jrp->rregs->inpring_avail) ||
H A Dregs.h70 #define rd_reg32(reg) in_be32(reg) macro
78 #define rd_reg32(reg) __raw_readl(reg) macro
96 return (((u64)rd_reg32((u32 __iomem *)reg)) << 32) |
97 ((u64)rd_reg32((u32 __iomem *)reg + 1));
109 return (((u64)rd_reg32((u32 __iomem *)reg + 1)) << 32) |
110 ((u64)rd_reg32((u32 __iomem *)reg));
/drivers/tty/
H A Dsynclink_gt.c436 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr);
2216 unsigned int status = rd_reg32(info, RDCSR);
2242 unsigned int status = rd_reg32(info, TDCSR);
2376 while((gsr = rd_reg32(info, GSR) & 0xffffff00)) {
2397 while ((changed = rd_reg32(info, IOSR)) != 0) {
2400 state = rd_reg32(info, IOVR);
2993 data = rd_reg32(info, IODR);
2999 data = rd_reg32(info, IOVR);
3017 gpio.state = rd_reg32(info, IOVR);
3019 gpio.dir = rd_reg32(inf
3890 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr) function
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