Searched refs:timer (Results 1 - 25 of 899) sorted by relevance

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/drivers/gpu/drm/nouveau/core/subdev/timer/
H A Dpriv.h4 #include <subdev/timer.h>
/drivers/clocksource/
H A Dzevio-timer.c2 * linux/drivers/clocksource/zevio-timer.c
69 struct zevio_timer *timer = container_of(dev, struct zevio_timer, local
72 writel(delta, timer->timer1 + IO_CURRENT_VAL);
74 timer->timer1 + IO_CONTROL);
82 struct zevio_timer *timer = container_of(dev, struct zevio_timer, local
88 /* Enable timer interrupts */
89 writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK);
90 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
94 /* Disable timer interrupts */
95 writel(0, timer
109 struct zevio_timer *timer = dev_id; local
127 struct zevio_timer *timer; local
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H A Dbcm2835_timer.c75 struct bcm2835_timer *timer = container_of(evt_dev, local
78 timer->compare);
84 struct bcm2835_timer *timer = dev_id; local
86 if (readl_relaxed(timer->control) & timer->match_mask) {
87 writel_relaxed(timer->match_mask, timer->control);
89 event_handler = ACCESS_ONCE(timer->evt.event_handler);
91 event_handler(&timer->evt);
103 struct bcm2835_timer *timer; local
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H A Ddw_apb_timer.c52 static unsigned long apbt_readl(struct dw_apb_timer *timer, unsigned long offs) argument
54 return readl(timer->base + offs);
57 static void apbt_writel(struct dw_apb_timer *timer, unsigned long val, argument
60 writel(val, timer->base + offs);
63 static void apbt_disable_int(struct dw_apb_timer *timer) argument
65 unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL);
68 apbt_writel(timer, ctrl, APBTMR_N_CONTROL);
78 disable_irq(dw_ced->timer.irq);
79 apbt_disable_int(&dw_ced->timer);
82 static void apbt_eoi(struct dw_apb_timer *timer) argument
104 apbt_enable_int(struct dw_apb_timer *timer) argument
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H A Dcs5535-clockevt.c63 static void disable_timer(struct cs5535_mfgpt_timer *timer) argument
66 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP,
71 static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta) argument
73 cs5535_mfgpt_write(timer, MFGPT_REG_CMP2, delta);
74 cs5535_mfgpt_write(timer, MFGPT_REG_COUNTER, 0);
76 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP,
140 struct cs5535_mfgpt_timer *timer; local
144 timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
145 if (!timer) {
146 printk(KERN_ERR DRV_NAME ": Could not allocate MFGPT timer\
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H A DMakefile2 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
20 obj-$(CONFIG_ARCH_CLPS711X) += clps711x-timer.o
21 obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
25 obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
26 obj-$(CONFIG_ARCH_U300) += timer-u300.o
28 obj-$(CONFIG_SUN5I_HSTIMER) += timer-sun5i.o
32 obj-$(CONFIG_ARCH_NSPIRE) += zevio-timer.o
40 obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
47 obj-$(CONFIG_ARCH_KEYSTONE) += timer-keystone.o
H A Dmtk_timer.c68 static void mtk_clkevt_time_stop(struct mtk_clock_event_device *evt, u8 timer) argument
72 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
74 TIMER_CTRL_REG(timer));
78 unsigned long delay, u8 timer)
80 writel(delay, evt->gpt_base + TIMER_CMP_REG(timer));
84 bool periodic, u8 timer)
89 writel(GPT_IRQ_ACK(timer), evt->gpt_base + GPT_IRQ_ACK_REG);
91 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
93 /* Clear 2 bit timer operation mode field */
102 evt->gpt_base + TIMER_CTRL_REG(timer));
77 mtk_clkevt_time_setup(struct mtk_clock_event_device *evt, unsigned long delay, u8 timer) argument
83 mtk_clkevt_time_start(struct mtk_clock_event_device *evt, bool periodic, u8 timer) argument
160 mtk_timer_setup(struct mtk_clock_event_device *evt, u8 timer, u8 option) argument
174 mtk_timer_enable_irq(struct mtk_clock_event_device *evt, u8 timer) argument
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H A Dtimer-keystone.c21 #define TIMER_NAME "timer-keystone"
41 * struct keystone_timer: holds timer's data
42 * @base: timer memory base address
44 * @event_dev: event device based on timer
50 } timer; variable in typeref:struct:keystone_timer
54 return readl_relaxed(timer.base + rg);
59 writel_relaxed(val, timer.base + rg);
74 * keystone_timer_config: configures timer to work in oneshot/periodic modes.
98 /* disable timer */
100 /* here we have to be sure the timer ha
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H A Dcadence_ttc_timer.c6 * based on arch/mips/kernel/time.c timer driver
34 * The input frequency to the timer module for emulation is 2.5MHz which is
35 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
38 * The input frequency to the timer module in silicon is configurable and
72 * struct ttc_timer - This definition defines local timer structure
74 * @base_addr: Base address of timer
110 * ttc_set_interval - Set the timer interval value
112 * @timer: Pointer to the timer instance
115 static void ttc_set_interval(struct ttc_timer *timer, argument
147 struct ttc_timer *timer = &ttce->ttc; local
164 struct ttc_timer *timer = &to_ttc_timer_clksrc(cs)->ttc; local
187 struct ttc_timer *timer = &ttce->ttc; local
203 struct ttc_timer *timer = &ttce->ttc; local
465 ttc_timer_init(struct device_node *timer) argument
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H A Dmeson6_timer.c2 * Amlogic Meson6 SoCs timer handling.
46 static void meson6_clkevt_time_stop(unsigned char timer) argument
50 writel(val & ~TIMER_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX);
53 static void meson6_clkevt_time_setup(unsigned char timer, unsigned long delay) argument
55 writel(delay, timer_base + TIMER_ISA_VAL(timer));
58 static void meson6_clkevt_time_start(unsigned char timer, bool periodic) argument
63 val |= TIMER_PERIODIC_BIT(timer);
65 val &= ~TIMER_PERIODIC_BIT(timer);
67 writel(val | TIMER_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX);
130 timer_base = of_io_request_and_map(node, 0, "meson6-timer");
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/drivers/staging/lustre/lnet/selftest/
H A Dtimer.h34 * lnet/selftest/timer.h
48 void stt_add_timer (stt_timer_t *timer);
49 int stt_del_timer (stt_timer_t *timer);
H A Dtimer.c36 * lnet/selftest/timer.c
71 stt_add_timer(stt_timer_t *timer) argument
79 LASSERT(timer->stt_func != NULL);
80 LASSERT(list_empty(&timer->stt_list));
81 LASSERT(cfs_time_after(timer->stt_expires, get_seconds()));
84 list_for_each_prev(pos, STTIMER_SLOT(timer->stt_expires)) {
87 if (cfs_time_aftereq(timer->stt_expires, old->stt_expires))
90 list_add(&timer->stt_list, pos);
96 * The function returns whether it has deactivated a pending timer or not.
97 * (ie. del_timer() of an inactive timer return
105 stt_del_timer(stt_timer_t *timer) argument
128 stt_timer_t *timer; local
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H A DMakefile3 lnet_selftest-y := console.o conrpc.o conctl.o framework.o timer.o rpc.o \
/drivers/misc/
H A Dcs5535-mfgpt.c47 int cs5535_mfgpt_toggle_event(struct cs5535_mfgpt_timer *timer, int cmp, argument
53 if (!timer) {
70 mask = 1 << (timer->nr + 24);
75 mask = 1 << (timer->nr + shift);
80 mask = 1 << (timer->nr + shift);
99 int cs5535_mfgpt_set_irq(struct cs5535_mfgpt_timer *timer, int cmp, int *irq, argument
105 if (!timer) {
112 * is using the same CMP of the timer's Siamese twin, the IRQ is set to
119 shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4;
137 if (cs5535_mfgpt_toggle_event(timer, cm
151 struct cs5535_mfgpt_timer *timer = NULL; local
214 cs5535_mfgpt_free_timer(struct cs5535_mfgpt_timer *timer) argument
231 cs5535_mfgpt_read(struct cs5535_mfgpt_timer *timer, uint16_t reg) argument
237 cs5535_mfgpt_write(struct cs5535_mfgpt_timer *timer, uint16_t reg, uint16_t value) argument
292 struct cs5535_mfgpt_timer timer = { .chip = mfgpt }; local
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/drivers/staging/iio/trigger/
H A DMakefile6 obj-$(CONFIG_IIO_BFIN_TMR_TRIGGER) += iio-trig-bfin-timer.o
/drivers/isdn/mISDN/
H A Dtimerdev.c3 * general timer device for using in ISDN stacks
23 #include <linux/timer.h>
75 struct mISDNtimer *timer, *next; local
82 timer = list_first_entry(list, struct mISDNtimer, list);
84 del_timer_sync(&timer->tl);
87 list_del(&timer->list);
88 kfree(timer);
92 list_for_each_entry_safe(timer, next, &dev->expired, list) {
93 kfree(timer);
104 struct mISDNtimer *timer; local
165 struct mISDNtimer *timer = (void *)data; local
179 struct mISDNtimer *timer; local
206 struct mISDNtimer *timer; local
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/drivers/net/fddi/skfp/
H A Dsmttimer.c18 SMT timer
39 void smt_timer_stop(struct s_smc *smc, struct smt_timer *timer) argument
45 * remove timer from queue
47 timer->tm_active = FALSE ;
48 if (smc->t.st_queue == timer && !timer->tm_next) {
52 if (tm == timer) {
62 void smt_timer_start(struct s_smc *smc, struct smt_timer *timer, u_long time, argument
72 smt_timer_stop(smc,timer) ;
73 timer
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/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/
H A Dtest.fuc53 call(timer)
62 call(timer)
/drivers/pcmcia/
H A Dbcm63xx_pcmcia.h5 #include <linux/timer.h>
48 /* timer used for socket status polling */
49 struct timer_list timer; member in struct:bcm63xx_pcmcia_socket
/drivers/s390/cio/
H A Deadm_sch.h6 #include <linux/timer.h>
15 struct timer_list timer; member in struct:eadm_private
/drivers/isdn/sc/
H A DMakefile10 ioctl.o interrupt.o message.o timer.o
/drivers/staging/line6/
H A Dtoneport.h44 struct timer_list timer; member in struct:usb_line6_toneport
/drivers/staging/android/
H A Dtimed_gpio.c30 struct hrtimer timer; member in struct:timed_gpio_data
37 static enum hrtimer_restart gpio_timer_func(struct hrtimer *timer) argument
40 container_of(timer, struct timed_gpio_data, timer);
53 if (!hrtimer_active(&data->timer))
56 t = ktime_to_timeval(hrtimer_get_remaining(&data->timer));
69 /* cancel previous timer and set GPIO according to value */
70 hrtimer_cancel(&data->timer);
77 hrtimer_start(&data->timer,
105 hrtimer_init(&gpio_dat->timer, CLOCK_MONOTONI
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/drivers/leds/trigger/
H A Dledtrig-heartbeat.c6 * Based on Richard Purdie's ledtrig-timer.c and some arch's
18 #include <linux/timer.h>
29 struct timer_list timer; member in struct:heartbeat_trig_data
78 mod_timer(&heartbeat_data->timer, jiffies + delay);
90 setup_timer(&heartbeat_data->timer,
93 led_heartbeat_function(heartbeat_data->timer.data);
102 del_timer_sync(&heartbeat_data->timer);
/drivers/watchdog/
H A Dep93xx_wdt.c32 #include <linux/timer.h>
51 static struct timer_list timer; variable in typeref:struct:timer_list
65 /* Re-set the timer interval */
66 mod_timer(&timer, jiffies + WDT_INTERVAL);
74 mod_timer(&timer, jiffies + WDT_INTERVAL);
81 del_timer_sync(&timer);
138 setup_timer(&timer, ep93xx_wdt_timer_ping, 1);

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