Searched defs:INT (Results 1 - 4 of 4) sorted by last modified time

/drivers/staging/bcm/
H A DTypedefs.h14 typedef int INT; typedef
/drivers/staging/comedi/drivers/
H A Dcb_pcidas.c94 #define INT 0x80 /* int status / clear */ macro
1000 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL,
1379 outw(devpriv->adc_fifo_bits | INT,
1399 outw(devpriv->adc_fifo_bits | INT,
H A Ddas1800.c157 #define INT 0x1 macro
709 if (!(status & INT)) {
713 /* clear the interrupt status bit INT */
714 outb(CLEAR_INTR_MASK & ~INT, dev->iobase + DAS1800_STATUS);
/drivers/clk/tegra/
H A Dclk-tegra-periph.c158 #define INT(_name, _parents, _offset, \ macro
405 INT("vde", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VDE, 61, 0, tegra_clk_vde),
406 INT("vi", mux_pllm_pllc_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi),
407 INT("epp", mux_pllm_pllc_pllp_plla, CLK_SOURCE_EPP, 19, 0, tegra_clk_epp),
408 INT("host1x", mux_pllm_pllc_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x),
409 INT("mpe", mux_pllm_pllc_pllp_plla, CLK_SOURCE_MPE, 60, 0, tegra_clk_mpe),
410 INT("2d", mux_pllm_pllc_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d),
411 INT("3d", mux_pllm_pllc_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d),

Completed in 193 milliseconds