Searched defs:iobase (Results 1 - 25 of 112) sorted by path

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/drivers/ata/
H A Dpata_hpt37x.c831 unsigned long iobase = pci_resource_start(dev, 4); local
936 outb(0x0e, iobase + 0x9c);
949 freq = inl(iobase + 0x90);
H A Dpata_hpt3x2n.c414 unsigned long iobase = pci_resource_start(pdev, 4); local
416 fcnt = inl(iobase + 0x90); /* Not PCI readable for some chips */
498 unsigned long iobase = pci_resource_start(dev, 4); local
600 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c);
H A Dpata_rb532_cf.c50 void __iomem *iobase; member in struct:rb532_cf_info
95 ap->ioaddr.cmd_addr = info->iobase + RB500_CF_REG_BASE;
96 ap->ioaddr.ctl_addr = info->iobase + RB500_CF_REG_CTRL;
97 ap->ioaddr.altstatus_addr = info->iobase + RB500_CF_REG_CTRL;
101 ap->ioaddr.data_addr = info->iobase + RB500_CF_REG_DBUF32;
102 ap->ioaddr.error_addr = info->iobase + RB500_CF_REG_ERR;
153 info->iobase = devm_ioremap_nocache(&pdev->dev, res->start,
155 if (!info->iobase)
/drivers/atm/
H A Dambassador.h630 u32 iobase; member in struct:amb_dev
H A Dhorizon.c371 outl (cpu_to_le32 (data), dev->iobase + reg);
375 return le32_to_cpu (inl (dev->iobase + reg));
379 outw (cpu_to_le16 (data), dev->iobase + reg);
383 return le16_to_cpu (inw (dev->iobase + reg));
387 outsb (dev->iobase + reg, addr, len);
391 insb (dev->iobase + reg, addr, len);
2692 u32 iobase = pci_resource_start (pci_dev, 0); local
2703 if (!request_region(iobase, HRZ_IO_EXTENT, DEV_LABEL)) {
2731 iobase, irq, membase);
2761 dev->iobase
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H A Dhorizon.h408 u32 iobase; member in struct:hrz_dev
/drivers/bluetooth/
H A Dbluecard_cs.c161 unsigned int iobase = info->p_dev->resource[0]->start; local
168 outb(0x08 | 0x20, iobase + 0x30);
171 outb(0x00, iobase + 0x30);
178 unsigned int iobase = info->p_dev->resource[0]->start; local
185 outb(0x10 | 0x40, iobase + 0x30);
191 outb(0x08 | 0x20, iobase + 0x30);
203 static int bluecard_write(unsigned int iobase, unsigned int offset, __u8 *buf, int len) argument
209 outb_p(actual, iobase + offset);
212 outb_p(buf[i], iobase + offset + i + 1);
234 unsigned int iobase local
343 bluecard_read(unsigned int iobase, unsigned int offset, __u8 *buf, int size) argument
374 unsigned int iobase; local
502 unsigned int iobase; local
635 unsigned int iobase = info->p_dev->resource[0]->start; local
655 unsigned int iobase = info->p_dev->resource[0]->start; local
697 unsigned int iobase = info->p_dev->resource[0]->start; local
812 unsigned int iobase = info->p_dev->resource[0]->start; local
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H A Dbt3c_cs.c116 static inline void bt3c_address(unsigned int iobase, unsigned short addr) argument
118 outb(addr & 0xff, iobase + ADDR_L);
119 outb((addr >> 8) & 0xff, iobase + ADDR_H);
123 static inline void bt3c_put(unsigned int iobase, unsigned short value) argument
125 outb(value & 0xff, iobase + DATA_L);
126 outb((value >> 8) & 0xff, iobase + DATA_H);
130 static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value) argument
132 bt3c_address(iobase, addr);
133 bt3c_put(iobase, value);
137 static inline unsigned short bt3c_get(unsigned int iobase) argument
147 bt3c_read(unsigned int iobase, unsigned short addr) argument
159 bt3c_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) argument
189 unsigned int iobase = info->p_dev->resource[0]->start; local
219 unsigned int iobase; local
340 unsigned int iobase; local
460 unsigned int iobase, size, addr, fcs, tmp; local
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H A Dbtuart_cs.c111 static int btuart_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) argument
116 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE))
122 outb(buf[actual], iobase + UART_TX);
143 unsigned int iobase = info->p_dev->resource[0]->start; local
157 len = btuart_write(iobase, 16, skb->data, skb->len);
177 unsigned int iobase; local
185 iobase = info->p_dev->resource[0]->start;
203 bt_cb(info->rx_skb)->pkt_type = inb(iobase + UART_RX);
236 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX);
283 } while (inb(iobase
290 unsigned int iobase; local
347 unsigned int iobase; local
462 unsigned int iobase = info->p_dev->resource[0]->start; local
528 unsigned int iobase = info->p_dev->resource[0]->start; local
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H A Ddtl1_cs.c110 static int dtl1_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) argument
115 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE))
121 outb(buf[actual], iobase + UART_TX);
147 unsigned int iobase = info->p_dev->resource[0]->start; local
161 len = dtl1_write(iobase, 32, skb->data, skb->len);
204 unsigned int iobase; local
213 iobase = info->p_dev->resource[0]->start;
229 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX);
284 } while (inb(iobase + UART_LSR) & UART_LSR_DR);
291 unsigned int iobase; local
442 unsigned int iobase = info->p_dev->resource[0]->start; local
511 unsigned int iobase = info->p_dev->resource[0]->start; local
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/drivers/char/pcmcia/
H A Dcm4000_cs.c304 static unsigned short io_read_num_rec_bytes(unsigned int iobase, argument
312 tmp = inb(REG_NUM_BYTES(iobase)) |
313 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0);
423 unsigned int iobase = dev->p_dev->resource[0]->start; local
429 xoutb(dev->flags1, REG_FLAGS1(iobase));
433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase));
444 xoutb(stopbits, REG_STOPBITS(iobase));
456 unsigned int iobase = dev->p_dev->resource[0]->start; local
492 xoutb(0x80, REG_FLAGS0(iobase));
499 xoutb(dev->flags1, REG_FLAGS1(iobase));
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H A Dcm4040_cs.c141 int iobase = dev->p_dev->resource[0]->start; local
144 if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
171 int iobase = dev->p_dev->resource[0]->start; local
178 xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
189 int iobase = dev->p_dev->resource[0]->start; local
192 if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
219 int iobase = dev->p_dev->resource[0]->start; local
252 dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
279 dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
311 uc = xinb(iobase
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/drivers/char/tpm/
H A Dtpm.h67 void __iomem *iobase; /* ioremapped address */ member in struct:tpm_vendor_specific
H A Dtpm_atmel.c50 status = ioread8(chip->vendor.iobase + 1);
55 *buf++ = ioread8(chip->vendor.iobase);
66 status = ioread8(chip->vendor.iobase + 1);
77 status = ioread8(chip->vendor.iobase + 1);
82 *buf++ = ioread8(chip->vendor.iobase);
86 status = ioread8(chip->vendor.iobase + 1);
103 iowrite8(buf[i], chip->vendor.iobase);
111 iowrite8(ATML_STATUS_ABORT, chip->vendor.iobase + 1);
116 return ioread8(chip->vendor.iobase + 1);
144 atmel_put_base_addr(chip->vendor.iobase);
163 void __iomem *iobase = NULL; local
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H A Dtpm_atmel.h29 #define atmel_getb(chip, offset) readb(chip->vendor->iobase + offset);
30 #define atmel_putb(val, chip, offset) writeb(val, chip->vendor->iobase + offset)
34 static inline void atmel_put_base_addr(void __iomem *iobase) argument
36 iounmap(iobase);
111 static inline void atmel_put_base_addr(void __iomem *iobase) argument
/drivers/clk/ti/
H A Dclk-dra7-atl.c58 void __iomem *iobase; member in struct:dra7_atl_clock_info
68 __raw_writel(val, cinfo->iobase + reg);
73 return __raw_readl(cinfo->iobase + reg);
229 cinfo->iobase = of_iomap(node, 0);
/drivers/clocksource/
H A Ddw_apb_timer_of.c64 void __iomem *iobase; local
72 timer_get_base_and_rate(event_timer, &iobase, &rate);
74 ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
87 void __iomem *iobase; local
91 timer_get_base_and_rate(source_timer, &iobase, &rate);
93 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
105 sched_io_base = iobase + 0x04;
/drivers/dma/ioat/
H A Ddca.c125 void __iomem *iobase; member in struct:ioat_dca_priv
246 struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase) argument
285 version = readb(iobase + IOAT_VER_OFFSET);
299 ioatdca->dca_base = iobase + 0x54;
341 ioatdca->iobase + global_req_table + (i * 4));
366 writel(0, ioatdca->iobase + global_req_table + (i * 4));
394 static int ioat2_dca_count_dca_slots(void __iomem *iobase, u16 dca_offset) argument
400 global_req_table = readw(iobase + dca_offset + IOAT_DCA_GREQID_OFFSET);
404 req = readl(iobase + global_req_table + (slots * sizeof(u32)));
411 struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase) argument
590 ioat3_dca_count_dca_slots(void *iobase, u16 dca_offset) argument
625 ioat3_dca_init(struct pci_dev *pdev, void __iomem *iobase) argument
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H A Dpci.c138 alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase) argument
146 d->reg_base = iobase;
/drivers/hwmon/
H A Dpc87427.c186 int iobase = data->address[LD_FAN]; local
188 outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
189 data->fan[nr] = inw(iobase + PC87427_REG_FAN);
190 data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN);
191 data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS);
193 outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS);
241 int iobase = data->address[LD_FAN]; local
243 outb(BANK_FC(nr), iobase + PC87427_REG_BANK);
244 data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE);
245 data->pwm[nr] = inb(iobase
305 int iobase = data->address[LD_TEMP]; local
431 int iobase = data->address[LD_FAN]; local
565 int iobase = data->address[LD_FAN]; local
620 int iobase = data->address[LD_FAN]; local
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/drivers/i2c/busses/
H A Di2c-nforce2.c336 u16 iobase; local
338 if (pci_read_config_word(dev, alt_reg, &iobase)
345 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
H A Di2c-pmcmsp.c112 void __iomem *iobase; /* iomapped base for IO */ member in struct:pmcmsptwi_data
186 data->iobase + MSP_TWI_SF_CLK_REG_OFFSET);
188 data->iobase + MSP_TWI_HS_CLK_REG_OFFSET);
200 data->iobase + MSP_TWI_CFG_REG_OFFSET), cfg);
212 data->iobase + MSP_TWI_CFG_REG_OFFSET);
251 u32 reason = pmcmsptwi_readl(data->iobase +
253 pmcmsptwi_writel(reason, data->iobase + MSP_TWI_INT_STS_REG_OFFSET);
291 pmcmsptwi_data.iobase = ioremap_nocache(res->start,
293 if (!pmcmsptwi_data.iobase) {
315 pmcmsptwi_data.iobase
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H A Di2c-pxa.c153 unsigned long iobase; member in struct:pxa_i2c
1198 i2c->iobase = res->start;
1288 release_mem_region(i2c->iobase, i2c->iosize);
H A Di2c-sh7760.c82 void __iomem *iobase; member in struct:cami2c
104 __raw_writel(val, (unsigned long)cam->iobase + reg);
109 return __raw_readl((unsigned long)cam->iobase + reg);
467 id->iobase = ioremap(res->start, REGSIZE);
468 if (!id->iobase) {
528 iounmap(id->iobase);
544 iounmap(id->iobase);
H A Di2c-xlr.c68 u32 __iomem *iobase; member in struct:xlr_i2c_private
81 xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset);
82 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
83 xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, XLR_I2C_CFG_ADDR);
84 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
92 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR,
95 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos]);
96 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR,
102 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
108 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOU
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