/drivers/video/fbdev/aty/ |
H A D | radeon_base.c | 239 u16 reg; member in struct:__anon7088 1362 OUTREG(common_regs[i].reg, common_regs[i].val);
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H A D | radeon_pm.c | 779 u32 reg; local 781 reg = INREG(BUS_CNTL1); 783 reg &= ~BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK; 784 reg |= BUS_CNTL1_AGPCLK_VALID | (1<<BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT); 786 reg |= 0x4080; 788 OUTREG(BUS_CNTL1, reg); 790 reg = INPLL(PLL_PWRMGT_CNTL); 791 reg |= PLL_PWRMGT_CNTL_SPLL_TURNOFF | PLL_PWRMGT_CNTL_PPLL_TURNOFF | 793 reg &= ~PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK; 794 reg [all...] |
/drivers/video/fbdev/ |
H A D | bfin-lq035q1-fb.c | 122 static int lq035q1_control(struct spi_device *spi, unsigned char reg, unsigned short value) argument 131 regs[2] = reg;
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H A D | bfin_adv7393fb.c | 252 static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value) argument 254 return i2c_smbus_write_byte_data(client, reg, value); 257 static inline int adv7393_read(struct i2c_client *client, u8 reg) argument 259 return i2c_smbus_read_byte_data(client, reg); 267 u8 reg; local 270 reg = *data++; 271 ret = adv7393_write(client, reg, *data++);
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H A D | bfin_adv7393fb.h | 312 static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value); 313 static inline int adv7393_read(struct i2c_client *client, u8 reg);
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H A D | broadsheetfb.c | 258 static void broadsheet_gpio_write_reg(struct broadsheetfb_par *par, u16 reg, argument 271 broadsheet_gpio_issue_data(par, reg); 277 static void broadsheet_mmio_write_reg(struct broadsheetfb_par *par, u16 reg, argument 281 par->board->mmio_write(par, BS_MMIO_DATA, reg); 286 static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg, argument 290 broadsheet_mmio_write_reg(par, reg, data); 292 broadsheet_gpio_write_reg(par, reg, data); 295 static void broadsheet_write_reg32(struct broadsheetfb_par *par, u16 reg, argument 298 broadsheet_write_reg(par, reg, cpu_to_le32(data) & 0xFFFF); 299 broadsheet_write_reg(par, reg 303 broadsheet_read_reg(struct broadsheetfb_par *par, u16 reg) argument 363 broadsheet_spiflash_wait_for_bit(struct broadsheetfb_par *par, u16 reg, int bitnum, int val, int timeout) argument [all...] |
H A D | cirrusfb.c | 1000 /* hidden dac reg: 1280x1024 */ 1073 /* hidden dac reg: 1280x1024 */ 1135 WHDR(cinfo, 0xa0); /* hidden dac reg: nothing special */ 1189 /* hidden dac reg: 8-8-8 mode (24 or 32) */ 1647 /* Overscan color reg.: reg. 0 */ 2821 unsigned reg; local 2828 reg = va_arg(list, int); 2832 val = vga_rcrt(regbase, (unsigned char) reg); 2835 val = vga_rseq(regbase, (unsigned char) reg); [all...] |
H A D | cyber2000fb.c | 114 #define cyber2000fb_writel(val, reg, cfb) writel(val, (cfb)->regs + (reg)) 115 #define cyber2000fb_writew(val, reg, cfb) writew(val, (cfb)->regs + (reg)) 116 #define cyber2000fb_writeb(val, reg, cfb) writeb(val, (cfb)->regs + (reg)) 118 #define cyber2000fb_readb(reg, cfb) readb((cfb)->regs + (reg)) 121 cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb) argument 123 cyber2000fb_writew((reg 127 cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb) argument 133 cyber2000_grphr(unsigned int reg, struct cfb_info *cfb) argument 140 cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb) argument 149 cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb) argument 1182 unsigned char reg; local 1197 unsigned char reg; local [all...] |
H A D | da8xx-fb.c | 269 u32 reg; local 283 reg = lcdc_read(LCD_RASTER_CTRL_REG); 284 if (!(reg & LCD_RASTER_ENABLE)) 285 lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); 291 u32 reg; local 294 reg = lcdc_read(LCD_RASTER_CTRL_REG); 295 if (reg & LCD_RASTER_ENABLE) 296 lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); 320 /* init reg to clear PLM (loading mode) fields */ 377 u32 reg; local 408 u32 reg; local 420 u32 reg; local 447 u32 reg; local 459 u32 reg; local 527 u32 reg; local [all...] |
H A D | ep93xx-fb.c | 142 unsigned int val, unsigned int reg) 149 ep93xxfb_writel(fbi, val, reg); 141 ep93xxfb_out_locked(struct ep93xx_fbi *fbi, unsigned int val, unsigned int reg) argument
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H A D | fsl-diu-fb.c | 489 void wr_reg_wa(u32 *reg, u32 val) argument 492 out_be32(reg, val); 493 } while (in_be32(reg) != val);
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H A D | gxt4500.c | 140 #define readreg(par, reg) readl((par)->regs + (reg)) 141 #define writereg(par, reg, val) writel((val), (par)->regs + (reg)) 510 static int gxt4500_setcolreg(unsigned int reg, unsigned int red, argument 517 if (reg > 1023) 521 writereg(par, CMAP + reg * 4, cmap_entry); 523 if (reg < 16 && par->pixfmt != DFA_PIX_8BIT) { 525 u32 val = reg; 528 val |= (reg << 1 [all...] |
H A D | hgafb.c | 144 static void write_hga_b(unsigned int val, unsigned char reg) argument 146 outb_p(reg, HGA_INDEX_PORT); 150 static void write_hga_w(unsigned int val, unsigned char reg) argument 152 outb_p(reg, HGA_INDEX_PORT); outb_p(val >> 8, HGA_VALUE_PORT); 153 outb_p(reg+1, HGA_INDEX_PORT); outb_p(val & 0xff, HGA_VALUE_PORT); 156 static int test_hga_b(unsigned char val, unsigned char reg) argument 158 outb_p(reg, HGA_INDEX_PORT);
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H A D | i740fb.c | 111 static inline void i740outreg(struct i740fb_par *par, u16 port, u8 reg, u8 val) argument 113 vga_mm_w_fast(par->regs, port, reg, val); 115 static inline u8 i740inreg(struct i740fb_par *par, u16 port, u8 reg) argument 117 vga_mm_w(par->regs, port, reg); 120 static inline void i740outreg_mask(struct i740fb_par *par, u16 port, u8 reg, argument 123 vga_mm_w_fast(par->regs, port, reg, (val & mask) 124 | (i740inreg(par, port, reg) & ~mask));
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H A D | igafb.c | 174 #define pci_inb(par, reg) readb(par->io_base+(reg)) 175 #define pci_outb(par, val, reg) writeb(val, par->io_base+(reg)) 177 static inline unsigned int iga_inb(struct iga_par *par, unsigned int reg, argument 180 pci_outb(par, idx, reg); 181 return pci_inb(par, reg + 1); 185 unsigned int reg, unsigned int idx ) 187 pci_outb(par, idx, reg); 188 pci_outb(par, val, reg 184 iga_outb(struct iga_par *par, unsigned char val, unsigned int reg, unsigned int idx ) argument [all...] |
H A D | imsttfb.c | 1273 __u32 reg[2]; local 1278 if (copy_from_user(reg, argp, 8) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0])) 1280 write_reg_le32(par->dc_regs, reg[0], reg[1]); 1283 if (copy_from_user(reg, argp, 4) || reg[0] > (0x1000 - sizeof(reg[ [all...] |
/drivers/video/fbdev/exynos/ |
H A D | exynos_mipi_dsi_lowlevel.c | 34 unsigned int reg; local 36 reg = readl(dsim->reg_base + EXYNOS_DSIM_SWRST); 38 reg |= DSIM_FUNCRST; 40 writel(reg, dsim->reg_base + EXYNOS_DSIM_SWRST); 45 unsigned int reg; local 47 reg = readl(dsim->reg_base + EXYNOS_DSIM_SWRST); 49 reg |= DSIM_SWRST; 51 writel(reg, dsim->reg_base + EXYNOS_DSIM_SWRST); 56 unsigned int reg; local 58 reg 73 unsigned int reg; local 83 unsigned int reg = 0; local 96 unsigned int reg; local 119 unsigned int reg; local 134 unsigned int reg; local 151 unsigned int reg; local 167 unsigned int reg; local 180 unsigned int reg; local 194 unsigned int reg; local 232 u32 reg = (readl(dsim->reg_base + EXYNOS_DSIM_CONFIG)) & local 256 unsigned int reg; local 283 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_PHYACCHR); local 298 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & local 309 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL); local 319 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & local 331 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & local 348 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & local 359 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & local 370 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & local 381 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & local 394 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL); local 408 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE)) & local 418 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_STATUS); local 437 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE)) & local 448 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_TIMEOUT)) & local 459 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_TIMEOUT)) & local 470 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE); local 483 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE); local 496 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & local 507 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_PHYACCHR1); local 518 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & local 528 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & local 544 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); local 554 unsigned int reg = 0; local 566 unsigned int reg; local 581 unsigned int reg = (data1 << 16) | (data0 << 8) | ((di & 0x3f) << 0); local 589 unsigned int reg = (data0 << 8) | (di << 0); local 601 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); local 608 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); local [all...] |
/drivers/video/fbdev/geode/ |
H A D | display_gx1.c | 27 static u8 gx1_read_conf_reg(u8 reg) argument 38 outb(reg, 0x22);
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H A D | gxfb.h | 302 static inline uint32_t read_gp(struct gxfb_par *par, int reg) argument 304 return readl(par->gp_regs + 4*reg); 307 static inline void write_gp(struct gxfb_par *par, int reg, uint32_t val) argument 309 writel(val, par->gp_regs + 4*reg); 312 static inline uint32_t read_dc(struct gxfb_par *par, int reg) argument 314 return readl(par->dc_regs + 4*reg); 317 static inline void write_dc(struct gxfb_par *par, int reg, uint32_t val) argument 319 writel(val, par->dc_regs + 4*reg); 322 static inline uint32_t read_vp(struct gxfb_par *par, int reg) argument 324 return readl(par->vid_regs + 8*reg); 327 write_vp(struct gxfb_par *par, int reg, uint32_t val) argument 332 read_fp(struct gxfb_par *par, int reg) argument 337 write_fp(struct gxfb_par *par, int reg, uint32_t val) argument [all...] |
H A D | lxfb.h | 385 static inline uint32_t read_gp(struct lxfb_par *par, int reg) argument 387 return readl(par->gp_regs + 4*reg); 390 static inline void write_gp(struct lxfb_par *par, int reg, uint32_t val) argument 392 writel(val, par->gp_regs + 4*reg); 395 static inline uint32_t read_dc(struct lxfb_par *par, int reg) argument 397 return readl(par->dc_regs + 4*reg); 400 static inline void write_dc(struct lxfb_par *par, int reg, uint32_t val) argument 402 writel(val, par->dc_regs + 4*reg); 405 static inline uint32_t read_vp(struct lxfb_par *par, int reg) argument 407 return readl(par->vp_regs + 8*reg); 410 write_vp(struct lxfb_par *par, int reg, uint32_t val) argument 415 read_fp(struct lxfb_par *par, int reg) argument 420 write_fp(struct lxfb_par *par, int reg, uint32_t val) argument [all...] |
/drivers/video/fbdev/i810/ |
H A D | i810_main.c | 211 u8 reg; local 214 reg = i810_readb(CR_DATA_CGA, mmio); 215 reg = (mode == OFF) ? reg & ~0x80 : 216 reg | 0x80; 219 i810_writeb(CR_DATA_CGA, mmio, reg); 1816 u8 reg; local 1829 pci_read_config_byte(par->dev, 0x50, ®); 1830 reg &= FREQ_MASK; 1831 par->mem_freq = (reg) [all...] |
/drivers/video/fbdev/intelfb/ |
H A D | intelfb.h | 249 u32 reg; member in struct:intelfb_i2c_chan
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H A D | intelfb_i2c.c | 60 OUTREG(chan->reg, (state ? SCL_VAL_OUT : 0) | 62 val = INREG(chan->reg); 71 OUTREG(chan->reg, (state ? SDA_VAL_OUT : 0) | 73 val = INREG(chan->reg); 82 OUTREG(chan->reg, SCL_DIR_MASK); 83 OUTREG(chan->reg, 0); 84 val = INREG(chan->reg); 94 OUTREG(chan->reg, SDA_DIR_MASK); 95 OUTREG(chan->reg, 0); 96 val = INREG(chan->reg); 100 intelfb_setup_i2c_bus(struct intelfb_info *dinfo, struct intelfb_i2c_chan *chan, const u32 reg, const char *name, int class) argument [all...] |
/drivers/video/fbdev/kyro/ |
H A D | STG4000Reg.h | 24 #define STG_WRITE_REG(reg,data) (writel(data,&pSTGReg->reg)) 25 #define STG_READ_REG(reg) (readl(&pSTGReg->reg)) 27 #define STG_WRITE_REG(reg,data) (pSTGReg->reg = data) 28 #define STG_READ_REG(reg) (pSTGReg->reg)
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/drivers/video/fbdev/matrox/ |
H A D | matroxfb_DAC1064.c | 612 int reg; local 621 case 0: reg = M1064_XPIXPLLAM; break; 622 case 1: reg = M1064_XPIXPLLBM; break; 623 default: reg = M1064_XPIXPLLCM; break; 625 outDAC1064(minfo, reg++, m); 626 outDAC1064(minfo, reg++, n); 627 outDAC1064(minfo, reg, p); 644 printk(KERN_ERR "matroxfb: Pixel PLL%c not locked after usual time\n", (reg-M1064_XPIXPLLAM-2)/4 + 'A'); 720 pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3 & ~0x00300C03); 723 if (((minfo->values.reg [all...] |