Searched refs:regno (Results 1 - 25 of 157) sorted by path

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/drivers/gpu/drm/ast/
H A Dast_fb.c274 u16 blue, int regno)
277 ast_crtc->lut_r[regno] = red >> 8;
278 ast_crtc->lut_g[regno] = green >> 8;
279 ast_crtc->lut_b[regno] = blue >> 8;
283 u16 *blue, int regno)
286 *red = ast_crtc->lut_r[regno] << 8;
287 *green = ast_crtc->lut_g[regno] << 8;
288 *blue = ast_crtc->lut_b[regno] << 8;
273 ast_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
282 ast_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/bochs/
H A Dbochs_fbdev.c170 u16 blue, int regno)
175 u16 *blue, int regno)
177 *red = regno;
178 *green = regno;
179 *blue = regno;
169 bochs_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
174 bochs_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/cirrus/
H A Dcirrus_drv.h185 u16 blue, int regno);
187 u16 *blue, int regno);
H A Dcirrus_mode.c412 u16 blue, int regno)
416 cirrus_crtc->lut_r[regno] = red;
417 cirrus_crtc->lut_g[regno] = green;
418 cirrus_crtc->lut_b[regno] = blue;
423 u16 *blue, int regno)
427 *red = cirrus_crtc->lut_r[regno];
428 *green = cirrus_crtc->lut_g[regno];
429 *blue = cirrus_crtc->lut_b[regno];
411 cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
422 cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/
H A Ddrm_fb_helper.c649 u16 blue, u16 regno, struct fb_info *info)
659 if (regno > 16)
673 palette[regno] = value;
685 pindex = regno;
688 pindex = regno << 3;
690 if (fb->depth == 16 && regno > 63)
692 if (fb->depth == 15 && regno > 31)
698 if (regno < 32) {
648 setcolreg(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, u16 regno, struct fb_info *info) argument
/drivers/gpu/drm/gma500/
H A Dframebuffer.c55 static int psbfb_setcolreg(unsigned regno, unsigned red, unsigned green, argument
66 if (regno > 255)
79 if (regno < 16) {
82 ((uint32_t *) info->pseudo_palette)[regno] = v;
86 ((uint32_t *) info->pseudo_palette)[regno] = v;
521 u16 blue, int regno)
525 gma_crtc->lut_r[regno] = red >> 8;
526 gma_crtc->lut_g[regno] = green >> 8;
527 gma_crtc->lut_b[regno] = blue >> 8;
531 u16 *green, u16 *blue, int regno)
520 psbfb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
530 psbfb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
[all...]
/drivers/gpu/drm/i915/
H A Dintel_fbdev.c266 u16 blue, int regno)
270 intel_crtc->lut_r[regno] = red >> 8;
271 intel_crtc->lut_g[regno] = green >> 8;
272 intel_crtc->lut_b[regno] = blue >> 8;
276 u16 *blue, int regno)
280 *red = intel_crtc->lut_r[regno] << 8;
281 *green = intel_crtc->lut_g[regno] << 8;
282 *blue = intel_crtc->lut_b[regno] << 8;
265 intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
275 intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/mgag200/
H A Dmgag200_drv.h239 u16 blue, int regno);
241 u16 *blue, int regno);
H A Dmgag200_mode.c1342 u16 blue, int regno)
1346 mga_crtc->lut_r[regno] = red >> 8;
1347 mga_crtc->lut_g[regno] = green >> 8;
1348 mga_crtc->lut_b[regno] = blue >> 8;
1353 u16 *blue, int regno)
1357 *red = (u16)mga_crtc->lut_r[regno] << 8;
1358 *green = (u16)mga_crtc->lut_g[regno] << 8;
1359 *blue = (u16)mga_crtc->lut_b[regno] << 8;
1341 mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
1352 mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/msm/
H A Dmsm_fbdev.c208 u16 red, u16 green, u16 blue, int regno)
214 u16 *red, u16 *green, u16 *blue, int regno)
207 msm_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
213 msm_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/nouveau/
H A Dnouveau_fbcon.c270 u16 blue, int regno)
274 nv_crtc->lut.r[regno] = red;
275 nv_crtc->lut.g[regno] = green;
276 nv_crtc->lut.b[regno] = blue;
280 u16 *blue, int regno)
284 *red = nv_crtc->lut.r[regno];
285 *green = nv_crtc->lut.g[regno];
286 *blue = nv_crtc->lut.b[regno];
269 nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
279 nouveau_fbcon_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
/drivers/gpu/drm/radeon/
H A Dradeon_display.c213 u16 blue, int regno)
217 radeon_crtc->lut_r[regno] = red >> 6;
218 radeon_crtc->lut_g[regno] = green >> 6;
219 radeon_crtc->lut_b[regno] = blue >> 6;
224 u16 *blue, int regno)
228 *red = radeon_crtc->lut_r[regno] << 6;
229 *green = radeon_crtc->lut_g[regno] << 6;
230 *blue = radeon_crtc->lut_b[regno] << 6;
212 radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, u16 blue, int regno) argument
223 radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, int regno) argument
H A Dradeon_mode.h863 u16 blue, int regno);
865 u16 *blue, int regno);
/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_fb.c68 static int vmw_fb_setcolreg(unsigned regno, unsigned red, unsigned green, argument
75 if (regno > 15) {
76 DRM_ERROR("Bad regno %u.\n", regno);
83 pal[regno] = ((red & 0xff00) << 8) |
/drivers/infiniband/hw/ipath/
H A Dipath_driver.c2213 * @regno: the register number to write
2220 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno, argument
2226 (regno == dd->ipath_kregs->kr_rcvhdraddr ||
2227 regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
2228 where = regno + port;
H A Dipath_kernel.h1113 * @regno: register number
1121 ipath_ureg regno, int port)
1126 return readl(regno + (u64 __iomem *)
1135 * @regno: register number
1142 ipath_ureg regno, u64 value, int port)
1148 writeq(value, &ubase[regno]);
1152 ipath_kreg regno)
1156 return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
1160 ipath_kreg regno)
1165 return readq(&dd->ipath_kregbase[regno]);
1120 ipath_read_ureg32(const struct ipath_devdata *dd, ipath_ureg regno, int port) argument
1141 ipath_write_ureg(const struct ipath_devdata *dd, ipath_ureg regno, u64 value, int port) argument
1151 ipath_read_kreg32(const struct ipath_devdata *dd, ipath_kreg regno) argument
1159 ipath_read_kreg64(const struct ipath_devdata *dd, ipath_kreg regno) argument
1168 ipath_write_kreg(const struct ipath_devdata *dd, ipath_kreg regno, u64 value) argument
1175 ipath_read_creg(const struct ipath_devdata *dd, ipath_sreg regno) argument
1186 ipath_read_creg32(const struct ipath_devdata *dd, ipath_sreg regno) argument
1196 ipath_write_creg(const struct ipath_devdata *dd, ipath_creg regno, u64 value) argument
[all...]
/drivers/infiniband/hw/qib/
H A Dqib_7220.h121 const u16 regno)
125 return readl((u32 __iomem *)&dd->kregbase[regno]);
129 const u16 regno)
134 return readq(&dd->kregbase[regno]);
138 const u16 regno, u64 value)
141 writeq(value, &dd->kregbase[regno]);
120 qib_read_kreg32(const struct qib_devdata *dd, const u16 regno) argument
128 qib_read_kreg64(const struct qib_devdata *dd, const u16 regno) argument
137 qib_write_kreg(const struct qib_devdata *dd, const u16 regno, u64 value) argument
H A Dqib_iba6120.c299 * @regno: register number
307 enum qib_ureg regno, int ctxt)
313 return readl(regno + (u64 __iomem *)
317 return readl(regno + (u64 __iomem *)
326 * @regno: register number
333 enum qib_ureg regno, u64 value, int ctxt)
347 writeq(value, &ubase[regno]);
351 const u16 regno)
355 return readl((u32 __iomem *)&dd->kregbase[regno]);
359 const u16 regno)
306 qib_read_ureg32(const struct qib_devdata *dd, enum qib_ureg regno, int ctxt) argument
332 qib_write_ureg(const struct qib_devdata *dd, enum qib_ureg regno, u64 value, int ctxt) argument
350 qib_read_kreg32(const struct qib_devdata *dd, const u16 regno) argument
358 qib_read_kreg64(const struct qib_devdata *dd, const u16 regno) argument
367 qib_write_kreg(const struct qib_devdata *dd, const u16 regno, u64 value) argument
381 qib_write_kreg_ctxt(const struct qib_devdata *dd, const u16 regno, unsigned ctxt, u64 value) argument
388 write_6120_creg(const struct qib_devdata *dd, u16 regno, u64 value) argument
395 read_6120_creg(const struct qib_devdata *dd, u16 regno) argument
402 read_6120_creg32(const struct qib_devdata *dd, u16 regno) argument
[all...]
H A Dqib_iba7220.c222 * @regno: register number
230 enum qib_ureg regno, int ctxt)
236 return readl(regno + (u64 __iomem *)
240 return readl(regno + (u64 __iomem *)
249 * @regno: register number
256 enum qib_ureg regno, u64 value, int ctxt)
271 writeq(value, &ubase[regno]);
277 * @regno: the register number to write
282 const u16 regno, unsigned ctxt,
285 qib_write_kreg(dd, regno
229 qib_read_ureg32(const struct qib_devdata *dd, enum qib_ureg regno, int ctxt) argument
255 qib_write_ureg(const struct qib_devdata *dd, enum qib_ureg regno, u64 value, int ctxt) argument
281 qib_write_kreg_ctxt(const struct qib_devdata *dd, const u16 regno, unsigned ctxt, u64 value) argument
288 write_7220_creg(const struct qib_devdata *dd, u16 regno, u64 value) argument
295 read_7220_creg(const struct qib_devdata *dd, u16 regno) argument
302 read_7220_creg32(const struct qib_devdata *dd, u16 regno) argument
[all...]
H A Dqib_iba7322.c693 u16 regno; member in struct:dca_reg_map
749 const u32 regno, u64 value);
767 * @regno: register number
775 enum qib_ureg regno, int ctxt)
779 return readl(regno + (u64 __iomem *)(
788 * @regno: register number
796 enum qib_ureg regno, int ctxt)
801 return readq(regno + (u64 __iomem *)(
810 * @regno: register number
817 enum qib_ureg regno, u6
774 qib_read_ureg32(const struct qib_devdata *dd, enum qib_ureg regno, int ctxt) argument
795 qib_read_ureg(const struct qib_devdata *dd, enum qib_ureg regno, int ctxt) argument
816 qib_write_ureg(const struct qib_devdata *dd, enum qib_ureg regno, u64 value, int ctxt) argument
834 qib_read_kreg32(const struct qib_devdata *dd, const u32 regno) argument
842 qib_read_kreg64(const struct qib_devdata *dd, const u32 regno) argument
850 qib_write_kreg(const struct qib_devdata *dd, const u32 regno, u64 value) argument
861 qib_read_kreg_port(const struct qib_pportdata *ppd, const u16 regno) argument
869 qib_write_kreg_port(const struct qib_pportdata *ppd, const u16 regno, u64 value) argument
884 qib_write_kreg_ctxt(const struct qib_devdata *dd, const u16 regno, unsigned ctxt, u64 value) argument
891 read_7322_creg(const struct qib_devdata *dd, u16 regno) argument
900 read_7322_creg32(const struct qib_devdata *dd, u16 regno) argument
909 write_7322_creg_port(const struct qib_pportdata *ppd, u16 regno, u64 value) argument
917 read_7322_creg_port(const struct qib_pportdata *ppd, u16 regno) argument
926 read_7322_creg32_port(const struct qib_pportdata *ppd, u16 regno) argument
4391 get_vl_weights(struct qib_pportdata *ppd, unsigned regno, struct ib_vl_weight_elem *vl) argument
4406 set_vl_weights(struct qib_pportdata *ppd, unsigned regno, struct ib_vl_weight_elem *vl) argument
6336 unsigned n, regno; local
[all...]
/drivers/leds/
H A Dleds-lm355x.c49 u8 regno; member in struct:lm355x_reg_data
215 ret = regmap_read(chip->regmap, preg[REG_FLAG].regno, &chip->last_flag);
229 regmap_update_bits(chip->regmap, preg[REG_TORCH_CTRL].regno,
239 preg[REG_TORCH_CFG].regno,
254 regmap_update_bits(chip->regmap, preg[REG_FLASH_CTRL].regno,
268 preg[REG_STROBE_CFG].regno,
282 regmap_update_bits(chip->regmap, preg[REG_INDI_CTRL].regno,
292 preg[REG_INDI_CFG].regno,
307 ret = regmap_update_bits(chip->regmap, preg[REG_OPMODE].regno,
535 regmap_write(chip->regmap, preg[REG_OPMODE].regno,
[all...]
/drivers/media/pci/ivtv/
H A Divtvfb.c871 static int ivtvfb_setcolreg(unsigned regno, unsigned red, unsigned green, argument
878 if (regno >= info->cmap.len)
883 write_reg(regno, 0x02a30);
885 itv->osd_info->palette_cur[regno] = color;
888 if (regno >= 16)
911 palette[regno] = color;
/drivers/media/platform/vivid/
H A Dvivid-osd.c205 static int vivid_fb_setcolreg(unsigned regno, unsigned red, unsigned green, argument
211 if (regno >= info->cmap.len)
216 if (regno >= 16)
235 palette[regno] = color;
/drivers/net/ethernet/cirrus/
H A Dcs89x0.c221 readreg(struct net_device *dev, u16 regno) argument
225 iowrite16(regno, lp->virt_addr + ADD_PORT);
230 writereg(struct net_device *dev, u16 regno, u16 value) argument
234 iowrite16(regno, lp->virt_addr + ADD_PORT);
/drivers/net/ethernet/realtek/
H A Dr8169.c2505 u32 regno = (action & 0x0fff0000) >> 16; local
2519 if (regno > index) {
2535 if (index + 1 + regno >= pa->size) {
2583 u32 regno = (action & 0x0fff0000) >> 16; local
2590 predata = rtl_readphy(tp, regno);
2603 index -= regno;
2621 rtl_writephy(tp, regno, data);
2629 index += regno;
2634 index += regno;
2638 rtl_writephy(tp, regno, predat
[all...]

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