Searched refs:context (Results 1 - 25 of 270) sorted by relevance

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/arch/tile/include/gxio/
H A Dusb_host.h33 /* A context object used to manage USB hardware resources. */
43 /* Initialize a USB context.
45 * A properly initialized context must be obtained before any of the other
48 * @param context Pointer to a gxio_usb_host_context_t, which will be
53 * @return Zero if the context was successfully initialized, else a
56 extern int gxio_usb_host_init(gxio_usb_host_context_t *context, int usb_index,
59 /* Destroy a USB context.
61 * Once destroyed, a context may not be used with any gxio_usb_host routines
63 * interrupts or signals requested on this context will be delivered. The
65 * context ar
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H A Duart.h33 /* A context object used to manage UART resources. */
49 * @param context Pointer to a properly initialized gxio_uart_context_t.
58 extern int gxio_uart_cfg_interrupt(gxio_uart_context_t *context,
63 /* Initialize a UART context.
65 * A properly initialized context must be obtained before any of the other
68 * @param context Pointer to a gxio_uart_context_t, which will be initialized
71 * @return Zero if the context was successfully initialized, else a
74 extern int gxio_uart_init(gxio_uart_context_t *context, int uart_index);
76 /* Destroy a UART context.
78 * Once destroyed, a context ma
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H A Diorpc_mpipe.h59 int gxio_mpipe_alloc_buffer_stacks(gxio_mpipe_context_t *context,
63 int gxio_mpipe_init_buffer_stack_aux(gxio_mpipe_context_t *context,
69 int gxio_mpipe_alloc_notif_rings(gxio_mpipe_context_t *context,
73 int gxio_mpipe_init_notif_ring_aux(gxio_mpipe_context_t *context, void *mem_va,
77 int gxio_mpipe_request_notif_ring_interrupt(gxio_mpipe_context_t *context,
82 int gxio_mpipe_enable_notif_ring_interrupt(gxio_mpipe_context_t *context,
85 int gxio_mpipe_alloc_notif_groups(gxio_mpipe_context_t *context,
89 int gxio_mpipe_init_notif_group(gxio_mpipe_context_t *context,
93 int gxio_mpipe_alloc_buckets(gxio_mpipe_context_t *context, unsigned int count,
96 int gxio_mpipe_init_bucket(gxio_mpipe_context_t *context, unsigne
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H A Diorpc_trio.h49 int gxio_trio_alloc_asids(gxio_trio_context_t *context, unsigned int count,
53 int gxio_trio_alloc_memory_maps(gxio_trio_context_t *context,
58 int gxio_trio_alloc_scatter_queues(gxio_trio_context_t *context,
62 int gxio_trio_alloc_pio_regions(gxio_trio_context_t *context,
66 int gxio_trio_init_pio_region_aux(gxio_trio_context_t *context,
71 int gxio_trio_init_memory_map_mmu_aux(gxio_trio_context_t *context,
78 int gxio_trio_get_port_property(gxio_trio_context_t *context,
81 int gxio_trio_config_legacy_intr(gxio_trio_context_t *context, int inter_x,
85 int gxio_trio_config_msi_intr(gxio_trio_context_t *context, int inter_x,
92 int gxio_trio_set_mps_mrs(gxio_trio_context_t *context, uint16_
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H A Diorpc_uart.h32 int gxio_uart_cfg_interrupt(gxio_uart_context_t *context, int inter_x,
35 int gxio_uart_get_mmio_base(gxio_uart_context_t *context, HV_PTE *base);
37 int gxio_uart_check_mmio_offset(gxio_uart_context_t *context,
/arch/tile/gxio/
H A Duart.c28 int gxio_uart_init(gxio_uart_context_t *context, int uart_index) argument
42 context->fd = fd;
45 context->mmio_base = (void __force *)
48 if (context->mmio_base == NULL) {
49 hv_dev_close(context->fd);
50 context->fd = -1;
59 int gxio_uart_destroy(gxio_uart_context_t *context) argument
61 iounmap((void __force __iomem *)(context->mmio_base));
62 hv_dev_close(context->fd);
64 context
73 gxio_uart_write(gxio_uart_context_t *context, uint64_t offset, uint64_t word) argument
82 gxio_uart_read(gxio_uart_context_t *context, uint64_t offset) argument
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H A Dusb_host.c29 int gxio_usb_host_init(gxio_usb_host_context_t *context, int usb_index, argument
50 context->fd = fd;
53 context->mmio_base =
56 if (context->mmio_base == NULL) {
57 hv_dev_close(context->fd);
66 int gxio_usb_host_destroy(gxio_usb_host_context_t *context) argument
68 iounmap((void __force __iomem *)(context->mmio_base));
69 hv_dev_close(context->fd);
71 context->mmio_base = NULL;
72 context
79 gxio_usb_host_get_reg_start(gxio_usb_host_context_t *context) argument
86 gxio_usb_host_get_reg_len(gxio_usb_host_context_t *context) argument
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H A Dmpipe.c58 int gxio_mpipe_init(gxio_mpipe_context_t *context, unsigned int mpipe_index) argument
71 context->fd = fd;
81 context->mmio_cfg_base = (void __force *)
84 if (context->mmio_cfg_base == NULL)
87 context->mmio_fast_base = (void __force *)
90 if (context->mmio_fast_base == NULL)
95 context->__stacks.stacks[i] = 255;
97 context->instance = mpipe_index;
102 iounmap((void __force __iomem *)(context->mmio_cfg_base));
104 hv_dev_close(context
111 gxio_mpipe_destroy(gxio_mpipe_context_t *context) argument
160 gxio_mpipe_init_buffer_stack(gxio_mpipe_context_t *context, unsigned int stack, gxio_mpipe_buffer_size_enum_t buffer_size_enum, void *mem, size_t mem_size, unsigned int mem_flags) argument
184 gxio_mpipe_init_notif_ring(gxio_mpipe_context_t *context, unsigned int ring, void *mem, size_t mem_size, unsigned int mem_flags) argument
195 gxio_mpipe_init_notif_group_and_buckets(gxio_mpipe_context_t *context, unsigned int group, unsigned int ring, unsigned int num_rings, unsigned int bucket, unsigned int num_buckets, gxio_mpipe_bucket_mode_t mode) argument
235 gxio_mpipe_init_edma_ring(gxio_mpipe_context_t *context, unsigned int ring, unsigned int channel, void *mem, size_t mem_size, unsigned int mem_flags) argument
248 gxio_mpipe_rules_init(gxio_mpipe_rules_t *rules, gxio_mpipe_context_t *context) argument
389 gxio_mpipe_iqueue_init(gxio_mpipe_iqueue_t *iqueue, gxio_mpipe_context_t *context, unsigned int ring, void *mem, size_t mem_size, unsigned int mem_flags) argument
417 gxio_mpipe_equeue_init(gxio_mpipe_equeue_t *equeue, gxio_mpipe_context_t *context, unsigned int ering, unsigned int channel, void *mem, unsigned int mem_size, unsigned int mem_flags) argument
458 gxio_mpipe_set_timestamp(gxio_mpipe_context_t *context, const struct timespec *ts) argument
467 gxio_mpipe_get_timestamp(gxio_mpipe_context_t *context, struct timespec *ts) argument
489 gxio_mpipe_adjust_timestamp(gxio_mpipe_context_t *context, int64_t delta) argument
499 static gxio_mpipe_context_t context; local
535 gxio_mpipe_context_t *context = _gxio_get_link_context(); local
552 gxio_mpipe_context_t *context = _gxio_get_link_context(); local
568 gxio_mpipe_link_open(gxio_mpipe_link_t *link, gxio_mpipe_context_t *context, const char *link_name, unsigned int flags) argument
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H A Diorpc_mpipe_info.c22 int gxio_mpipe_info_instance_aux(gxio_mpipe_info_context_t *context, argument
30 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
41 int gxio_mpipe_info_enumerate_aux(gxio_mpipe_info_context_t *context, argument
51 hv_dev_pread(context->fd, 0, (HV_VirtAddr) params, sizeof(*params),
66 int gxio_mpipe_info_get_mmio_base(gxio_mpipe_info_context_t *context, argument
74 hv_dev_pread(context->fd, 0, (HV_VirtAddr) params, sizeof(*params),
88 int gxio_mpipe_info_check_mmio_offset(gxio_mpipe_info_context_t *context, argument
97 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
H A Diorpc_mpipe.c24 int gxio_mpipe_alloc_buffer_stacks(gxio_mpipe_context_t *context, argument
35 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
48 int gxio_mpipe_init_buffer_stack_aux(gxio_mpipe_context_t *context, argument
69 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
83 int gxio_mpipe_alloc_notif_rings(gxio_mpipe_context_t *context, argument
94 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
105 int gxio_mpipe_init_notif_ring_aux(gxio_mpipe_context_t *context, void *mem_va, argument
124 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
136 int gxio_mpipe_request_notif_ring_interrupt(gxio_mpipe_context_t *context, argument
150 return hv_dev_pwrite(context
161 gxio_mpipe_enable_notif_ring_interrupt(gxio_mpipe_context_t *context, unsigned int ring) argument
182 gxio_mpipe_alloc_notif_groups(gxio_mpipe_context_t *context, unsigned int count, unsigned int first, unsigned int flags) argument
204 gxio_mpipe_init_notif_group(gxio_mpipe_context_t *context, unsigned int group, gxio_mpipe_notif_group_bits_t bits) argument
226 gxio_mpipe_alloc_buckets(gxio_mpipe_context_t *context, unsigned int count, unsigned int first, unsigned int flags) argument
247 gxio_mpipe_init_bucket(gxio_mpipe_context_t *context, unsigned int bucket, MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info) argument
268 gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t *context, unsigned int count, unsigned int first, unsigned int flags) argument
291 gxio_mpipe_init_edma_ring_aux(gxio_mpipe_context_t *context, void *mem_va, size_t mem_size, unsigned int mem_flags, unsigned int ring, unsigned int channel) argument
318 gxio_mpipe_commit_rules(gxio_mpipe_context_t *context, const void *blob, size_t blob_size) argument
335 gxio_mpipe_register_client_memory(gxio_mpipe_context_t *context, unsigned int iotlb, HV_PTE pte, unsigned int flags) argument
358 gxio_mpipe_link_open_aux(gxio_mpipe_context_t *context, _gxio_mpipe_link_name_t name, unsigned int flags) argument
377 gxio_mpipe_link_close_aux(gxio_mpipe_context_t *context, int mac) argument
396 gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t *context, int mac, uint32_t attr, int64_t val) argument
418 gxio_mpipe_get_timestamp_aux(gxio_mpipe_context_t *context, uint64_t *sec, uint64_t *nsec, uint64_t *cycles) argument
443 gxio_mpipe_set_timestamp_aux(gxio_mpipe_context_t *context, uint64_t sec, uint64_t nsec, uint64_t cycles) argument
463 gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t *context, int64_t nsec) argument
484 gxio_mpipe_config_edma_ring_blks(gxio_mpipe_context_t *context, unsigned int ering, unsigned int max_blks, unsigned int min_snf_blks, unsigned int db) argument
507 gxio_mpipe_adjust_timestamp_freq(gxio_mpipe_context_t *context, int32_t ppb) argument
525 gxio_mpipe_arm_pollfd(gxio_mpipe_context_t *context, int pollfd_cookie) argument
542 gxio_mpipe_close_pollfd(gxio_mpipe_context_t *context, int pollfd_cookie) argument
559 gxio_mpipe_get_mmio_base(gxio_mpipe_context_t *context, HV_PTE *base) argument
580 gxio_mpipe_check_mmio_offset(gxio_mpipe_context_t *context, unsigned long offset, unsigned long size) argument
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H A Dtrio.c28 int gxio_trio_init(gxio_trio_context_t *context, unsigned int trio_index) argument
36 context->fd = -1;
44 context->fd = fd;
/arch/s390/include/asm/
H A Dmmu.h17 /* The mmu context has extended page tables. */
19 /* The mmu context uses storage keys. */
24 .context.list_lock = __SPIN_LOCK_UNLOCKED(name.context.list_lock), \
25 .context.pgtable_list = LIST_HEAD_INIT(name.context.pgtable_list), \
26 .context.gmap_list = LIST_HEAD_INIT(name.context.gmap_list),
H A Dmmu_context.h18 cpumask_clear(&mm->context.cpu_attach_mask);
19 atomic_set(&mm->context.attach_count, 0);
20 mm->context.flush_mm = 0;
21 mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
23 mm->context.asce_bits |= _ASCE_TYPE_REGION3;
25 mm->context.has_pgste = 0;
26 mm->context.use_skey = 0;
27 mm->context.asce_limit = STACK_TOP_MAX;
36 S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
68 cpumask_set_cpu(cpu, &next->context
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H A Dtlbflush.h74 atomic_add(0x10000, &mm->context.attach_count);
84 &mm->context.cpu_attach_mask);
86 atomic_sub(0x10000, &mm->context.attach_count);
99 count = atomic_add_return(0x10000, &mm->context.attach_count);
111 &mm->context.cpu_attach_mask);
113 atomic_sub(0x10000, &mm->context.attach_count);
121 init_mm.context.asce_bits);
144 init_mm.context.asce_bits);
157 if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))
159 mm->context
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/arch/parisc/include/asm/
H A Dmmu_context.h26 mm->context = alloc_sid();
33 free_sid(mm->context);
34 mm->context = 0;
37 static inline unsigned long __space_to_prot(mm_context_t context) argument
40 return context << 1;
42 return context >> (SPACEID_SHIFT - 1);
46 static inline void load_context(mm_context_t context) argument
48 mtsp(context, 3);
49 mtctl(__space_to_prot(context), 8);
57 load_context(next->context);
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/arch/hexagon/mm/
H A Dvm_tlb.c42 if (mm->context.ptbase == current->active_mm->context.ptbase)
71 if (current->active_mm->context.ptbase == mm->context.ptbase)
82 if (mm->context.ptbase == current->active_mm->context.ptbase)
/arch/arm64/include/asm/
H A Dmmu.h26 .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
28 #define ASID(mm) ((mm)->context.id & 0xffff)
/arch/x86/include/asm/
H A Dinit.h6 void *context; /* context for alloc_pgt_page */ member in struct:x86_mapping_info
/arch/sparc/include/asm/
H A Dmmu_context_64.h38 &mm->context.tsb_block[0],
40 (mm->context.tsb_block[1].tsb ?
41 &mm->context.tsb_block[1] :
46 , __pa(&mm->context.tsb_descr[0]));
58 /* Set MMU context in the actual hardware. */
68 : "r" (CTX_HWBITS((__mm)->context)), \
73 /* Switch the current MM context. */
82 spin_lock_irqsave(&mm->context.lock, flags);
83 ctx_valid = CTX_VALID(mm->context);
94 * perform the secondary context loa
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/arch/ia64/include/asm/
H A Dmmu_context.h10 * Routines to manage the allocation of task context numbers. Task context
12 * due to context switches. Context numbers are implemented using ia-64
36 unsigned int next; /* next context number to use */
38 unsigned int max_ctx; /* max. context value supported by all CPUs */
56 * When the context counter wraps around all TLBs need to be flushed because
57 * an old context number might have been reused. This is signalled by the
81 nv_mm_context_t context = mm->context; local
83 if (likely(context))
131 reload_context(nv_mm_context_t context) argument
165 nv_mm_context_t context; local
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/arch/powerpc/mm/
H A Dicswx_pid.c62 if (mm->context.cop_pid == COP_PID_NONE) {
66 mm->context.cop_pid = pid;
68 return mm->context.cop_pid;
75 if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
76 free_pid = mm->context.cop_pid;
77 mm->context.cop_pid = COP_PID_NONE;
H A Dmmu_context_hash64.c2 * MMU context allocation for 64-bit kernels.
77 mm->context.id = index;
79 mm->context.cop_lockp = kmalloc(sizeof(spinlock_t), GFP_KERNEL);
80 if (!mm->context.cop_lockp) {
83 mm->context.id = MMU_NO_CONTEXT;
86 spin_lock_init(mm->context.cop_lockp);
90 mm->context.pte_frag = NULL;
110 pte_frag = mm->context.pte_frag;
137 drop_cop(mm->context.acop, mm);
138 kfree(mm->context
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/arch/microblaze/include/asm/
H A Dmmu_context_mm.h22 * segment IDs). We use a skew on both the context and the high 4 bits
45 * Set the current MMU context.
54 extern void set_context(mm_context_t context, pgd_t *pgd);
63 * This caches the next context number that we expect to be free.
64 * Its use is an optimization only, we can't rely on this context
79 * Get a new mmu context for the address space described by `mm'.
85 if (mm->context != NO_CONTEXT)
96 mm->context = ctx;
101 * Set up the context for a new address space.
103 # define init_new_context(tsk, mm) (((mm)->context
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/arch/blackfin/include/asm/
H A Dmmu_context.h64 mm->context.l1_stack_save = current_l1_stack_save = (void*)sp_base;
82 if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
84 set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu);
90 if (!next_mm->context.l1_stack_save)
92 if (next_mm->context.l1_stack_save == current_l1_stack_save)
97 current_l1_stack_save = next_mm->context.l1_stack_save;
123 unsigned long *mask = mm->context.page_rwx_mask;
154 if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
156 set_mask_dcplbs(mm->context.page_rwx_mask, cpu);
171 /* Called when creating a new context durin
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/arch/ia64/kvm/
H A Dasm-offsets.c206 DEFINE(VMM_CTX_R4_OFFSET, offsetof(union context, gr[4]));
207 DEFINE(VMM_CTX_R5_OFFSET, offsetof(union context, gr[5]));
208 DEFINE(VMM_CTX_R12_OFFSET, offsetof(union context, gr[12]));
209 DEFINE(VMM_CTX_R13_OFFSET, offsetof(union context, gr[13]));
210 DEFINE(VMM_CTX_KR0_OFFSET, offsetof(union context, ar[0]));
211 DEFINE(VMM_CTX_KR1_OFFSET, offsetof(union context, ar[1]));
212 DEFINE(VMM_CTX_B0_OFFSET, offsetof(union context, br[0]));
213 DEFINE(VMM_CTX_B1_OFFSET, offsetof(union context, br[1]));
214 DEFINE(VMM_CTX_B2_OFFSET, offsetof(union context, br[2]));
215 DEFINE(VMM_CTX_RR0_OFFSET, offsetof(union context, r
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