| /arch/arm/mach-lpc32xx/ |
| H A D | clock.h | 28 int (*set_rate) (struct clk *, unsigned long); member in struct:clk
|
| H A D | clock.c | 519 .set_rate = local_usbpll_set_rate,
976 .set_rate = mmc_set_rate,
1059 .set_rate = clcd_set_rate,
1155 if (clk->set_rate)
1156 ret = clk->set_rate(clk, rate);
|
| /arch/blackfin/mach-common/ |
| H A D | clock.h | 9 int (*set_rate)(struct clk *clk, unsigned long rate); member in struct:clk_ops
|
| /arch/avr32/mach-at32ap/ |
| H A D | clock.h | 27 long (*set_rate)(struct clk *clk, unsigned long rate, member in struct:clk
|
| H A D | clock.c | 132 if (!clk->set_rate)
136 actual_rate = clk->set_rate(clk, rate, 0);
148 if (!clk->set_rate)
152 ret = clk->set_rate(clk, rate, 1);
|
| H A D | at32ap700x.c | 320 .set_rate = pll1_set_rate,
485 .set_rate = cpu_clk_set_rate,
1464 .set_rate = genclk_set_rate,
2109 .set_rate = genclk_set_rate,
2166 .set_rate = genclk_set_rate,
2174 .set_rate = genclk_set_rate,
2182 .set_rate = genclk_set_rate,
2190 .set_rate = genclk_set_rate,
2198 .set_rate = genclk_set_rate,
|
| /arch/blackfin/include/asm/ |
| H A D | clocks.h | 56 int (*set_rate)(struct clk *clk, unsigned long rate); member in struct:clk_ops
|
| /arch/mips/include/asm/ |
| H A D | clock.h | 16 int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id); member in struct:clk_ops
|
| /arch/mips/jz4740/ |
| H A D | clock.h | 36 int (*set_rate)(struct clk *clk, unsigned long rate); member in struct:clk_ops
|
| H A D | clock.c | 330 .set_rate = jz_clk_main_set_rate,
560 .set_rate = jz_clk_ldclk_set_rate,
576 .set_rate = jz_clk_divided_set_rate,
585 .set_rate = jz_clk_divided_set_rate,
594 .set_rate = jz_clk_divided_set_rate,
656 .set_rate = jz_clk_udc_set_rate,
765 if (!clk->ops->set_rate)
767 return clk->ops->set_rate(clk, rate);
|
| /arch/arm/mach-ep93xx/ |
| H A D | clock.c | 39 int (*set_rate)(struct clk *clk, unsigned long rate); member in struct:clk
99 .set_rate = set_keytchclk_rate,
114 .set_rate = set_div_rate,
121 .set_rate = set_div_rate,
129 .set_rate = set_i2s_sclk_rate,
137 .set_rate = set_i2s_lrclk_rate,
471 if (clk->set_rate)
472 return clk->set_rate(clk, rate);
|
| /arch/mips/loongson/lemote-2f/ |
| H A D | clock.c | 99 if (likely(clk->ops && clk->ops->set_rate)) {
103 ret = clk->ops->set_rate(clk, rate, 0);
|
| /arch/arm/mach-omap1/ |
| H A D | clock_data.c | 116 .set_rate = &omap1_set_sossi_rate,
126 .set_rate = omap1_clk_set_rate_ckctl_arm,
140 .set_rate = omap1_clk_set_rate_ckctl_arm,
220 .set_rate = omap1_clk_set_rate_ckctl_arm,
230 .set_rate = omap1_clk_set_rate_ckctl_arm,
242 .set_rate = &omap1_clk_set_rate_dsp_domain,
272 .set_rate = omap1_clk_set_rate_ckctl_arm,
393 .set_rate = omap1_clk_set_rate_ckctl_arm,
407 .set_rate = omap1_clk_set_rate_ckctl_arm,
427 .set_rate
[all...] |
| H A D | clock.h | 111 * @set_rate: fn ptr that can change the clock's current rate
151 int (*set_rate)(struct clk *, unsigned long); member in struct:clk
|
| /arch/sh/kernel/cpu/sh4/ |
| H A D | clock-sh4-202.c | 84 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0)
136 .set_rate = shoc_clk_set_rate,
|
| /arch/blackfin/mach-bf609/ |
| H A D | clock.c | 127 if (clk->ops && clk->ops->set_rate)
128 ret = clk->ops->set_rate(clk, rate);
262 .set_rate = pll_set_rate,
271 .set_rate = sys_clk_set_rate,
|
| /arch/arm/mach-imx/ |
| H A D | clk-pllv3.c | 145 .set_rate = clk_pllv3_set_rate,
199 .set_rate = clk_pllv3_sys_set_rate,
271 .set_rate = clk_pllv3_av_set_rate,
|
| H A D | clk-fixup-div.c | 92 .set_rate = clk_fixup_div_set_rate,
|
| H A D | clk-busy.c | 68 ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate);
78 .set_rate = clk_busy_divider_set_rate,
|
| H A D | clk-pfd.c | 127 .set_rate = clk_pfd_set_rate,
|
| /arch/arm/mach-davinci/ |
| H A D | clock.h | 104 int (*set_rate) (struct clk *clk, unsigned long rate); member in struct:clk
|
| /arch/c6x/include/asm/ |
| H A D | clock.h | 95 int (*set_rate) (struct clk *clk, unsigned long rate); member in struct:clk
|
| /arch/arm/mach-msm/ |
| H A D | clock-pcom.c | 122 .set_rate = pc_clk_set_rate,
|
| /arch/arm/mach-omap2/ |
| H A D | clkt2xxx_virt_prcm_set.c | 218 .set_rate = &omap2_select_table_rate,
|
| /arch/arm/mach-shmobile/ |
| H A D | clock-sh73a0.c | 277 ret = div4_clk_ops->set_rate(clk, rate / 2);
292 ret = div4_clk_ops->set_rate(clk, rate);
332 return div4_clk_ops->set_rate(clk, rate);
346 kicker_ops.set_rate = kicker_set_rate;
347 zclk_ops.set_rate = zclk_set_rate;
519 .set_rate = dsiphy_set_rate,
|