Searched refs:REG_HISR (Results 1 - 16 of 16) sorted by relevance

/drivers/net/wireless/rtlwifi/rtl8192de/
H A Dreg.h109 #define REG_HISR 0x0124 macro
354 #define ISR REG_HISR
H A Dhw.c716 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
/drivers/net/wireless/rtlwifi/rtl8188ee/
H A Dhw.c152 isr_regaddr = REG_HISR;
226 rtl_write_word(rtlpriv, REG_HISR, 0x0100);
897 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
1361 tmp = rtl_read_dword(rtlpriv, REG_HISR);
1362 rtl_write_dword(rtlpriv, REG_HISR, tmp);
H A Dreg.h80 #define REG_HISR 0x00B4 macro
352 #define ISR REG_HISR
/drivers/net/wireless/rtlwifi/rtl8192ee/
H A Dhw.c156 isr_regaddr = REG_HISR;
228 rtl_write_word(rtlpriv, REG_HISR, 0x0100);
850 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
1478 tmp = rtl_read_dword(rtlpriv, REG_HISR);
1479 rtl_write_dword(rtlpriv, REG_HISR, tmp);
H A Dreg.h76 #define REG_HISR 0x00B4 macro
380 #define ISR REG_HISR
/drivers/net/wireless/rtlwifi/rtl8723be/
H A Dhw.c158 isr_regaddr = REG_HISR;
228 rtl_write_word(rtlpriv, REG_HISR, 0x0100);
883 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
1642 tmp = rtl_read_dword(rtlpriv, REG_HISR);
1643 rtl_write_dword(rtlpriv, REG_HISR, tmp);
H A Dreg.h82 #define REG_HISR 0x00B4 macro
367 #define ISR REG_HISR
/drivers/staging/rtl8723au/include/
H A Drtl8723a_spec.h97 #define REG_HISR 0x0124 macro
438 #define ISR REG_HISR
/drivers/net/wireless/rtlwifi/rtl8821ae/
H A Dhw.c156 isr_regaddr = REG_HISR;
228 rtl_write_word(rtlpriv, REG_HISR, 0x0100);
986 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
2260 tmp = rtl_read_dword(rtlpriv, REG_HISR);
2262 printk("0x%x = 0x%08x\n",REG_HISR, tmp);*/
2263 rtl_write_dword(rtlpriv, REG_HISR, tmp);
H A Dreg.h83 #define REG_HISR 0x00B4 macro
378 #define ISR REG_HISR
/drivers/net/wireless/rtlwifi/rtl8723ae/
H A Dhw.c740 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
1266 tmp = rtl_read_dword(rtlpriv, REG_HISR);
1267 rtl_write_dword(rtlpriv, REG_HISR, tmp);
H A Dreg.h89 #define REG_HISR 0x0124 macro
320 #define ISR REG_HISR
/drivers/net/wireless/rtlwifi/rtl8192ce/
H A Dreg.h100 #define REG_HISR 0x0124 macro
338 #define ISR REG_HISR
H A Dhw.c739 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
/drivers/staging/rtl8723au/hal/
H A Dusb_halinit.c136 rtl8723au_write32(Adapter, REG_HISR, value32);

Completed in 114 milliseconds