/drivers/thermal/ |
H A D | step_wise.c | 54 unsigned long cur_state; local 62 cdev->ops->get_cur_state(cdev, &cur_state); 64 dev_dbg(&cdev->device, "cur_state=%ld\n", cur_state); 69 next_target = cur_state < instance->upper ? 70 (cur_state + 1) : instance->upper; 80 if (cur_state <= instance->lower) { 84 next_target = cur_state - 1; 90 if (cur_state == instance->lower) {
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/drivers/acpi/ |
H A D | processor_thermal.c | 221 unsigned long *cur_state) 233 *cur_state = cpufreq_get_cur_state(pr->id); 235 *cur_state += pr->throttling.state; 220 processor_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *cur_state) argument
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H A D | power.c | 198 int cur_state; local 210 result = acpi_power_get_state(handle, &cur_state); 215 if (cur_state != ACPI_POWER_RESOURCE_STATE_ON) 220 cur_state ? "on" : "off")); 222 *state = cur_state;
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/drivers/net/ethernet/mellanox/mlx4/ |
H A D | qp.c | 84 enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, 136 if (cur_state >= MLX4_QP_NUM_STATE || new_state >= MLX4_QP_NUM_STATE || 137 !op[cur_state][new_state]) 140 if (op[cur_state][new_state] == MLX4_CMD_2RST_QP) { 143 if (mlx4_is_master(dev) && cur_state != MLX4_QP_STATE_ERR && 144 cur_state != MLX4_QP_STATE_RST && 159 if (cur_state == MLX4_QP_STATE_RST && new_state == MLX4_QP_STATE_INIT) { 175 op[cur_state][new_state], MLX4_CMD_TIME_CLASS_C, native); 179 if (cur_state != MLX4_QP_STATE_ERR && 180 cur_state ! 83 __mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar, int sqd_event, struct mlx4_qp *qp, int native) argument 198 mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar, int sqd_event, struct mlx4_qp *qp) argument [all...] |
H A D | eq.c | 336 enum slave_port_state cur_state = local 351 switch (cur_state) {
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/drivers/net/ethernet/mellanox/mlx5/core/ |
H A D | qp.c | 186 int mlx5_core_qp_modify(struct mlx5_core_dev *dev, enum mlx5_qp_state cur_state, argument 232 if (cur_state >= MLX5_QP_NUM_STATE || new_state >= MLX5_QP_NUM_STATE || 233 !optab[cur_state][new_state]) 237 op = optab[cur_state][new_state];
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/drivers/infiniband/hw/usnic/ |
H A D | usnic_ib_main.c | 105 enum ib_qp_state cur_state; local 112 cur_state = qp_grp->state; 113 if (cur_state == IB_QPS_INIT || 114 cur_state == IB_QPS_RTR || 115 cur_state == IB_QPS_RTS) { 123 (cur_state),
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/drivers/spi/ |
H A D | spi-qup.c | 159 u32 cur_state; local 174 cur_state = readl_relaxed(controller->base + QUP_STATE); 179 if (((cur_state & QUP_STATE_MASK) == QUP_STATE_PAUSE) && 184 cur_state &= ~QUP_STATE_MASK; 185 cur_state |= state; 186 writel_relaxed(cur_state, controller->base + QUP_STATE);
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/drivers/infiniband/core/ |
H A D | verbs.c | 829 int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state, argument 835 if (cur_state < 0 || cur_state > IB_QPS_ERR || 840 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS && 841 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE) 844 if (!qp_state_table[cur_state][next_state].valid) 847 req_param = qp_state_table[cur_state][next_state].req_param[type]; 848 opt_param = qp_state_table[cur_state][next_stat [all...] |
/drivers/infiniband/hw/mlx4/ |
H A D | qp.c | 1417 enum ib_qp_state cur_state, enum ib_qp_state new_state) 1487 if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 1503 if (cur_state == IB_QPS_SQD && new_state == IB_QPS_SQD && 1510 if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 1642 if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1645 if (cur_state == IB_QPS_INIT && 1701 if (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD && 1707 if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1716 if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 1730 err = mlx4_qp_modify(dev->dev, &qp->mtt, to_mlx4_state(cur_state), 1415 __mlx4_ib_modify_qp(struct ib_qp *ibqp, const struct ib_qp_attr *attr, int attr_mask, enum ib_qp_state cur_state, enum ib_qp_state new_state) argument 1888 enum ib_qp_state cur_state, new_state; local [all...] |
/drivers/infiniband/hw/mthca/ |
H A D | mthca_qp.c | 545 enum ib_qp_state cur_state, enum ib_qp_state new_state) 652 cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 772 if (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD && 777 err = mthca_MODIFY_QP(dev, cur_state, new_state, qp->qpn, 0, 781 cur_state, new_state, err); 803 if (cur_state != IB_QPS_RTR && 807 if (cur_state != IB_QPS_RESET && 808 cur_state != IB_QPS_ERR && 847 enum ib_qp_state cur_state, new_state; local 852 cur_state 543 __mthca_modify_qp(struct ib_qp *ibqp, const struct ib_qp_attr *attr, int attr_mask, enum ib_qp_state cur_state, enum ib_qp_state new_state) argument [all...] |
/drivers/platform/x86/ |
H A D | acerhdf.c | 466 int cur_temp, cur_state, err = 0; local 477 err = acerhdf_get_fanstate(&cur_state); 485 if ((cur_state == ACERHDF_FAN_AUTO) && 489 if (cur_state == ACERHDF_FAN_OFF)
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/drivers/infiniband/hw/ipath/ |
H A D | ipath_qp.c | 455 enum ib_qp_state cur_state, new_state; local 461 cur_state = attr_mask & IB_QP_CUR_STATE ? 463 new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 465 if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
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/drivers/video/fbdev/i810/ |
H A D | i810.h | 282 u32 cur_state; member in struct:i810fb_par
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H A D | i810_main.c | 1568 par->cur_state = mesg.event; 1599 int cur_state = par->cur_state; local 1601 par->cur_state = PM_EVENT_ON; 1603 if (cur_state == PM_EVENT_FREEZE) {
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/drivers/infiniband/hw/qib/ |
H A D | qib_qp.c | 573 enum ib_qp_state cur_state, new_state; local 583 cur_state = attr_mask & IB_QP_CUR_STATE ? 585 new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 587 if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type, 827 if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
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/drivers/infiniband/hw/mlx5/ |
H A D | qp.c | 1493 enum ib_qp_state cur_state, enum ib_qp_state new_state) 1624 if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1627 if (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD && 1633 if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1637 mlx5_cur = to_mlx5_state(cur_state); 1646 err = mlx5_core_qp_modify(dev->mdev, to_mlx5_state(cur_state), 1693 enum ib_qp_state cur_state, new_state; local 1701 cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 1702 new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 1705 !ib_modify_qp_is_ok(cur_state, new_stat 1491 __mlx5_ib_modify_qp(struct ib_qp *ibqp, const struct ib_qp_attr *attr, int attr_mask, enum ib_qp_state cur_state, enum ib_qp_state new_state) argument [all...] |
/drivers/media/rc/ |
H A D | nuvoton-cir.c | 756 u8 status, iren, cur_state; local 812 cur_state = nvt->study_state; 816 if (cur_state == ST_STUDY_NONE)
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/drivers/gpu/drm/i915/ |
H A D | intel_display.c | 1058 bool cur_state; local 1062 cur_state = !!(val & DPLL_VCO_ENABLE); 1063 WARN(cur_state != state, 1065 state_string(state), state_string(cur_state)); 1072 bool cur_state; local 1078 cur_state = val & DSI_PLL_VCO_EN; 1079 WARN(cur_state != state, 1081 state_string(state), state_string(cur_state)); 1102 bool cur_state; local 1109 cur_state 1120 bool cur_state; local 1146 bool cur_state; local 1182 bool cur_state; local 1238 bool cur_state; local 1257 bool cur_state; local 1285 bool cur_state; local [all...] |
/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_execbuf.c | 1345 SVGA3dTextureState *cur_state = (SVGA3dTextureState *) local 1360 for (; cur_state < last_state; ++cur_state) { 1361 if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE)) 1366 &cur_state->value, &res_node); 1376 bi.i1.texture_stage = cur_state->stage;
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/drivers/net/phy/ |
H A D | amd-xgbe-phy.c | 903 enum amd_xgbe_phy_an cur_state; local 914 cur_state = priv->an_state; 954 cur_state);
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/drivers/scsi/csiostor/ |
H A D | t4fw_api_stor.h | 120 u8 cur_state; member in struct:fw_rdev_wr
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/drivers/scsi/megaraid/ |
H A D | megaraid_sas_base.c | 3317 u32 cur_state; local 3335 cur_state = MFI_STATE_FAULT; 3366 cur_state = MFI_STATE_WAIT_HANDSHAKE; 3389 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING; 3434 cur_state = MFI_STATE_OPERATIONAL; 3442 cur_state = MFI_STATE_UNDEFINED; 3447 cur_state = MFI_STATE_BB_INIT; 3452 cur_state = MFI_STATE_FW_INIT; 3457 cur_state = MFI_STATE_FW_INIT_2; 3462 cur_state [all...] |
/drivers/scsi/lpfc/ |
H A D | lpfc_nportdisc.c | 2512 uint32_t cur_state, rc; local 2520 cur_state = ndlp->nlp_state; 2522 /* DSM in event <evt> on NPort <nlp_DID> in state <cur_state> */ 2526 evt, ndlp->nlp_DID, cur_state, ndlp->nlp_flag); 2530 evt, cur_state, ndlp->nlp_DID); 2532 func = lpfc_disc_action[(cur_state * NLP_EVT_MAX_EVENT) + evt];
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/drivers/block/ |
H A D | sx8.c | 1036 int cur_state, int next_state) 1042 assert(host->state == cur_state); 1034 carm_handle_generic(struct carm_host *host, struct carm_request *crq, int error, int cur_state, int next_state) argument
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