11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * linux/arch/alpha/kernel/sys_alcor.c 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1995 David A Rusling 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1996 Jay A Estabrook 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1998, 1999 Richard Henderson 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Code supporting the ALCOR and XLT (XL-300/366/433). 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/kernel.h> 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/types.h> 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/mm.h> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/sched.h> 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/pci.h> 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/init.h> 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/reboot.h> 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/bitops.h> 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/ptrace.h> 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/io.h> 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/dma.h> 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/mmu_context.h> 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/irq.h> 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/pgtable.h> 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/core_cia.h> 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/tlbflush.h> 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "proto.h" 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "irq_impl.h" 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "pci_impl.h" 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "machvec_impl.h" 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Note mask bit is true for ENABLED irqs. */ 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic unsigned long cached_irq_mask; 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsalcor_update_irq_hw(unsigned long mask) 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_MASK = mask; 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mb(); 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 46ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixneralcor_enable_irq(struct irq_data *d) 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 48ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 52ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixneralcor_disable_irq(struct irq_data *d) 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 54ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 58ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixneralcor_mask_and_ack_irq(struct irq_data *d) 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 60ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner alcor_disable_irq(d); 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ 63ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb(); 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_CLEAR = 0; mb(); 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 68ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixneralcor_isa_mask_and_ack_irq(struct irq_data *d) 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 70ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner i8259a_mask_and_ack_irq(d); 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_CLEAR = 0; mb(); 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7744377f622ee4f23ea0afc9b83dba5d3ec2d560cdThomas Gleixnerstatic struct irq_chip alcor_irq_type = { 788ab1221c20255f35d85664a046549bc6135122c2Thomas Gleixner .name = "ALCOR", 79ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner .irq_unmask = alcor_enable_irq, 80ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner .irq_mask = alcor_disable_irq, 81ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner .irq_mask_ack = alcor_mask_and_ack_irq, 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 857ca56053b29633ef08b14e5ca16c663363edac36Al Viroalcor_device_interrupt(unsigned long vector) 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long pld; 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int i; 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Read the interrupt summary register of the GRU */ 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pld = (*(vuip)GRU_INT_REQ) & GRU_INT_REQ_BITS; 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Now for every possible bit set, work through them and call 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the appropriate interrupt handler. 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (pld) { 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds i = ffz(~pld); 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pld &= pld - 1; /* clear least bit set */ 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (i == 31) { 1017ca56053b29633ef08b14e5ca16c663363edac36Al Viro isa_device_interrupt(vector); 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else { 1033dbb8c62897f96bbf5d4e4fe649e5d3791fc33c5Al Viro handle_irq(16 + i); 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void __init 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsalcor_init_irq(void) 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds long i; 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (alpha_using_srm) 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds alpha_mv.device_interrupt = srm_device_interrupt; 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_MASK = 0; mb(); /* all disabled */ 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_EDGE = 0; mb(); /* all are level */ 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_HILO = 0x80000000U; mb(); /* ISA only HI */ 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip)GRU_INT_CLEAR = 0; mb(); /* all clear */ 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 16; i < 48; ++i) { 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* On Alcor, at least, lines 20..30 are not connected 123c3a2ddee16e67c86f3b469ccdd396cda034756a9Simon Arlott and can generate spurious interrupts if we turn them 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds on while IRQ probing. */ 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (i >= 16+20 && i <= 16+30) 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds continue; 127a9eb076b21425929ce543978db03265d9db210deThomas Gleixner irq_set_chip_and_handler(i, &alcor_irq_type, handle_level_irq); 128ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner irq_set_status_flags(i, IRQ_LEVEL); 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 130ff53afe66a3ab5614309a4193df72c82ec3bb984Thomas Gleixner i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq; 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds init_i8259a_irqs(); 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds common_init_isa_dma(); 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setup_irq(16+31, &isa_cascade_irqaction); 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PCI Fixup configuration. 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Summary @ GRU_INT_REQ: 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bit Meaning 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0 Interrupt Line A from slot 2 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1 Interrupt Line B from slot 2 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2 Interrupt Line C from slot 2 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3 Interrupt Line D from slot 2 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4 Interrupt Line A from slot 1 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5 Interrupt line B from slot 1 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6 Interrupt Line C from slot 1 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7 Interrupt Line D from slot 1 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 8 Interrupt Line A from slot 0 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9 Interrupt Line B from slot 0 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *10 Interrupt Line C from slot 0 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *11 Interrupt Line D from slot 0 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *12 Interrupt Line A from slot 4 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *13 Interrupt Line B from slot 4 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *14 Interrupt Line C from slot 4 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *15 Interrupt Line D from slot 4 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *16 Interrupt Line D from slot 3 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *17 Interrupt Line D from slot 3 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *18 Interrupt Line D from slot 3 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *19 Interrupt Line D from slot 3 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *20-30 Reserved 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *31 EISA interrupt 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The device to slot mapping looks like: 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Slot Device 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6 built-in TULIP (XLT only) 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7 PCI on board slot 0 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 8 PCI on board slot 3 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9 PCI on board slot 4 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 10 PCEB (PCI-EISA bridge) 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 11 PCI on board slot 2 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12 PCI on board slot 1 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This two layered interrupt approach means that we allocate IRQ 16 and 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * above for PCI interrupts. The IRQ relates to which bit the interrupt 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * comes in on. This makes interrupt processing much easier. 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int __init 185d5341942d784134f2997b3ff82cd63cf71d1f932Ralf Baechlealcor_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds static char irq_tab[7][5] __initdata = { 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /*INT INTA INTB INTC INTD */ 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* note: IDSEL 17 is XLT only */ 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds {16+13, 16+13, 16+13, 16+13, 16+13}, /* IdSel 17, TULIP */ 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 16+8, 16+8, 16+9, 16+10, 16+11}, /* IdSel 18, slot 0 */ 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds {16+16, 16+16, 16+17, 16+18, 16+19}, /* IdSel 19, slot 3 */ 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds {16+12, 16+12, 16+13, 16+14, 16+15}, /* IdSel 20, slot 4 */ 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 21, PCEB */ 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 16+0, 16+0, 16+1, 16+2, 16+3}, /* IdSel 22, slot 2 */ 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 16+4, 16+4, 16+5, 16+6, 16+7}, /* IdSel 23, slot 1 */ 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }; 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds const long min_idsel = 6, max_idsel = 12, irqs_per_slot = 5; 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return COMMON_TABLE_LOOKUP; 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsalcor_kill_arch(int mode) 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds cia_kill_arch(mode); 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef ALPHA_RESTORE_SRM_SETUP 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch(mode) { 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case LINUX_REBOOT_CMD_RESTART: 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Who said DEC engineer's have no sense of humor? ;-) */ 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (alpha_using_srm) { 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(vuip) GRU_RESET = 0x0000dead; 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mb(); 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case LINUX_REBOOT_CMD_HALT: 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case LINUX_REBOOT_CMD_POWER_OFF: 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds halt(); 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void __init 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsalcor_init_pci(void) 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct pci_dev *dev; 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds cia_init_pci(); 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Now we can look to see if we are really running on an XLT-type 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * motherboard, by looking for a 21040 TULIP in slot 6, which is 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * built into XLT and BRET/MAVERICK, but not available on ALCOR. 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 23894517252b7c8e26de7238eb2c1450cb7c69f1af6Jiri Slaby dev = pci_get_device(PCI_VENDOR_ID_DEC, 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PCI_DEVICE_ID_DEC_TULIP, 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds NULL); 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (dev && dev->devfn == PCI_DEVFN(6,0)) { 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds alpha_mv.sys.cia.gru_int_req_bits = XLT_GRU_INT_REQ_BITS; 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "%s: Detected AS500 or XLT motherboard.\n", 244bbb8d343affd21850849fa4d41bf91c7527a3d04Harvey Harrison __func__); 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 24694517252b7c8e26de7238eb2c1450cb7c69f1af6Jiri Slaby pci_dev_put(dev); 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The System Vectors 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct alpha_machine_vector alcor_mv __initmv = { 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .vector_name = "Alcor", 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DO_EV5_MMU, 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DO_DEFAULT_RTC, 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DO_CIA_IO, 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .machine_check = cia_machine_check, 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .max_isa_dma_address = ALPHA_ALCOR_MAX_ISA_DMA_ADDRESS, 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .min_io_address = EISA_DEFAULT_IO_BASE, 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .min_mem_address = CIA_DEFAULT_MEM_BASE, 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .nr_irqs = 48, 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .device_interrupt = alcor_device_interrupt, 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_arch = cia_init_arch, 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_irq = alcor_init_irq, 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_rtc = common_init_rtc, 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_pci = alcor_init_pci, 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .kill_arch = alcor_kill_arch, 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .pci_map_irq = alcor_map_irq, 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .pci_swizzle = common_swizzle, 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .sys = { .cia = { 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .gru_int_req_bits = ALCOR_GRU_INT_REQ_BITS 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }} 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsALIAS_MV(alcor) 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct alpha_machine_vector xlt_mv __initmv = { 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .vector_name = "XLT", 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DO_EV5_MMU, 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DO_DEFAULT_RTC, 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DO_CIA_IO, 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .machine_check = cia_machine_check, 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .min_io_address = EISA_DEFAULT_IO_BASE, 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .min_mem_address = CIA_DEFAULT_MEM_BASE, 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .nr_irqs = 48, 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .device_interrupt = alcor_device_interrupt, 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_arch = cia_init_arch, 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_irq = alcor_init_irq, 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_rtc = common_init_rtc, 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .init_pci = alcor_init_pci, 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .kill_arch = alcor_kill_arch, 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .pci_map_irq = alcor_map_irq, 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .pci_swizzle = common_swizzle, 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .sys = { .cia = { 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .gru_int_req_bits = XLT_GRU_INT_REQ_BITS 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }} 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* No alpha_mv alias for XLT, since we compile it in unconditionally 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds with ALCOR; setup_arch knows how to cope. */ 309