setup.c revision 30ecee8cdd05415e5602bd755d9210e1c5a5b64d
1/* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9#include <linux/seq_file.h> 10#include <linux/fs.h> 11#include <linux/delay.h> 12#include <linux/root_dev.h> 13#include <linux/console.h> 14#include <linux/module.h> 15#include <linux/cpu.h> 16#include <linux/of_fdt.h> 17#include <linux/cache.h> 18#include <asm/sections.h> 19#include <asm/arcregs.h> 20#include <asm/tlb.h> 21#include <asm/setup.h> 22#include <asm/page.h> 23#include <asm/irq.h> 24#include <asm/prom.h> 25#include <asm/unwind.h> 26#include <asm/clk.h> 27#include <asm/mach_desc.h> 28 29#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) 30 31int running_on_hw = 1; /* vs. on ISS */ 32 33char __initdata command_line[COMMAND_LINE_SIZE]; 34struct machine_desc *machine_desc __cpuinitdata; 35 36struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ 37 38struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; 39 40 41void __cpuinit read_arc_build_cfg_regs(void) 42{ 43 struct bcr_perip uncached_space; 44 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 45 FIX_PTR(cpu); 46 47 READ_BCR(AUX_IDENTITY, cpu->core); 48 49 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR); 50 51 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); 52 if (cpu->vec_base == 0) 53 cpu->vec_base = (unsigned int)_int_vec_base_lds; 54 55 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 56 cpu->uncached_base = uncached_space.start << 24; 57 58 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR); 59 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR); 60 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR); 61 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR); 62 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR); 63 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul); 64 65 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR); 66 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR); 67 68 /* Note that we read the CCM BCRs independent of kernel config 69 * This is to catch the cases where user doesn't know that 70 * CCMs are present in hardware build 71 */ 72 { 73 struct bcr_iccm iccm; 74 struct bcr_dccm dccm; 75 struct bcr_dccm_base dccm_base; 76 unsigned int bcr_32bit_val; 77 78 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR); 79 if (bcr_32bit_val) { 80 iccm = *((struct bcr_iccm *)&bcr_32bit_val); 81 cpu->iccm.base_addr = iccm.base << 16; 82 cpu->iccm.sz = 0x2000 << (iccm.sz - 1); 83 } 84 85 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR); 86 if (bcr_32bit_val) { 87 dccm = *((struct bcr_dccm *)&bcr_32bit_val); 88 cpu->dccm.sz = 0x800 << (dccm.sz); 89 90 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base); 91 cpu->dccm.base_addr = dccm_base.addr << 8; 92 } 93 } 94 95 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem); 96 97 read_decode_mmu_bcr(); 98 read_decode_cache_bcr(); 99 100 READ_BCR(ARC_REG_FP_BCR, cpu->fp); 101 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp); 102} 103 104static const struct cpuinfo_data arc_cpu_tbl[] = { 105 { {0x10, "ARCTangent A5"}, 0x1F}, 106 { {0x20, "ARC 600" }, 0x2F}, 107 { {0x30, "ARC 700" }, 0x33}, 108 { {0x34, "ARC 700 R4.10"}, 0x34}, 109 { {0x00, NULL } } 110}; 111 112char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) 113{ 114 int n = 0; 115 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 116 struct bcr_identity *core = &cpu->core; 117 const struct cpuinfo_data *tbl; 118 int be = 0; 119#ifdef CONFIG_CPU_BIG_ENDIAN 120 be = 1; 121#endif 122 FIX_PTR(cpu); 123 124 n += scnprintf(buf + n, len - n, 125 "\nARC IDENTITY\t: Family [%#02x]" 126 " Cpu-id [%#02x] Chip-id [%#4x]\n", 127 core->family, core->cpu_id, 128 core->chip_id); 129 130 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) { 131 if ((core->family >= tbl->info.id) && 132 (core->family <= tbl->up_range)) { 133 n += scnprintf(buf + n, len - n, 134 "processor\t: %s %s\n", 135 tbl->info.str, 136 be ? "[Big Endian]" : ""); 137 break; 138 } 139 } 140 141 if (tbl->info.id == 0) 142 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n"); 143 144 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n", 145 (unsigned int)(arc_get_core_freq() / 1000000), 146 (unsigned int)(arc_get_core_freq() / 10000) % 100); 147 148 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n", 149 (cpu->timers & 0x200) ? "TIMER1" : "", 150 (cpu->timers & 0x100) ? "TIMER0" : ""); 151 152 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n", 153 cpu->vec_base); 154 155 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n", 156 cpu->uncached_base); 157 158 return buf; 159} 160 161static const struct id_to_str mul_type_nm[] = { 162 { 0x0, "N/A"}, 163 { 0x1, "32x32 (spl Result Reg)" }, 164 { 0x2, "32x32 (ANY Result Reg)" } 165}; 166 167static const struct id_to_str mac_mul_nm[] = { 168 {0x0, "N/A"}, 169 {0x1, "N/A"}, 170 {0x2, "Dual 16 x 16"}, 171 {0x3, "N/A"}, 172 {0x4, "32x16"}, 173 {0x5, "N/A"}, 174 {0x6, "Dual 16x16 and 32x16"} 175}; 176 177char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) 178{ 179 int n = 0; 180 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 181 182 FIX_PTR(cpu); 183#define IS_AVAIL1(var, str) ((var) ? str : "") 184#define IS_AVAIL2(var, str) ((var == 0x2) ? str : "") 185#define IS_USED(var) ((var) ? "(in-use)" : "(not used)") 186 187 n += scnprintf(buf + n, len - n, 188 "Extn [700-Base]\t: %s %s %s %s %s %s\n", 189 IS_AVAIL2(cpu->extn.norm, "norm,"), 190 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"), 191 IS_AVAIL1(cpu->extn.swap, "swap,"), 192 IS_AVAIL2(cpu->extn.minmax, "minmax,"), 193 IS_AVAIL1(cpu->extn.crc, "crc,"), 194 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith")); 195 196 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s", 197 mul_type_nm[cpu->extn.mul].str); 198 199 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n", 200 mac_mul_nm[cpu->extn_mac_mul.type].str); 201 202 if (cpu->core.family == 0x34) { 203 n += scnprintf(buf + n, len - n, 204 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n", 205 IS_USED(__CONFIG_ARC_HAS_LLSC_VAL), 206 IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL), 207 IS_USED(__CONFIG_ARC_HAS_RTSC_VAL)); 208 } 209 210 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s", 211 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : ""); 212 213 if (cpu->dccm.sz) 214 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ", 215 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz)); 216 217 if (cpu->iccm.sz) 218 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB", 219 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz)); 220 221 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s", 222 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : ""); 223 224 if (cpu->fp.ver) 225 n += scnprintf(buf + n, len - n, "SP [v%d] %s", 226 cpu->fp.ver, cpu->fp.fast ? "(fast)" : ""); 227 228 if (cpu->dpfp.ver) 229 n += scnprintf(buf + n, len - n, "DP [v%d] %s", 230 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : ""); 231 232 n += scnprintf(buf + n, len - n, "\n"); 233 234 n += scnprintf(buf + n, len - n, 235 "OS ABI [v3]\t: no-legacy-syscalls\n"); 236 237 return buf; 238} 239 240void __cpuinit arc_chk_ccms(void) 241{ 242#if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM) 243 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 244 245#ifdef CONFIG_ARC_HAS_DCCM 246 /* 247 * DCCM can be arbit placed in hardware. 248 * Make sure it's placement/sz matches what Linux is built with 249 */ 250 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr) 251 panic("Linux built with incorrect DCCM Base address\n"); 252 253 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz) 254 panic("Linux built with incorrect DCCM Size\n"); 255#endif 256 257#ifdef CONFIG_ARC_HAS_ICCM 258 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz) 259 panic("Linux built with incorrect ICCM Size\n"); 260#endif 261#endif 262} 263 264/* 265 * Ensure that FP hardware and kernel config match 266 * -If hardware contains DPFP, kernel needs to save/restore FPU state 267 * across context switches 268 * -If hardware lacks DPFP, but kernel configured to save FPU state then 269 * kernel trying to access non-existant DPFP regs will crash 270 * 271 * We only check for Dbl precision Floating Point, because only DPFP 272 * hardware has dedicated regs which need to be saved/restored on ctx-sw 273 * (Single Precision uses core regs), thus kernel is kind of oblivious to it 274 */ 275void __cpuinit arc_chk_fpu(void) 276{ 277 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 278 279 if (cpu->dpfp.ver) { 280#ifndef CONFIG_ARC_FPU_SAVE_RESTORE 281 pr_warn("DPFP support broken in this kernel...\n"); 282#endif 283 } else { 284#ifdef CONFIG_ARC_FPU_SAVE_RESTORE 285 panic("H/w lacks DPFP support, apps won't work\n"); 286#endif 287 } 288} 289 290/* 291 * Initialize and setup the processor core 292 * This is called by all the CPUs thus should not do special case stuff 293 * such as only for boot CPU etc 294 */ 295 296void __cpuinit setup_processor(void) 297{ 298 char str[512]; 299 int cpu_id = smp_processor_id(); 300 301 read_arc_build_cfg_regs(); 302 arc_init_IRQ(); 303 304 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); 305 306 arc_mmu_init(); 307 arc_cache_init(); 308 arc_chk_ccms(); 309 310 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str))); 311 312#ifdef CONFIG_SMP 313 printk(arc_platform_smp_cpuinfo()); 314#endif 315 316 arc_chk_fpu(); 317} 318 319void __init setup_arch(char **cmdline_p) 320{ 321#ifdef CONFIG_CMDLINE_UBOOT 322 /* Make sure that a whitespace is inserted before */ 323 strlcat(command_line, " ", sizeof(command_line)); 324#endif 325 /* 326 * Append .config cmdline to base command line, which might already 327 * contain u-boot "bootargs" (handled by head.S, if so configured) 328 */ 329 strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line)); 330 331 /* Save unparsed command line copy for /proc/cmdline */ 332 strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); 333 *cmdline_p = command_line; 334 335 machine_desc = setup_machine_fdt(__dtb_start); 336 if (!machine_desc) 337 panic("Embedded DT invalid\n"); 338 339 /* To force early parsing of things like mem=xxx */ 340 parse_early_param(); 341 342 /* Platform/board specific: e.g. early console registration */ 343 if (machine_desc->init_early) 344 machine_desc->init_early(); 345 346 setup_processor(); 347 348#ifdef CONFIG_SMP 349 smp_init_cpus(); 350#endif 351 352 setup_arch_memory(); 353 354 /* copy flat DT out of .init and then unflatten it */ 355 copy_devtree(); 356 unflatten_device_tree(); 357 358 /* Can be issue if someone passes cmd line arg "ro" 359 * But that is unlikely so keeping it as it is 360 */ 361 root_mountflags &= ~MS_RDONLY; 362 363 console_verbose(); 364 365#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE) 366 conswitchp = &dummy_con; 367#endif 368 369 arc_unwind_init(); 370 arc_unwind_setup(); 371} 372 373static int __init customize_machine(void) 374{ 375 /* Add platform devices */ 376 if (machine_desc->init_machine) 377 machine_desc->init_machine(); 378 379 return 0; 380} 381arch_initcall(customize_machine); 382 383static int __init init_late_machine(void) 384{ 385 if (machine_desc->init_late) 386 machine_desc->init_late(); 387 388 return 0; 389} 390late_initcall(init_late_machine); 391/* 392 * Get CPU information for use by the procfs. 393 */ 394 395#define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c))) 396#define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p)) 397 398static int show_cpuinfo(struct seq_file *m, void *v) 399{ 400 char *str; 401 int cpu_id = ptr_to_cpu(v); 402 403 str = (char *)__get_free_page(GFP_TEMPORARY); 404 if (!str) 405 goto done; 406 407 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 408 409 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n", 410 loops_per_jiffy / (500000 / HZ), 411 (loops_per_jiffy / (5000 / HZ)) % 100); 412 413 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 414 415 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE)); 416 417 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE)); 418 419#ifdef CONFIG_SMP 420 seq_printf(m, arc_platform_smp_cpuinfo()); 421#endif 422 423 free_page((unsigned long)str); 424done: 425 seq_printf(m, "\n\n"); 426 427 return 0; 428} 429 430static void *c_start(struct seq_file *m, loff_t *pos) 431{ 432 /* 433 * Callback returns cpu-id to iterator for show routine, NULL to stop. 434 * However since NULL is also a valid cpu-id (0), we use a round-about 435 * way to pass it w/o having to kmalloc/free a 2 byte string. 436 * Encode cpu-id as 0xFFcccc, which is decoded by show routine. 437 */ 438 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL; 439} 440 441static void *c_next(struct seq_file *m, void *v, loff_t *pos) 442{ 443 ++*pos; 444 return c_start(m, pos); 445} 446 447static void c_stop(struct seq_file *m, void *v) 448{ 449} 450 451const struct seq_operations cpuinfo_op = { 452 .start = c_start, 453 .next = c_next, 454 .stop = c_stop, 455 .show = show_cpuinfo 456}; 457 458static DEFINE_PER_CPU(struct cpu, cpu_topology); 459 460static int __init topology_init(void) 461{ 462 int cpu; 463 464 for_each_present_cpu(cpu) 465 register_cpu(&per_cpu(cpu_topology, cpu), cpu); 466 467 return 0; 468} 469 470subsys_initcall(topology_init); 471