sa1111.c revision 055d1965161bde96207371e7d31eb776c0f7790d
1/* 2 * linux/arch/arm/common/sa1111.c 3 * 4 * SA1111 support 5 * 6 * Original code by John Dorsey 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This file contains all generic SA1111 support. 13 * 14 * All initialization functions provided here are intended to be called 15 * from machine specific code with proper arguments when required. 16 */ 17#include <linux/module.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/delay.h> 21#include <linux/errno.h> 22#include <linux/ioport.h> 23#include <linux/platform_device.h> 24#include <linux/slab.h> 25#include <linux/spinlock.h> 26#include <linux/dma-mapping.h> 27#include <linux/clk.h> 28#include <linux/io.h> 29 30#include <mach/hardware.h> 31#include <asm/mach-types.h> 32#include <asm/irq.h> 33#include <asm/mach/irq.h> 34#include <asm/sizes.h> 35 36#include <asm/hardware/sa1111.h> 37 38/* SA1111 IRQs */ 39#define IRQ_GPAIN0 (0) 40#define IRQ_GPAIN1 (1) 41#define IRQ_GPAIN2 (2) 42#define IRQ_GPAIN3 (3) 43#define IRQ_GPBIN0 (4) 44#define IRQ_GPBIN1 (5) 45#define IRQ_GPBIN2 (6) 46#define IRQ_GPBIN3 (7) 47#define IRQ_GPBIN4 (8) 48#define IRQ_GPBIN5 (9) 49#define IRQ_GPCIN0 (10) 50#define IRQ_GPCIN1 (11) 51#define IRQ_GPCIN2 (12) 52#define IRQ_GPCIN3 (13) 53#define IRQ_GPCIN4 (14) 54#define IRQ_GPCIN5 (15) 55#define IRQ_GPCIN6 (16) 56#define IRQ_GPCIN7 (17) 57#define IRQ_MSTXINT (18) 58#define IRQ_MSRXINT (19) 59#define IRQ_MSSTOPERRINT (20) 60#define IRQ_TPTXINT (21) 61#define IRQ_TPRXINT (22) 62#define IRQ_TPSTOPERRINT (23) 63#define SSPXMTINT (24) 64#define SSPRCVINT (25) 65#define SSPROR (26) 66#define AUDXMTDMADONEA (32) 67#define AUDRCVDMADONEA (33) 68#define AUDXMTDMADONEB (34) 69#define AUDRCVDMADONEB (35) 70#define AUDTFSR (36) 71#define AUDRFSR (37) 72#define AUDTUR (38) 73#define AUDROR (39) 74#define AUDDTS (40) 75#define AUDRDD (41) 76#define AUDSTO (42) 77#define IRQ_USBPWR (43) 78#define IRQ_HCIM (44) 79#define IRQ_HCIBUFFACC (45) 80#define IRQ_HCIRMTWKP (46) 81#define IRQ_NHCIMFCIR (47) 82#define IRQ_USB_PORT_RESUME (48) 83#define IRQ_S0_READY_NINT (49) 84#define IRQ_S1_READY_NINT (50) 85#define IRQ_S0_CD_VALID (51) 86#define IRQ_S1_CD_VALID (52) 87#define IRQ_S0_BVD1_STSCHG (53) 88#define IRQ_S1_BVD1_STSCHG (54) 89 90extern void __init sa1110_mb_enable(void); 91 92/* 93 * We keep the following data for the overall SA1111. Note that the 94 * struct device and struct resource are "fake"; they should be supplied 95 * by the bus above us. However, in the interests of getting all SA1111 96 * drivers converted over to the device model, we provide this as an 97 * anchor point for all the other drivers. 98 */ 99struct sa1111 { 100 struct device *dev; 101 struct clk *clk; 102 unsigned long phys; 103 int irq; 104 int irq_base; /* base for cascaded on-chip IRQs */ 105 spinlock_t lock; 106 void __iomem *base; 107#ifdef CONFIG_PM 108 void *saved_state; 109#endif 110}; 111 112/* 113 * We _really_ need to eliminate this. Its only users 114 * are the PWM and DMA checking code. 115 */ 116static struct sa1111 *g_sa1111; 117 118struct sa1111_dev_info { 119 unsigned long offset; 120 unsigned long skpcr_mask; 121 unsigned int devid; 122 unsigned int irq[6]; 123}; 124 125static struct sa1111_dev_info sa1111_devices[] = { 126 { 127 .offset = SA1111_USB, 128 .skpcr_mask = SKPCR_UCLKEN, 129 .devid = SA1111_DEVID_USB, 130 .irq = { 131 IRQ_USBPWR, 132 IRQ_HCIM, 133 IRQ_HCIBUFFACC, 134 IRQ_HCIRMTWKP, 135 IRQ_NHCIMFCIR, 136 IRQ_USB_PORT_RESUME 137 }, 138 }, 139 { 140 .offset = 0x0600, 141 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, 142 .devid = SA1111_DEVID_SAC, 143 .irq = { 144 AUDXMTDMADONEA, 145 AUDXMTDMADONEB, 146 AUDRCVDMADONEA, 147 AUDRCVDMADONEB 148 }, 149 }, 150 { 151 .offset = 0x0800, 152 .skpcr_mask = SKPCR_SCLKEN, 153 .devid = SA1111_DEVID_SSP, 154 }, 155 { 156 .offset = SA1111_KBD, 157 .skpcr_mask = SKPCR_PTCLKEN, 158 .devid = SA1111_DEVID_PS2, 159 .irq = { 160 IRQ_TPRXINT, 161 IRQ_TPTXINT 162 }, 163 }, 164 { 165 .offset = SA1111_MSE, 166 .skpcr_mask = SKPCR_PMCLKEN, 167 .devid = SA1111_DEVID_PS2, 168 .irq = { 169 IRQ_MSRXINT, 170 IRQ_MSTXINT 171 }, 172 }, 173 { 174 .offset = 0x1800, 175 .skpcr_mask = 0, 176 .devid = SA1111_DEVID_PCMCIA, 177 .irq = { 178 IRQ_S0_READY_NINT, 179 IRQ_S0_CD_VALID, 180 IRQ_S0_BVD1_STSCHG, 181 IRQ_S1_READY_NINT, 182 IRQ_S1_CD_VALID, 183 IRQ_S1_BVD1_STSCHG, 184 }, 185 }, 186}; 187 188void __init sa1111_adjust_zones(unsigned long *size, unsigned long *holes) 189{ 190 unsigned int sz = SZ_1M >> PAGE_SHIFT; 191 192 size[1] = size[0] - sz; 193 size[0] = sz; 194} 195 196/* 197 * SA1111 interrupt support. Since clearing an IRQ while there are 198 * active IRQs causes the interrupt output to pulse, the upper levels 199 * will call us again if there are more interrupts to process. 200 */ 201static void 202sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 203{ 204 unsigned int stat0, stat1, i; 205 struct sa1111 *sachip = get_irq_data(irq); 206 void __iomem *mapbase = sachip->base + SA1111_INTC; 207 208 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 209 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); 210 211 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 212 213 desc->chip->ack(irq); 214 215 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 216 217 if (stat0 == 0 && stat1 == 0) { 218 do_bad_IRQ(irq, desc); 219 return; 220 } 221 222 for (i = 0; stat0; i++, stat0 >>= 1) 223 if (stat0 & 1) 224 generic_handle_irq(i + sachip->irq_base); 225 226 for (i = 32; stat1; i++, stat1 >>= 1) 227 if (stat1 & 1) 228 generic_handle_irq(i + sachip->irq_base); 229 230 /* For level-based interrupts */ 231 desc->chip->unmask(irq); 232} 233 234#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 235#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 236 237static void sa1111_ack_irq(unsigned int irq) 238{ 239} 240 241static void sa1111_mask_lowirq(unsigned int irq) 242{ 243 struct sa1111 *sachip = get_irq_chip_data(irq); 244 void __iomem *mapbase = sachip->base + SA1111_INTC; 245 unsigned long ie0; 246 247 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 248 ie0 &= ~SA1111_IRQMASK_LO(irq); 249 writel(ie0, mapbase + SA1111_INTEN0); 250} 251 252static void sa1111_unmask_lowirq(unsigned int irq) 253{ 254 struct sa1111 *sachip = get_irq_chip_data(irq); 255 void __iomem *mapbase = sachip->base + SA1111_INTC; 256 unsigned long ie0; 257 258 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 259 ie0 |= SA1111_IRQMASK_LO(irq); 260 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 261} 262 263/* 264 * Attempt to re-trigger the interrupt. The SA1111 contains a register 265 * (INTSET) which claims to do this. However, in practice no amount of 266 * manipulation of INTEN and INTSET guarantees that the interrupt will 267 * be triggered. In fact, its very difficult, if not impossible to get 268 * INTSET to re-trigger the interrupt. 269 */ 270static int sa1111_retrigger_lowirq(unsigned int irq) 271{ 272 struct sa1111 *sachip = get_irq_chip_data(irq); 273 void __iomem *mapbase = sachip->base + SA1111_INTC; 274 unsigned int mask = SA1111_IRQMASK_LO(irq); 275 unsigned long ip0; 276 int i; 277 278 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 279 for (i = 0; i < 8; i++) { 280 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 281 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 282 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 283 break; 284 } 285 286 if (i == 8) 287 printk(KERN_ERR "Danger Will Robinson: failed to " 288 "re-trigger IRQ%d\n", irq); 289 return i == 8 ? -1 : 0; 290} 291 292static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 293{ 294 struct sa1111 *sachip = get_irq_chip_data(irq); 295 void __iomem *mapbase = sachip->base + SA1111_INTC; 296 unsigned int mask = SA1111_IRQMASK_LO(irq); 297 unsigned long ip0; 298 299 if (flags == IRQ_TYPE_PROBE) 300 return 0; 301 302 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 303 return -EINVAL; 304 305 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 306 if (flags & IRQ_TYPE_EDGE_RISING) 307 ip0 &= ~mask; 308 else 309 ip0 |= mask; 310 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 311 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); 312 313 return 0; 314} 315 316static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 317{ 318 struct sa1111 *sachip = get_irq_chip_data(irq); 319 void __iomem *mapbase = sachip->base + SA1111_INTC; 320 unsigned int mask = SA1111_IRQMASK_LO(irq); 321 unsigned long we0; 322 323 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 324 if (on) 325 we0 |= mask; 326 else 327 we0 &= ~mask; 328 sa1111_writel(we0, mapbase + SA1111_WAKEEN0); 329 330 return 0; 331} 332 333static struct irq_chip sa1111_low_chip = { 334 .name = "SA1111-l", 335 .ack = sa1111_ack_irq, 336 .mask = sa1111_mask_lowirq, 337 .unmask = sa1111_unmask_lowirq, 338 .retrigger = sa1111_retrigger_lowirq, 339 .set_type = sa1111_type_lowirq, 340 .set_wake = sa1111_wake_lowirq, 341}; 342 343static void sa1111_mask_highirq(unsigned int irq) 344{ 345 struct sa1111 *sachip = get_irq_chip_data(irq); 346 void __iomem *mapbase = sachip->base + SA1111_INTC; 347 unsigned long ie1; 348 349 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 350 ie1 &= ~SA1111_IRQMASK_HI(irq); 351 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 352} 353 354static void sa1111_unmask_highirq(unsigned int irq) 355{ 356 struct sa1111 *sachip = get_irq_chip_data(irq); 357 void __iomem *mapbase = sachip->base + SA1111_INTC; 358 unsigned long ie1; 359 360 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 361 ie1 |= SA1111_IRQMASK_HI(irq); 362 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 363} 364 365/* 366 * Attempt to re-trigger the interrupt. The SA1111 contains a register 367 * (INTSET) which claims to do this. However, in practice no amount of 368 * manipulation of INTEN and INTSET guarantees that the interrupt will 369 * be triggered. In fact, its very difficult, if not impossible to get 370 * INTSET to re-trigger the interrupt. 371 */ 372static int sa1111_retrigger_highirq(unsigned int irq) 373{ 374 struct sa1111 *sachip = get_irq_chip_data(irq); 375 void __iomem *mapbase = sachip->base + SA1111_INTC; 376 unsigned int mask = SA1111_IRQMASK_HI(irq); 377 unsigned long ip1; 378 int i; 379 380 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 381 for (i = 0; i < 8; i++) { 382 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); 383 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 384 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 385 break; 386 } 387 388 if (i == 8) 389 printk(KERN_ERR "Danger Will Robinson: failed to " 390 "re-trigger IRQ%d\n", irq); 391 return i == 8 ? -1 : 0; 392} 393 394static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 395{ 396 struct sa1111 *sachip = get_irq_chip_data(irq); 397 void __iomem *mapbase = sachip->base + SA1111_INTC; 398 unsigned int mask = SA1111_IRQMASK_HI(irq); 399 unsigned long ip1; 400 401 if (flags == IRQ_TYPE_PROBE) 402 return 0; 403 404 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 405 return -EINVAL; 406 407 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 408 if (flags & IRQ_TYPE_EDGE_RISING) 409 ip1 &= ~mask; 410 else 411 ip1 |= mask; 412 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 413 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); 414 415 return 0; 416} 417 418static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 419{ 420 struct sa1111 *sachip = get_irq_chip_data(irq); 421 void __iomem *mapbase = sachip->base + SA1111_INTC; 422 unsigned int mask = SA1111_IRQMASK_HI(irq); 423 unsigned long we1; 424 425 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 426 if (on) 427 we1 |= mask; 428 else 429 we1 &= ~mask; 430 sa1111_writel(we1, mapbase + SA1111_WAKEEN1); 431 432 return 0; 433} 434 435static struct irq_chip sa1111_high_chip = { 436 .name = "SA1111-h", 437 .ack = sa1111_ack_irq, 438 .mask = sa1111_mask_highirq, 439 .unmask = sa1111_unmask_highirq, 440 .retrigger = sa1111_retrigger_highirq, 441 .set_type = sa1111_type_highirq, 442 .set_wake = sa1111_wake_highirq, 443}; 444 445static void sa1111_setup_irq(struct sa1111 *sachip) 446{ 447 void __iomem *irqbase = sachip->base + SA1111_INTC; 448 unsigned int irq; 449 450 /* 451 * We're guaranteed that this region hasn't been taken. 452 */ 453 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); 454 455 /* disable all IRQs */ 456 sa1111_writel(0, irqbase + SA1111_INTEN0); 457 sa1111_writel(0, irqbase + SA1111_INTEN1); 458 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 459 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 460 461 /* 462 * detect on rising edge. Note: Feb 2001 Errata for SA1111 463 * specifies that S0ReadyInt and S1ReadyInt should be '1'. 464 */ 465 sa1111_writel(0, irqbase + SA1111_INTPOL0); 466 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | 467 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), 468 irqbase + SA1111_INTPOL1); 469 470 /* clear all IRQs */ 471 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); 472 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 473 474 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 475 set_irq_chip(irq, &sa1111_low_chip); 476 set_irq_chip_data(irq, sachip); 477 set_irq_handler(irq, handle_edge_irq); 478 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 479 } 480 481 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 482 set_irq_chip(irq, &sa1111_high_chip); 483 set_irq_chip_data(irq, sachip); 484 set_irq_handler(irq, handle_edge_irq); 485 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 486 } 487 488 /* 489 * Register SA1111 interrupt 490 */ 491 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 492 set_irq_data(sachip->irq, sachip); 493 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 494} 495 496/* 497 * Bring the SA1111 out of reset. This requires a set procedure: 498 * 1. nRESET asserted (by hardware) 499 * 2. CLK turned on from SA1110 500 * 3. nRESET deasserted 501 * 4. VCO turned on, PLL_BYPASS turned off 502 * 5. Wait lock time, then assert RCLKEn 503 * 7. PCR set to allow clocking of individual functions 504 * 505 * Until we've done this, the only registers we can access are: 506 * SBI_SKCR 507 * SBI_SMCR 508 * SBI_SKID 509 */ 510static void sa1111_wake(struct sa1111 *sachip) 511{ 512 unsigned long flags, r; 513 514 spin_lock_irqsave(&sachip->lock, flags); 515 516 clk_enable(sachip->clk); 517 518 /* 519 * Turn VCO on, and disable PLL Bypass. 520 */ 521 r = sa1111_readl(sachip->base + SA1111_SKCR); 522 r &= ~SKCR_VCO_OFF; 523 sa1111_writel(r, sachip->base + SA1111_SKCR); 524 r |= SKCR_PLL_BYPASS | SKCR_OE_EN; 525 sa1111_writel(r, sachip->base + SA1111_SKCR); 526 527 /* 528 * Wait lock time. SA1111 manual _doesn't_ 529 * specify a figure for this! We choose 100us. 530 */ 531 udelay(100); 532 533 /* 534 * Enable RCLK. We also ensure that RDYEN is set. 535 */ 536 r |= SKCR_RCLKEN | SKCR_RDYEN; 537 sa1111_writel(r, sachip->base + SA1111_SKCR); 538 539 /* 540 * Wait 14 RCLK cycles for the chip to finish coming out 541 * of reset. (RCLK=24MHz). This is 590ns. 542 */ 543 udelay(1); 544 545 /* 546 * Ensure all clocks are initially off. 547 */ 548 sa1111_writel(0, sachip->base + SA1111_SKPCR); 549 550 spin_unlock_irqrestore(&sachip->lock, flags); 551} 552 553#ifdef CONFIG_ARCH_SA1100 554 555static u32 sa1111_dma_mask[] = { 556 ~0, 557 ~(1 << 20), 558 ~(1 << 23), 559 ~(1 << 24), 560 ~(1 << 25), 561 ~(1 << 20), 562 ~(1 << 20), 563 0, 564}; 565 566/* 567 * Configure the SA1111 shared memory controller. 568 */ 569void 570sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, 571 unsigned int cas_latency) 572{ 573 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); 574 575 if (cas_latency == 3) 576 smcr |= SMCR_CLAT; 577 578 sa1111_writel(smcr, sachip->base + SA1111_SMCR); 579 580 /* 581 * Now clear the bits in the DMA mask to work around the SA1111 582 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion 583 * Chip Specification Update, June 2000, Erratum #7). 584 */ 585 if (sachip->dev->dma_mask) 586 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; 587 588 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; 589} 590 591#endif 592 593static void sa1111_dev_release(struct device *_dev) 594{ 595 struct sa1111_dev *dev = SA1111_DEV(_dev); 596 597 release_resource(&dev->res); 598 kfree(dev); 599} 600 601static int 602sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, 603 struct sa1111_dev_info *info) 604{ 605 struct sa1111_dev *dev; 606 int ret; 607 608 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); 609 if (!dev) { 610 ret = -ENOMEM; 611 goto out; 612 } 613 614 dev_set_name(&dev->dev, "%4.4lx", info->offset); 615 dev->devid = info->devid; 616 dev->dev.parent = sachip->dev; 617 dev->dev.bus = &sa1111_bus_type; 618 dev->dev.release = sa1111_dev_release; 619 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; 620 dev->res.start = sachip->phys + info->offset; 621 dev->res.end = dev->res.start + 511; 622 dev->res.name = dev_name(&dev->dev); 623 dev->res.flags = IORESOURCE_MEM; 624 dev->mapbase = sachip->base + info->offset; 625 dev->skpcr_mask = info->skpcr_mask; 626 memmove(dev->irq, info->irq, sizeof(dev->irq)); 627 628 ret = request_resource(parent, &dev->res); 629 if (ret) { 630 printk("SA1111: failed to allocate resource for %s\n", 631 dev->res.name); 632 dev_set_name(&dev->dev, NULL); 633 kfree(dev); 634 goto out; 635 } 636 637 638 ret = device_register(&dev->dev); 639 if (ret) { 640 release_resource(&dev->res); 641 kfree(dev); 642 goto out; 643 } 644 645#ifdef CONFIG_DMABOUNCE 646 /* 647 * If the parent device has a DMA mask associated with it, 648 * propagate it down to the children. 649 */ 650 if (sachip->dev->dma_mask) { 651 dev->dma_mask = *sachip->dev->dma_mask; 652 dev->dev.dma_mask = &dev->dma_mask; 653 654 if (dev->dma_mask != 0xffffffffUL) { 655 ret = dmabounce_register_dev(&dev->dev, 1024, 4096); 656 if (ret) { 657 dev_err(&dev->dev, "SA1111: Failed to register" 658 " with dmabounce\n"); 659 device_unregister(&dev->dev); 660 } 661 } 662 } 663#endif 664 665out: 666 return ret; 667} 668 669/** 670 * sa1111_probe - probe for a single SA1111 chip. 671 * @phys_addr: physical address of device. 672 * 673 * Probe for a SA1111 chip. This must be called 674 * before any other SA1111-specific code. 675 * 676 * Returns: 677 * %-ENODEV device not found. 678 * %-EBUSY physical address already marked in-use. 679 * %0 successful. 680 */ 681static int __devinit 682__sa1111_probe(struct device *me, struct resource *mem, int irq) 683{ 684 struct sa1111 *sachip; 685 unsigned long id; 686 unsigned int has_devs; 687 int i, ret = -ENODEV; 688 689 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); 690 if (!sachip) 691 return -ENOMEM; 692 693 sachip->clk = clk_get(me, "SA1111_CLK"); 694 if (IS_ERR(sachip->clk)) { 695 ret = PTR_ERR(sachip->clk); 696 goto err_free; 697 } 698 699 spin_lock_init(&sachip->lock); 700 701 sachip->dev = me; 702 dev_set_drvdata(sachip->dev, sachip); 703 704 sachip->phys = mem->start; 705 sachip->irq = irq; 706 707 /* 708 * Map the whole region. This also maps the 709 * registers for our children. 710 */ 711 sachip->base = ioremap(mem->start, PAGE_SIZE * 2); 712 if (!sachip->base) { 713 ret = -ENOMEM; 714 goto err_clkput; 715 } 716 717 /* 718 * Probe for the chip. Only touch the SBI registers. 719 */ 720 id = sa1111_readl(sachip->base + SA1111_SKID); 721 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 722 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); 723 ret = -ENODEV; 724 goto err_unmap; 725 } 726 727 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " 728 "silicon revision %lx, metal revision %lx\n", 729 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); 730 731 /* 732 * We found it. Wake the chip up, and initialise. 733 */ 734 sa1111_wake(sachip); 735 736#ifdef CONFIG_ARCH_SA1100 737 { 738 unsigned int val; 739 740 /* 741 * The SDRAM configuration of the SA1110 and the SA1111 must 742 * match. This is very important to ensure that SA1111 accesses 743 * don't corrupt the SDRAM. Note that this ungates the SA1111's 744 * MBGNT signal, so we must have called sa1110_mb_disable() 745 * beforehand. 746 */ 747 sa1111_configure_smc(sachip, 1, 748 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), 749 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); 750 751 /* 752 * We only need to turn on DCLK whenever we want to use the 753 * DMA. It can otherwise be held firmly in the off position. 754 * (currently, we always enable it.) 755 */ 756 val = sa1111_readl(sachip->base + SA1111_SKPCR); 757 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); 758 759 /* 760 * Enable the SA1110 memory bus request and grant signals. 761 */ 762 sa1110_mb_enable(); 763 } 764#endif 765 766 /* 767 * The interrupt controller must be initialised before any 768 * other device to ensure that the interrupts are available. 769 */ 770 if (sachip->irq != NO_IRQ) 771 sa1111_setup_irq(sachip); 772 773 g_sa1111 = sachip; 774 775 has_devs = ~0; 776 if (machine_is_assabet() || machine_is_jornada720() || 777 machine_is_badge4()) 778 has_devs &= ~(1 << 4); 779 else 780 has_devs &= ~(1 << 1); 781 782 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) 783 if (has_devs & (1 << i)) 784 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); 785 786 return 0; 787 788 err_unmap: 789 iounmap(sachip->base); 790 err_clkput: 791 clk_put(sachip->clk); 792 err_free: 793 kfree(sachip); 794 return ret; 795} 796 797static int sa1111_remove_one(struct device *dev, void *data) 798{ 799 device_unregister(dev); 800 return 0; 801} 802 803static void __sa1111_remove(struct sa1111 *sachip) 804{ 805 void __iomem *irqbase = sachip->base + SA1111_INTC; 806 807 device_for_each_child(sachip->dev, NULL, sa1111_remove_one); 808 809 /* disable all IRQs */ 810 sa1111_writel(0, irqbase + SA1111_INTEN0); 811 sa1111_writel(0, irqbase + SA1111_INTEN1); 812 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 813 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 814 815 clk_disable(sachip->clk); 816 817 if (sachip->irq != NO_IRQ) { 818 set_irq_chained_handler(sachip->irq, NULL); 819 set_irq_data(sachip->irq, NULL); 820 821 release_mem_region(sachip->phys + SA1111_INTC, 512); 822 } 823 824 iounmap(sachip->base); 825 clk_put(sachip->clk); 826 kfree(sachip); 827} 828 829/* 830 * According to the "Intel StrongARM SA-1111 Microprocessor Companion 831 * Chip Specification Update" (June 2000), erratum #7, there is a 832 * significant bug in the SA1111 SDRAM shared memory controller. If 833 * an access to a region of memory above 1MB relative to the bank base, 834 * it is important that address bit 10 _NOT_ be asserted. Depending 835 * on the configuration of the RAM, bit 10 may correspond to one 836 * of several different (processor-relative) address bits. 837 * 838 * This routine only identifies whether or not a given DMA address 839 * is susceptible to the bug. 840 * 841 * This should only get called for sa1111_device types due to the 842 * way we configure our device dma_masks. 843 */ 844int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) 845{ 846 /* 847 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module 848 * User's Guide" mentions that jumpers R51 and R52 control the 849 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or 850 * SDRAM bank 1 on Neponset). The default configuration selects 851 * Assabet, so any address in bank 1 is necessarily invalid. 852 */ 853 return ((machine_is_assabet() || machine_is_pfs168()) && 854 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000)); 855} 856 857struct sa1111_save_data { 858 unsigned int skcr; 859 unsigned int skpcr; 860 unsigned int skcdr; 861 unsigned char skaud; 862 unsigned char skpwm0; 863 unsigned char skpwm1; 864 865 /* 866 * Interrupt controller 867 */ 868 unsigned int intpol0; 869 unsigned int intpol1; 870 unsigned int inten0; 871 unsigned int inten1; 872 unsigned int wakepol0; 873 unsigned int wakepol1; 874 unsigned int wakeen0; 875 unsigned int wakeen1; 876}; 877 878#ifdef CONFIG_PM 879 880static int sa1111_suspend(struct platform_device *dev, pm_message_t state) 881{ 882 struct sa1111 *sachip = platform_get_drvdata(dev); 883 struct sa1111_save_data *save; 884 unsigned long flags; 885 unsigned int val; 886 void __iomem *base; 887 888 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); 889 if (!save) 890 return -ENOMEM; 891 sachip->saved_state = save; 892 893 spin_lock_irqsave(&sachip->lock, flags); 894 895 /* 896 * Save state. 897 */ 898 base = sachip->base; 899 save->skcr = sa1111_readl(base + SA1111_SKCR); 900 save->skpcr = sa1111_readl(base + SA1111_SKPCR); 901 save->skcdr = sa1111_readl(base + SA1111_SKCDR); 902 save->skaud = sa1111_readl(base + SA1111_SKAUD); 903 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); 904 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); 905 906 base = sachip->base + SA1111_INTC; 907 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); 908 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); 909 save->inten0 = sa1111_readl(base + SA1111_INTEN0); 910 save->inten1 = sa1111_readl(base + SA1111_INTEN1); 911 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); 912 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); 913 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); 914 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); 915 916 /* 917 * Disable. 918 */ 919 val = sa1111_readl(sachip->base + SA1111_SKCR); 920 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); 921 sa1111_writel(0, sachip->base + SA1111_SKPWM0); 922 sa1111_writel(0, sachip->base + SA1111_SKPWM1); 923 924 clk_disable(sachip->clk); 925 926 spin_unlock_irqrestore(&sachip->lock, flags); 927 928 return 0; 929} 930 931/* 932 * sa1111_resume - Restore the SA1111 device state. 933 * @dev: device to restore 934 * 935 * Restore the general state of the SA1111; clock control and 936 * interrupt controller. Other parts of the SA1111 must be 937 * restored by their respective drivers, and must be called 938 * via LDM after this function. 939 */ 940static int sa1111_resume(struct platform_device *dev) 941{ 942 struct sa1111 *sachip = platform_get_drvdata(dev); 943 struct sa1111_save_data *save; 944 unsigned long flags, id; 945 void __iomem *base; 946 947 save = sachip->saved_state; 948 if (!save) 949 return 0; 950 951 /* 952 * Ensure that the SA1111 is still here. 953 * FIXME: shouldn't do this here. 954 */ 955 id = sa1111_readl(sachip->base + SA1111_SKID); 956 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 957 __sa1111_remove(sachip); 958 platform_set_drvdata(dev, NULL); 959 kfree(save); 960 return 0; 961 } 962 963 /* 964 * First of all, wake up the chip. 965 */ 966 sa1111_wake(sachip); 967 968 /* 969 * Only lock for write ops. Also, sa1111_wake must be called with 970 * released spinlock! 971 */ 972 spin_lock_irqsave(&sachip->lock, flags); 973 974 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 975 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 976 977 base = sachip->base; 978 sa1111_writel(save->skcr, base + SA1111_SKCR); 979 sa1111_writel(save->skpcr, base + SA1111_SKPCR); 980 sa1111_writel(save->skcdr, base + SA1111_SKCDR); 981 sa1111_writel(save->skaud, base + SA1111_SKAUD); 982 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); 983 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); 984 985 base = sachip->base + SA1111_INTC; 986 sa1111_writel(save->intpol0, base + SA1111_INTPOL0); 987 sa1111_writel(save->intpol1, base + SA1111_INTPOL1); 988 sa1111_writel(save->inten0, base + SA1111_INTEN0); 989 sa1111_writel(save->inten1, base + SA1111_INTEN1); 990 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); 991 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); 992 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); 993 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); 994 995 spin_unlock_irqrestore(&sachip->lock, flags); 996 997 sachip->saved_state = NULL; 998 kfree(save); 999 1000 return 0; 1001} 1002 1003#else 1004#define sa1111_suspend NULL 1005#define sa1111_resume NULL 1006#endif 1007 1008static int __devinit sa1111_probe(struct platform_device *pdev) 1009{ 1010 struct resource *mem; 1011 int irq; 1012 1013 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1014 if (!mem) 1015 return -EINVAL; 1016 irq = platform_get_irq(pdev, 0); 1017 if (irq < 0) 1018 return -ENXIO; 1019 1020 return __sa1111_probe(&pdev->dev, mem, irq); 1021} 1022 1023static int sa1111_remove(struct platform_device *pdev) 1024{ 1025 struct sa1111 *sachip = platform_get_drvdata(pdev); 1026 1027 if (sachip) { 1028#ifdef CONFIG_PM 1029 kfree(sachip->saved_state); 1030 sachip->saved_state = NULL; 1031#endif 1032 __sa1111_remove(sachip); 1033 platform_set_drvdata(pdev, NULL); 1034 } 1035 1036 return 0; 1037} 1038 1039/* 1040 * Not sure if this should be on the system bus or not yet. 1041 * We really want some way to register a system device at 1042 * the per-machine level, and then have this driver pick 1043 * up the registered devices. 1044 * 1045 * We also need to handle the SDRAM configuration for 1046 * PXA250/SA1110 machine classes. 1047 */ 1048static struct platform_driver sa1111_device_driver = { 1049 .probe = sa1111_probe, 1050 .remove = sa1111_remove, 1051 .suspend = sa1111_suspend, 1052 .resume = sa1111_resume, 1053 .driver = { 1054 .name = "sa1111", 1055 }, 1056}; 1057 1058/* 1059 * Get the parent device driver (us) structure 1060 * from a child function device 1061 */ 1062static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) 1063{ 1064 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); 1065} 1066 1067/* 1068 * The bits in the opdiv field are non-linear. 1069 */ 1070static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; 1071 1072static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) 1073{ 1074 unsigned int skcdr, fbdiv, ipdiv, opdiv; 1075 1076 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); 1077 1078 fbdiv = (skcdr & 0x007f) + 2; 1079 ipdiv = ((skcdr & 0x0f80) >> 7) + 2; 1080 opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; 1081 1082 return 3686400 * fbdiv / (ipdiv * opdiv); 1083} 1084 1085/** 1086 * sa1111_pll_clock - return the current PLL clock frequency. 1087 * @sadev: SA1111 function block 1088 * 1089 * BUG: we should look at SKCR. We also blindly believe that 1090 * the chip is being fed with the 3.6864MHz clock. 1091 * 1092 * Returns the PLL clock in Hz. 1093 */ 1094unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) 1095{ 1096 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1097 1098 return __sa1111_pll_clock(sachip); 1099} 1100EXPORT_SYMBOL(sa1111_pll_clock); 1101 1102/** 1103 * sa1111_select_audio_mode - select I2S or AC link mode 1104 * @sadev: SA1111 function block 1105 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S 1106 * 1107 * Frob the SKCR to select AC Link mode or I2S mode for 1108 * the audio block. 1109 */ 1110void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) 1111{ 1112 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1113 unsigned long flags; 1114 unsigned int val; 1115 1116 spin_lock_irqsave(&sachip->lock, flags); 1117 1118 val = sa1111_readl(sachip->base + SA1111_SKCR); 1119 if (mode == SA1111_AUDIO_I2S) { 1120 val &= ~SKCR_SELAC; 1121 } else { 1122 val |= SKCR_SELAC; 1123 } 1124 sa1111_writel(val, sachip->base + SA1111_SKCR); 1125 1126 spin_unlock_irqrestore(&sachip->lock, flags); 1127} 1128EXPORT_SYMBOL(sa1111_select_audio_mode); 1129 1130/** 1131 * sa1111_set_audio_rate - set the audio sample rate 1132 * @sadev: SA1111 SAC function block 1133 * @rate: sample rate to select 1134 */ 1135int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) 1136{ 1137 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1138 unsigned int div; 1139 1140 if (sadev->devid != SA1111_DEVID_SAC) 1141 return -EINVAL; 1142 1143 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; 1144 if (div == 0) 1145 div = 1; 1146 if (div > 128) 1147 div = 128; 1148 1149 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); 1150 1151 return 0; 1152} 1153EXPORT_SYMBOL(sa1111_set_audio_rate); 1154 1155/** 1156 * sa1111_get_audio_rate - get the audio sample rate 1157 * @sadev: SA1111 SAC function block device 1158 */ 1159int sa1111_get_audio_rate(struct sa1111_dev *sadev) 1160{ 1161 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1162 unsigned long div; 1163 1164 if (sadev->devid != SA1111_DEVID_SAC) 1165 return -EINVAL; 1166 1167 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; 1168 1169 return __sa1111_pll_clock(sachip) / (256 * div); 1170} 1171EXPORT_SYMBOL(sa1111_get_audio_rate); 1172 1173void sa1111_set_io_dir(struct sa1111_dev *sadev, 1174 unsigned int bits, unsigned int dir, 1175 unsigned int sleep_dir) 1176{ 1177 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1178 unsigned long flags; 1179 unsigned int val; 1180 void __iomem *gpio = sachip->base + SA1111_GPIO; 1181 1182#define MODIFY_BITS(port, mask, dir) \ 1183 if (mask) { \ 1184 val = sa1111_readl(port); \ 1185 val &= ~(mask); \ 1186 val |= (dir) & (mask); \ 1187 sa1111_writel(val, port); \ 1188 } 1189 1190 spin_lock_irqsave(&sachip->lock, flags); 1191 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); 1192 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); 1193 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); 1194 1195 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); 1196 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); 1197 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); 1198 spin_unlock_irqrestore(&sachip->lock, flags); 1199} 1200EXPORT_SYMBOL(sa1111_set_io_dir); 1201 1202void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1203{ 1204 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1205 unsigned long flags; 1206 unsigned int val; 1207 void __iomem *gpio = sachip->base + SA1111_GPIO; 1208 1209 spin_lock_irqsave(&sachip->lock, flags); 1210 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); 1211 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); 1212 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); 1213 spin_unlock_irqrestore(&sachip->lock, flags); 1214} 1215EXPORT_SYMBOL(sa1111_set_io); 1216 1217void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1218{ 1219 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1220 unsigned long flags; 1221 unsigned int val; 1222 void __iomem *gpio = sachip->base + SA1111_GPIO; 1223 1224 spin_lock_irqsave(&sachip->lock, flags); 1225 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); 1226 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); 1227 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); 1228 spin_unlock_irqrestore(&sachip->lock, flags); 1229} 1230EXPORT_SYMBOL(sa1111_set_sleep_io); 1231 1232/* 1233 * Individual device operations. 1234 */ 1235 1236/** 1237 * sa1111_enable_device - enable an on-chip SA1111 function block 1238 * @sadev: SA1111 function block device to enable 1239 */ 1240void sa1111_enable_device(struct sa1111_dev *sadev) 1241{ 1242 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1243 unsigned long flags; 1244 unsigned int val; 1245 1246 spin_lock_irqsave(&sachip->lock, flags); 1247 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1248 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1249 spin_unlock_irqrestore(&sachip->lock, flags); 1250} 1251EXPORT_SYMBOL(sa1111_enable_device); 1252 1253/** 1254 * sa1111_disable_device - disable an on-chip SA1111 function block 1255 * @sadev: SA1111 function block device to disable 1256 */ 1257void sa1111_disable_device(struct sa1111_dev *sadev) 1258{ 1259 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1260 unsigned long flags; 1261 unsigned int val; 1262 1263 spin_lock_irqsave(&sachip->lock, flags); 1264 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1265 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1266 spin_unlock_irqrestore(&sachip->lock, flags); 1267} 1268EXPORT_SYMBOL(sa1111_disable_device); 1269 1270/* 1271 * SA1111 "Register Access Bus." 1272 * 1273 * We model this as a regular bus type, and hang devices directly 1274 * off this. 1275 */ 1276static int sa1111_match(struct device *_dev, struct device_driver *_drv) 1277{ 1278 struct sa1111_dev *dev = SA1111_DEV(_dev); 1279 struct sa1111_driver *drv = SA1111_DRV(_drv); 1280 1281 return dev->devid == drv->devid; 1282} 1283 1284static int sa1111_bus_suspend(struct device *dev, pm_message_t state) 1285{ 1286 struct sa1111_dev *sadev = SA1111_DEV(dev); 1287 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1288 int ret = 0; 1289 1290 if (drv && drv->suspend) 1291 ret = drv->suspend(sadev, state); 1292 return ret; 1293} 1294 1295static int sa1111_bus_resume(struct device *dev) 1296{ 1297 struct sa1111_dev *sadev = SA1111_DEV(dev); 1298 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1299 int ret = 0; 1300 1301 if (drv && drv->resume) 1302 ret = drv->resume(sadev); 1303 return ret; 1304} 1305 1306static int sa1111_bus_probe(struct device *dev) 1307{ 1308 struct sa1111_dev *sadev = SA1111_DEV(dev); 1309 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1310 int ret = -ENODEV; 1311 1312 if (drv->probe) 1313 ret = drv->probe(sadev); 1314 return ret; 1315} 1316 1317static int sa1111_bus_remove(struct device *dev) 1318{ 1319 struct sa1111_dev *sadev = SA1111_DEV(dev); 1320 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1321 int ret = 0; 1322 1323 if (drv->remove) 1324 ret = drv->remove(sadev); 1325 return ret; 1326} 1327 1328struct bus_type sa1111_bus_type = { 1329 .name = "sa1111-rab", 1330 .match = sa1111_match, 1331 .probe = sa1111_bus_probe, 1332 .remove = sa1111_bus_remove, 1333 .suspend = sa1111_bus_suspend, 1334 .resume = sa1111_bus_resume, 1335}; 1336EXPORT_SYMBOL(sa1111_bus_type); 1337 1338int sa1111_driver_register(struct sa1111_driver *driver) 1339{ 1340 driver->drv.bus = &sa1111_bus_type; 1341 return driver_register(&driver->drv); 1342} 1343EXPORT_SYMBOL(sa1111_driver_register); 1344 1345void sa1111_driver_unregister(struct sa1111_driver *driver) 1346{ 1347 driver_unregister(&driver->drv); 1348} 1349EXPORT_SYMBOL(sa1111_driver_unregister); 1350 1351static int __init sa1111_init(void) 1352{ 1353 int ret = bus_register(&sa1111_bus_type); 1354 if (ret == 0) 1355 platform_driver_register(&sa1111_device_driver); 1356 return ret; 1357} 1358 1359static void __exit sa1111_exit(void) 1360{ 1361 platform_driver_unregister(&sa1111_device_driver); 1362 bus_unregister(&sa1111_bus_type); 1363} 1364 1365subsys_initcall(sa1111_init); 1366module_exit(sa1111_exit); 1367 1368MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); 1369MODULE_LICENSE("GPL"); 1370