sa1111.c revision 19851c58e680f71d087b79b53edbf814193e1d33
1/* 2 * linux/arch/arm/common/sa1111.c 3 * 4 * SA1111 support 5 * 6 * Original code by John Dorsey 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This file contains all generic SA1111 support. 13 * 14 * All initialization functions provided here are intended to be called 15 * from machine specific code with proper arguments when required. 16 */ 17#include <linux/module.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/delay.h> 21#include <linux/errno.h> 22#include <linux/ioport.h> 23#include <linux/platform_device.h> 24#include <linux/slab.h> 25#include <linux/spinlock.h> 26#include <linux/dma-mapping.h> 27#include <linux/clk.h> 28#include <linux/io.h> 29 30#include <mach/hardware.h> 31#include <asm/mach-types.h> 32#include <asm/irq.h> 33#include <asm/mach/irq.h> 34#include <asm/sizes.h> 35 36#include <asm/hardware/sa1111.h> 37 38/* SA1111 IRQs */ 39#define IRQ_GPAIN0 (0) 40#define IRQ_GPAIN1 (1) 41#define IRQ_GPAIN2 (2) 42#define IRQ_GPAIN3 (3) 43#define IRQ_GPBIN0 (4) 44#define IRQ_GPBIN1 (5) 45#define IRQ_GPBIN2 (6) 46#define IRQ_GPBIN3 (7) 47#define IRQ_GPBIN4 (8) 48#define IRQ_GPBIN5 (9) 49#define IRQ_GPCIN0 (10) 50#define IRQ_GPCIN1 (11) 51#define IRQ_GPCIN2 (12) 52#define IRQ_GPCIN3 (13) 53#define IRQ_GPCIN4 (14) 54#define IRQ_GPCIN5 (15) 55#define IRQ_GPCIN6 (16) 56#define IRQ_GPCIN7 (17) 57#define IRQ_MSTXINT (18) 58#define IRQ_MSRXINT (19) 59#define IRQ_MSSTOPERRINT (20) 60#define IRQ_TPTXINT (21) 61#define IRQ_TPRXINT (22) 62#define IRQ_TPSTOPERRINT (23) 63#define SSPXMTINT (24) 64#define SSPRCVINT (25) 65#define SSPROR (26) 66#define AUDXMTDMADONEA (32) 67#define AUDRCVDMADONEA (33) 68#define AUDXMTDMADONEB (34) 69#define AUDRCVDMADONEB (35) 70#define AUDTFSR (36) 71#define AUDRFSR (37) 72#define AUDTUR (38) 73#define AUDROR (39) 74#define AUDDTS (40) 75#define AUDRDD (41) 76#define AUDSTO (42) 77#define IRQ_USBPWR (43) 78#define IRQ_HCIM (44) 79#define IRQ_HCIBUFFACC (45) 80#define IRQ_HCIRMTWKP (46) 81#define IRQ_NHCIMFCIR (47) 82#define IRQ_USB_PORT_RESUME (48) 83#define IRQ_S0_READY_NINT (49) 84#define IRQ_S1_READY_NINT (50) 85#define IRQ_S0_CD_VALID (51) 86#define IRQ_S1_CD_VALID (52) 87#define IRQ_S0_BVD1_STSCHG (53) 88#define IRQ_S1_BVD1_STSCHG (54) 89 90extern void __init sa1110_mb_enable(void); 91 92/* 93 * We keep the following data for the overall SA1111. Note that the 94 * struct device and struct resource are "fake"; they should be supplied 95 * by the bus above us. However, in the interests of getting all SA1111 96 * drivers converted over to the device model, we provide this as an 97 * anchor point for all the other drivers. 98 */ 99struct sa1111 { 100 struct device *dev; 101 struct clk *clk; 102 unsigned long phys; 103 int irq; 104 int irq_base; /* base for cascaded on-chip IRQs */ 105 spinlock_t lock; 106 void __iomem *base; 107#ifdef CONFIG_PM 108 void *saved_state; 109#endif 110}; 111 112/* 113 * We _really_ need to eliminate this. Its only users 114 * are the PWM and DMA checking code. 115 */ 116static struct sa1111 *g_sa1111; 117 118struct sa1111_dev_info { 119 unsigned long offset; 120 unsigned long skpcr_mask; 121 unsigned int devid; 122 unsigned int irq[6]; 123}; 124 125static struct sa1111_dev_info sa1111_devices[] = { 126 { 127 .offset = SA1111_USB, 128 .skpcr_mask = SKPCR_UCLKEN, 129 .devid = SA1111_DEVID_USB, 130 .irq = { 131 IRQ_USBPWR, 132 IRQ_HCIM, 133 IRQ_HCIBUFFACC, 134 IRQ_HCIRMTWKP, 135 IRQ_NHCIMFCIR, 136 IRQ_USB_PORT_RESUME 137 }, 138 }, 139 { 140 .offset = 0x0600, 141 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, 142 .devid = SA1111_DEVID_SAC, 143 .irq = { 144 AUDXMTDMADONEA, 145 AUDXMTDMADONEB, 146 AUDRCVDMADONEA, 147 AUDRCVDMADONEB 148 }, 149 }, 150 { 151 .offset = 0x0800, 152 .skpcr_mask = SKPCR_SCLKEN, 153 .devid = SA1111_DEVID_SSP, 154 }, 155 { 156 .offset = SA1111_KBD, 157 .skpcr_mask = SKPCR_PTCLKEN, 158 .devid = SA1111_DEVID_PS2, 159 .irq = { 160 IRQ_TPRXINT, 161 IRQ_TPTXINT 162 }, 163 }, 164 { 165 .offset = SA1111_MSE, 166 .skpcr_mask = SKPCR_PMCLKEN, 167 .devid = SA1111_DEVID_PS2, 168 .irq = { 169 IRQ_MSRXINT, 170 IRQ_MSTXINT 171 }, 172 }, 173 { 174 .offset = 0x1800, 175 .skpcr_mask = 0, 176 .devid = SA1111_DEVID_PCMCIA, 177 .irq = { 178 IRQ_S0_READY_NINT, 179 IRQ_S0_CD_VALID, 180 IRQ_S0_BVD1_STSCHG, 181 IRQ_S1_READY_NINT, 182 IRQ_S1_CD_VALID, 183 IRQ_S1_BVD1_STSCHG, 184 }, 185 }, 186}; 187 188void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes) 189{ 190 unsigned int sz = SZ_1M >> PAGE_SHIFT; 191 192 if (node != 0) 193 sz = 0; 194 195 size[1] = size[0] - sz; 196 size[0] = sz; 197} 198 199/* 200 * SA1111 interrupt support. Since clearing an IRQ while there are 201 * active IRQs causes the interrupt output to pulse, the upper levels 202 * will call us again if there are more interrupts to process. 203 */ 204static void 205sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 206{ 207 unsigned int stat0, stat1, i; 208 struct sa1111 *sachip = get_irq_data(irq); 209 void __iomem *mapbase = sachip->base + SA1111_INTC; 210 211 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 212 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); 213 214 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 215 216 desc->chip->ack(irq); 217 218 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 219 220 if (stat0 == 0 && stat1 == 0) { 221 do_bad_IRQ(irq, desc); 222 return; 223 } 224 225 for (i = 0; stat0; i++, stat0 >>= 1) 226 if (stat0 & 1) 227 generic_handle_irq(i + sachip->irq_base); 228 229 for (i = 32; stat1; i++, stat1 >>= 1) 230 if (stat1 & 1) 231 generic_handle_irq(i + sachip->irq_base); 232 233 /* For level-based interrupts */ 234 desc->chip->unmask(irq); 235} 236 237#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 238#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 239 240static void sa1111_ack_irq(unsigned int irq) 241{ 242} 243 244static void sa1111_mask_lowirq(unsigned int irq) 245{ 246 struct sa1111 *sachip = get_irq_chip_data(irq); 247 void __iomem *mapbase = sachip->base + SA1111_INTC; 248 unsigned long ie0; 249 250 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 251 ie0 &= ~SA1111_IRQMASK_LO(irq); 252 writel(ie0, mapbase + SA1111_INTEN0); 253} 254 255static void sa1111_unmask_lowirq(unsigned int irq) 256{ 257 struct sa1111 *sachip = get_irq_chip_data(irq); 258 void __iomem *mapbase = sachip->base + SA1111_INTC; 259 unsigned long ie0; 260 261 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 262 ie0 |= SA1111_IRQMASK_LO(irq); 263 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 264} 265 266/* 267 * Attempt to re-trigger the interrupt. The SA1111 contains a register 268 * (INTSET) which claims to do this. However, in practice no amount of 269 * manipulation of INTEN and INTSET guarantees that the interrupt will 270 * be triggered. In fact, its very difficult, if not impossible to get 271 * INTSET to re-trigger the interrupt. 272 */ 273static int sa1111_retrigger_lowirq(unsigned int irq) 274{ 275 struct sa1111 *sachip = get_irq_chip_data(irq); 276 void __iomem *mapbase = sachip->base + SA1111_INTC; 277 unsigned int mask = SA1111_IRQMASK_LO(irq); 278 unsigned long ip0; 279 int i; 280 281 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 282 for (i = 0; i < 8; i++) { 283 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 284 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 285 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 286 break; 287 } 288 289 if (i == 8) 290 printk(KERN_ERR "Danger Will Robinson: failed to " 291 "re-trigger IRQ%d\n", irq); 292 return i == 8 ? -1 : 0; 293} 294 295static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 296{ 297 struct sa1111 *sachip = get_irq_chip_data(irq); 298 void __iomem *mapbase = sachip->base + SA1111_INTC; 299 unsigned int mask = SA1111_IRQMASK_LO(irq); 300 unsigned long ip0; 301 302 if (flags == IRQ_TYPE_PROBE) 303 return 0; 304 305 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 306 return -EINVAL; 307 308 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 309 if (flags & IRQ_TYPE_EDGE_RISING) 310 ip0 &= ~mask; 311 else 312 ip0 |= mask; 313 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 314 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); 315 316 return 0; 317} 318 319static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 320{ 321 struct sa1111 *sachip = get_irq_chip_data(irq); 322 void __iomem *mapbase = sachip->base + SA1111_INTC; 323 unsigned int mask = SA1111_IRQMASK_LO(irq); 324 unsigned long we0; 325 326 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 327 if (on) 328 we0 |= mask; 329 else 330 we0 &= ~mask; 331 sa1111_writel(we0, mapbase + SA1111_WAKEEN0); 332 333 return 0; 334} 335 336static struct irq_chip sa1111_low_chip = { 337 .name = "SA1111-l", 338 .ack = sa1111_ack_irq, 339 .mask = sa1111_mask_lowirq, 340 .unmask = sa1111_unmask_lowirq, 341 .retrigger = sa1111_retrigger_lowirq, 342 .set_type = sa1111_type_lowirq, 343 .set_wake = sa1111_wake_lowirq, 344}; 345 346static void sa1111_mask_highirq(unsigned int irq) 347{ 348 struct sa1111 *sachip = get_irq_chip_data(irq); 349 void __iomem *mapbase = sachip->base + SA1111_INTC; 350 unsigned long ie1; 351 352 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 353 ie1 &= ~SA1111_IRQMASK_HI(irq); 354 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 355} 356 357static void sa1111_unmask_highirq(unsigned int irq) 358{ 359 struct sa1111 *sachip = get_irq_chip_data(irq); 360 void __iomem *mapbase = sachip->base + SA1111_INTC; 361 unsigned long ie1; 362 363 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 364 ie1 |= SA1111_IRQMASK_HI(irq); 365 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 366} 367 368/* 369 * Attempt to re-trigger the interrupt. The SA1111 contains a register 370 * (INTSET) which claims to do this. However, in practice no amount of 371 * manipulation of INTEN and INTSET guarantees that the interrupt will 372 * be triggered. In fact, its very difficult, if not impossible to get 373 * INTSET to re-trigger the interrupt. 374 */ 375static int sa1111_retrigger_highirq(unsigned int irq) 376{ 377 struct sa1111 *sachip = get_irq_chip_data(irq); 378 void __iomem *mapbase = sachip->base + SA1111_INTC; 379 unsigned int mask = SA1111_IRQMASK_HI(irq); 380 unsigned long ip1; 381 int i; 382 383 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 384 for (i = 0; i < 8; i++) { 385 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); 386 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 387 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 388 break; 389 } 390 391 if (i == 8) 392 printk(KERN_ERR "Danger Will Robinson: failed to " 393 "re-trigger IRQ%d\n", irq); 394 return i == 8 ? -1 : 0; 395} 396 397static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 398{ 399 struct sa1111 *sachip = get_irq_chip_data(irq); 400 void __iomem *mapbase = sachip->base + SA1111_INTC; 401 unsigned int mask = SA1111_IRQMASK_HI(irq); 402 unsigned long ip1; 403 404 if (flags == IRQ_TYPE_PROBE) 405 return 0; 406 407 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 408 return -EINVAL; 409 410 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 411 if (flags & IRQ_TYPE_EDGE_RISING) 412 ip1 &= ~mask; 413 else 414 ip1 |= mask; 415 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 416 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); 417 418 return 0; 419} 420 421static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 422{ 423 struct sa1111 *sachip = get_irq_chip_data(irq); 424 void __iomem *mapbase = sachip->base + SA1111_INTC; 425 unsigned int mask = SA1111_IRQMASK_HI(irq); 426 unsigned long we1; 427 428 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 429 if (on) 430 we1 |= mask; 431 else 432 we1 &= ~mask; 433 sa1111_writel(we1, mapbase + SA1111_WAKEEN1); 434 435 return 0; 436} 437 438static struct irq_chip sa1111_high_chip = { 439 .name = "SA1111-h", 440 .ack = sa1111_ack_irq, 441 .mask = sa1111_mask_highirq, 442 .unmask = sa1111_unmask_highirq, 443 .retrigger = sa1111_retrigger_highirq, 444 .set_type = sa1111_type_highirq, 445 .set_wake = sa1111_wake_highirq, 446}; 447 448static void sa1111_setup_irq(struct sa1111 *sachip) 449{ 450 void __iomem *irqbase = sachip->base + SA1111_INTC; 451 unsigned int irq; 452 453 /* 454 * We're guaranteed that this region hasn't been taken. 455 */ 456 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); 457 458 /* disable all IRQs */ 459 sa1111_writel(0, irqbase + SA1111_INTEN0); 460 sa1111_writel(0, irqbase + SA1111_INTEN1); 461 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 462 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 463 464 /* 465 * detect on rising edge. Note: Feb 2001 Errata for SA1111 466 * specifies that S0ReadyInt and S1ReadyInt should be '1'. 467 */ 468 sa1111_writel(0, irqbase + SA1111_INTPOL0); 469 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | 470 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), 471 irqbase + SA1111_INTPOL1); 472 473 /* clear all IRQs */ 474 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); 475 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 476 477 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 478 set_irq_chip(irq, &sa1111_low_chip); 479 set_irq_chip_data(irq, sachip); 480 set_irq_handler(irq, handle_edge_irq); 481 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 482 } 483 484 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 485 set_irq_chip(irq, &sa1111_high_chip); 486 set_irq_chip_data(irq, sachip); 487 set_irq_handler(irq, handle_edge_irq); 488 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 489 } 490 491 /* 492 * Register SA1111 interrupt 493 */ 494 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 495 set_irq_data(sachip->irq, sachip); 496 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 497} 498 499/* 500 * Bring the SA1111 out of reset. This requires a set procedure: 501 * 1. nRESET asserted (by hardware) 502 * 2. CLK turned on from SA1110 503 * 3. nRESET deasserted 504 * 4. VCO turned on, PLL_BYPASS turned off 505 * 5. Wait lock time, then assert RCLKEn 506 * 7. PCR set to allow clocking of individual functions 507 * 508 * Until we've done this, the only registers we can access are: 509 * SBI_SKCR 510 * SBI_SMCR 511 * SBI_SKID 512 */ 513static void sa1111_wake(struct sa1111 *sachip) 514{ 515 unsigned long flags, r; 516 517 spin_lock_irqsave(&sachip->lock, flags); 518 519 clk_enable(sachip->clk); 520 521 /* 522 * Turn VCO on, and disable PLL Bypass. 523 */ 524 r = sa1111_readl(sachip->base + SA1111_SKCR); 525 r &= ~SKCR_VCO_OFF; 526 sa1111_writel(r, sachip->base + SA1111_SKCR); 527 r |= SKCR_PLL_BYPASS | SKCR_OE_EN; 528 sa1111_writel(r, sachip->base + SA1111_SKCR); 529 530 /* 531 * Wait lock time. SA1111 manual _doesn't_ 532 * specify a figure for this! We choose 100us. 533 */ 534 udelay(100); 535 536 /* 537 * Enable RCLK. We also ensure that RDYEN is set. 538 */ 539 r |= SKCR_RCLKEN | SKCR_RDYEN; 540 sa1111_writel(r, sachip->base + SA1111_SKCR); 541 542 /* 543 * Wait 14 RCLK cycles for the chip to finish coming out 544 * of reset. (RCLK=24MHz). This is 590ns. 545 */ 546 udelay(1); 547 548 /* 549 * Ensure all clocks are initially off. 550 */ 551 sa1111_writel(0, sachip->base + SA1111_SKPCR); 552 553 spin_unlock_irqrestore(&sachip->lock, flags); 554} 555 556#ifdef CONFIG_ARCH_SA1100 557 558static u32 sa1111_dma_mask[] = { 559 ~0, 560 ~(1 << 20), 561 ~(1 << 23), 562 ~(1 << 24), 563 ~(1 << 25), 564 ~(1 << 20), 565 ~(1 << 20), 566 0, 567}; 568 569/* 570 * Configure the SA1111 shared memory controller. 571 */ 572void 573sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, 574 unsigned int cas_latency) 575{ 576 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); 577 578 if (cas_latency == 3) 579 smcr |= SMCR_CLAT; 580 581 sa1111_writel(smcr, sachip->base + SA1111_SMCR); 582 583 /* 584 * Now clear the bits in the DMA mask to work around the SA1111 585 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion 586 * Chip Specification Update, June 2000, Erratum #7). 587 */ 588 if (sachip->dev->dma_mask) 589 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; 590 591 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; 592} 593 594#endif 595 596static void sa1111_dev_release(struct device *_dev) 597{ 598 struct sa1111_dev *dev = SA1111_DEV(_dev); 599 600 release_resource(&dev->res); 601 kfree(dev); 602} 603 604static int 605sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, 606 struct sa1111_dev_info *info) 607{ 608 struct sa1111_dev *dev; 609 int ret; 610 611 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); 612 if (!dev) { 613 ret = -ENOMEM; 614 goto out; 615 } 616 617 dev_set_name(&dev->dev, "%4.4lx", info->offset); 618 dev->devid = info->devid; 619 dev->dev.parent = sachip->dev; 620 dev->dev.bus = &sa1111_bus_type; 621 dev->dev.release = sa1111_dev_release; 622 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; 623 dev->res.start = sachip->phys + info->offset; 624 dev->res.end = dev->res.start + 511; 625 dev->res.name = dev_name(&dev->dev); 626 dev->res.flags = IORESOURCE_MEM; 627 dev->mapbase = sachip->base + info->offset; 628 dev->skpcr_mask = info->skpcr_mask; 629 memmove(dev->irq, info->irq, sizeof(dev->irq)); 630 631 ret = request_resource(parent, &dev->res); 632 if (ret) { 633 printk("SA1111: failed to allocate resource for %s\n", 634 dev->res.name); 635 dev_set_name(&dev->dev, NULL); 636 kfree(dev); 637 goto out; 638 } 639 640 641 ret = device_register(&dev->dev); 642 if (ret) { 643 release_resource(&dev->res); 644 kfree(dev); 645 goto out; 646 } 647 648#ifdef CONFIG_DMABOUNCE 649 /* 650 * If the parent device has a DMA mask associated with it, 651 * propagate it down to the children. 652 */ 653 if (sachip->dev->dma_mask) { 654 dev->dma_mask = *sachip->dev->dma_mask; 655 dev->dev.dma_mask = &dev->dma_mask; 656 657 if (dev->dma_mask != 0xffffffffUL) { 658 ret = dmabounce_register_dev(&dev->dev, 1024, 4096); 659 if (ret) { 660 dev_err(&dev->dev, "SA1111: Failed to register" 661 " with dmabounce\n"); 662 device_unregister(&dev->dev); 663 } 664 } 665 } 666#endif 667 668out: 669 return ret; 670} 671 672/** 673 * sa1111_probe - probe for a single SA1111 chip. 674 * @phys_addr: physical address of device. 675 * 676 * Probe for a SA1111 chip. This must be called 677 * before any other SA1111-specific code. 678 * 679 * Returns: 680 * %-ENODEV device not found. 681 * %-EBUSY physical address already marked in-use. 682 * %0 successful. 683 */ 684static int 685__sa1111_probe(struct device *me, struct resource *mem, int irq) 686{ 687 struct sa1111 *sachip; 688 unsigned long id; 689 unsigned int has_devs; 690 int i, ret = -ENODEV; 691 692 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); 693 if (!sachip) 694 return -ENOMEM; 695 696 sachip->clk = clk_get(me, "SA1111_CLK"); 697 if (IS_ERR(sachip->clk)) { 698 ret = PTR_ERR(sachip->clk); 699 goto err_free; 700 } 701 702 spin_lock_init(&sachip->lock); 703 704 sachip->dev = me; 705 dev_set_drvdata(sachip->dev, sachip); 706 707 sachip->phys = mem->start; 708 sachip->irq = irq; 709 710 /* 711 * Map the whole region. This also maps the 712 * registers for our children. 713 */ 714 sachip->base = ioremap(mem->start, PAGE_SIZE * 2); 715 if (!sachip->base) { 716 ret = -ENOMEM; 717 goto err_clkput; 718 } 719 720 /* 721 * Probe for the chip. Only touch the SBI registers. 722 */ 723 id = sa1111_readl(sachip->base + SA1111_SKID); 724 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 725 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); 726 ret = -ENODEV; 727 goto err_unmap; 728 } 729 730 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " 731 "silicon revision %lx, metal revision %lx\n", 732 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); 733 734 /* 735 * We found it. Wake the chip up, and initialise. 736 */ 737 sa1111_wake(sachip); 738 739#ifdef CONFIG_ARCH_SA1100 740 { 741 unsigned int val; 742 743 /* 744 * The SDRAM configuration of the SA1110 and the SA1111 must 745 * match. This is very important to ensure that SA1111 accesses 746 * don't corrupt the SDRAM. Note that this ungates the SA1111's 747 * MBGNT signal, so we must have called sa1110_mb_disable() 748 * beforehand. 749 */ 750 sa1111_configure_smc(sachip, 1, 751 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), 752 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); 753 754 /* 755 * We only need to turn on DCLK whenever we want to use the 756 * DMA. It can otherwise be held firmly in the off position. 757 * (currently, we always enable it.) 758 */ 759 val = sa1111_readl(sachip->base + SA1111_SKPCR); 760 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); 761 762 /* 763 * Enable the SA1110 memory bus request and grant signals. 764 */ 765 sa1110_mb_enable(); 766 } 767#endif 768 769 /* 770 * The interrupt controller must be initialised before any 771 * other device to ensure that the interrupts are available. 772 */ 773 if (sachip->irq != NO_IRQ) 774 sa1111_setup_irq(sachip); 775 776 g_sa1111 = sachip; 777 778 has_devs = ~0; 779 if (machine_is_assabet() || machine_is_jornada720() || 780 machine_is_badge4()) 781 has_devs &= ~(1 << 4); 782 else 783 has_devs &= ~(1 << 1); 784 785 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) 786 if (has_devs & (1 << i)) 787 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); 788 789 return 0; 790 791 err_unmap: 792 iounmap(sachip->base); 793 err_clkput: 794 clk_put(sachip->clk); 795 err_free: 796 kfree(sachip); 797 return ret; 798} 799 800static int sa1111_remove_one(struct device *dev, void *data) 801{ 802 device_unregister(dev); 803 return 0; 804} 805 806static void __sa1111_remove(struct sa1111 *sachip) 807{ 808 void __iomem *irqbase = sachip->base + SA1111_INTC; 809 810 device_for_each_child(sachip->dev, NULL, sa1111_remove_one); 811 812 /* disable all IRQs */ 813 sa1111_writel(0, irqbase + SA1111_INTEN0); 814 sa1111_writel(0, irqbase + SA1111_INTEN1); 815 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 816 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 817 818 clk_disable(sachip->clk); 819 820 if (sachip->irq != NO_IRQ) { 821 set_irq_chained_handler(sachip->irq, NULL); 822 set_irq_data(sachip->irq, NULL); 823 824 release_mem_region(sachip->phys + SA1111_INTC, 512); 825 } 826 827 iounmap(sachip->base); 828 clk_put(sachip->clk); 829 kfree(sachip); 830} 831 832/* 833 * According to the "Intel StrongARM SA-1111 Microprocessor Companion 834 * Chip Specification Update" (June 2000), erratum #7, there is a 835 * significant bug in the SA1111 SDRAM shared memory controller. If 836 * an access to a region of memory above 1MB relative to the bank base, 837 * it is important that address bit 10 _NOT_ be asserted. Depending 838 * on the configuration of the RAM, bit 10 may correspond to one 839 * of several different (processor-relative) address bits. 840 * 841 * This routine only identifies whether or not a given DMA address 842 * is susceptible to the bug. 843 * 844 * This should only get called for sa1111_device types due to the 845 * way we configure our device dma_masks. 846 */ 847int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) 848{ 849 /* 850 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module 851 * User's Guide" mentions that jumpers R51 and R52 control the 852 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or 853 * SDRAM bank 1 on Neponset). The default configuration selects 854 * Assabet, so any address in bank 1 is necessarily invalid. 855 */ 856 return ((machine_is_assabet() || machine_is_pfs168()) && 857 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000)); 858} 859 860struct sa1111_save_data { 861 unsigned int skcr; 862 unsigned int skpcr; 863 unsigned int skcdr; 864 unsigned char skaud; 865 unsigned char skpwm0; 866 unsigned char skpwm1; 867 868 /* 869 * Interrupt controller 870 */ 871 unsigned int intpol0; 872 unsigned int intpol1; 873 unsigned int inten0; 874 unsigned int inten1; 875 unsigned int wakepol0; 876 unsigned int wakepol1; 877 unsigned int wakeen0; 878 unsigned int wakeen1; 879}; 880 881#ifdef CONFIG_PM 882 883static int sa1111_suspend(struct platform_device *dev, pm_message_t state) 884{ 885 struct sa1111 *sachip = platform_get_drvdata(dev); 886 struct sa1111_save_data *save; 887 unsigned long flags; 888 unsigned int val; 889 void __iomem *base; 890 891 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); 892 if (!save) 893 return -ENOMEM; 894 sachip->saved_state = save; 895 896 spin_lock_irqsave(&sachip->lock, flags); 897 898 /* 899 * Save state. 900 */ 901 base = sachip->base; 902 save->skcr = sa1111_readl(base + SA1111_SKCR); 903 save->skpcr = sa1111_readl(base + SA1111_SKPCR); 904 save->skcdr = sa1111_readl(base + SA1111_SKCDR); 905 save->skaud = sa1111_readl(base + SA1111_SKAUD); 906 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); 907 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); 908 909 base = sachip->base + SA1111_INTC; 910 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); 911 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); 912 save->inten0 = sa1111_readl(base + SA1111_INTEN0); 913 save->inten1 = sa1111_readl(base + SA1111_INTEN1); 914 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); 915 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); 916 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); 917 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); 918 919 /* 920 * Disable. 921 */ 922 val = sa1111_readl(sachip->base + SA1111_SKCR); 923 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); 924 sa1111_writel(0, sachip->base + SA1111_SKPWM0); 925 sa1111_writel(0, sachip->base + SA1111_SKPWM1); 926 927 clk_disable(sachip->clk); 928 929 spin_unlock_irqrestore(&sachip->lock, flags); 930 931 return 0; 932} 933 934/* 935 * sa1111_resume - Restore the SA1111 device state. 936 * @dev: device to restore 937 * 938 * Restore the general state of the SA1111; clock control and 939 * interrupt controller. Other parts of the SA1111 must be 940 * restored by their respective drivers, and must be called 941 * via LDM after this function. 942 */ 943static int sa1111_resume(struct platform_device *dev) 944{ 945 struct sa1111 *sachip = platform_get_drvdata(dev); 946 struct sa1111_save_data *save; 947 unsigned long flags, id; 948 void __iomem *base; 949 950 save = sachip->saved_state; 951 if (!save) 952 return 0; 953 954 spin_lock_irqsave(&sachip->lock, flags); 955 956 /* 957 * Ensure that the SA1111 is still here. 958 * FIXME: shouldn't do this here. 959 */ 960 id = sa1111_readl(sachip->base + SA1111_SKID); 961 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 962 __sa1111_remove(sachip); 963 platform_set_drvdata(dev, NULL); 964 kfree(save); 965 return 0; 966 } 967 968 /* 969 * First of all, wake up the chip. 970 */ 971 sa1111_wake(sachip); 972 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 973 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 974 975 base = sachip->base; 976 sa1111_writel(save->skcr, base + SA1111_SKCR); 977 sa1111_writel(save->skpcr, base + SA1111_SKPCR); 978 sa1111_writel(save->skcdr, base + SA1111_SKCDR); 979 sa1111_writel(save->skaud, base + SA1111_SKAUD); 980 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); 981 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); 982 983 base = sachip->base + SA1111_INTC; 984 sa1111_writel(save->intpol0, base + SA1111_INTPOL0); 985 sa1111_writel(save->intpol1, base + SA1111_INTPOL1); 986 sa1111_writel(save->inten0, base + SA1111_INTEN0); 987 sa1111_writel(save->inten1, base + SA1111_INTEN1); 988 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); 989 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); 990 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); 991 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); 992 993 spin_unlock_irqrestore(&sachip->lock, flags); 994 995 sachip->saved_state = NULL; 996 kfree(save); 997 998 return 0; 999} 1000 1001#else 1002#define sa1111_suspend NULL 1003#define sa1111_resume NULL 1004#endif 1005 1006static int __devinit sa1111_probe(struct platform_device *pdev) 1007{ 1008 struct resource *mem; 1009 int irq; 1010 1011 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1012 if (!mem) 1013 return -EINVAL; 1014 irq = platform_get_irq(pdev, 0); 1015 if (irq < 0) 1016 return -ENXIO; 1017 1018 return __sa1111_probe(&pdev->dev, mem, irq); 1019} 1020 1021static int sa1111_remove(struct platform_device *pdev) 1022{ 1023 struct sa1111 *sachip = platform_get_drvdata(pdev); 1024 1025 if (sachip) { 1026 __sa1111_remove(sachip); 1027 platform_set_drvdata(pdev, NULL); 1028 1029#ifdef CONFIG_PM 1030 kfree(sachip->saved_state); 1031 sachip->saved_state = NULL; 1032#endif 1033 } 1034 1035 return 0; 1036} 1037 1038/* 1039 * Not sure if this should be on the system bus or not yet. 1040 * We really want some way to register a system device at 1041 * the per-machine level, and then have this driver pick 1042 * up the registered devices. 1043 * 1044 * We also need to handle the SDRAM configuration for 1045 * PXA250/SA1110 machine classes. 1046 */ 1047static struct platform_driver sa1111_device_driver = { 1048 .probe = sa1111_probe, 1049 .remove = sa1111_remove, 1050 .suspend = sa1111_suspend, 1051 .resume = sa1111_resume, 1052 .driver = { 1053 .name = "sa1111", 1054 }, 1055}; 1056 1057/* 1058 * Get the parent device driver (us) structure 1059 * from a child function device 1060 */ 1061static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) 1062{ 1063 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); 1064} 1065 1066/* 1067 * The bits in the opdiv field are non-linear. 1068 */ 1069static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; 1070 1071static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) 1072{ 1073 unsigned int skcdr, fbdiv, ipdiv, opdiv; 1074 1075 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); 1076 1077 fbdiv = (skcdr & 0x007f) + 2; 1078 ipdiv = ((skcdr & 0x0f80) >> 7) + 2; 1079 opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; 1080 1081 return 3686400 * fbdiv / (ipdiv * opdiv); 1082} 1083 1084/** 1085 * sa1111_pll_clock - return the current PLL clock frequency. 1086 * @sadev: SA1111 function block 1087 * 1088 * BUG: we should look at SKCR. We also blindly believe that 1089 * the chip is being fed with the 3.6864MHz clock. 1090 * 1091 * Returns the PLL clock in Hz. 1092 */ 1093unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) 1094{ 1095 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1096 1097 return __sa1111_pll_clock(sachip); 1098} 1099EXPORT_SYMBOL(sa1111_pll_clock); 1100 1101/** 1102 * sa1111_select_audio_mode - select I2S or AC link mode 1103 * @sadev: SA1111 function block 1104 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S 1105 * 1106 * Frob the SKCR to select AC Link mode or I2S mode for 1107 * the audio block. 1108 */ 1109void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) 1110{ 1111 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1112 unsigned long flags; 1113 unsigned int val; 1114 1115 spin_lock_irqsave(&sachip->lock, flags); 1116 1117 val = sa1111_readl(sachip->base + SA1111_SKCR); 1118 if (mode == SA1111_AUDIO_I2S) { 1119 val &= ~SKCR_SELAC; 1120 } else { 1121 val |= SKCR_SELAC; 1122 } 1123 sa1111_writel(val, sachip->base + SA1111_SKCR); 1124 1125 spin_unlock_irqrestore(&sachip->lock, flags); 1126} 1127EXPORT_SYMBOL(sa1111_select_audio_mode); 1128 1129/** 1130 * sa1111_set_audio_rate - set the audio sample rate 1131 * @sadev: SA1111 SAC function block 1132 * @rate: sample rate to select 1133 */ 1134int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) 1135{ 1136 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1137 unsigned int div; 1138 1139 if (sadev->devid != SA1111_DEVID_SAC) 1140 return -EINVAL; 1141 1142 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; 1143 if (div == 0) 1144 div = 1; 1145 if (div > 128) 1146 div = 128; 1147 1148 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); 1149 1150 return 0; 1151} 1152EXPORT_SYMBOL(sa1111_set_audio_rate); 1153 1154/** 1155 * sa1111_get_audio_rate - get the audio sample rate 1156 * @sadev: SA1111 SAC function block device 1157 */ 1158int sa1111_get_audio_rate(struct sa1111_dev *sadev) 1159{ 1160 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1161 unsigned long div; 1162 1163 if (sadev->devid != SA1111_DEVID_SAC) 1164 return -EINVAL; 1165 1166 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; 1167 1168 return __sa1111_pll_clock(sachip) / (256 * div); 1169} 1170EXPORT_SYMBOL(sa1111_get_audio_rate); 1171 1172void sa1111_set_io_dir(struct sa1111_dev *sadev, 1173 unsigned int bits, unsigned int dir, 1174 unsigned int sleep_dir) 1175{ 1176 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1177 unsigned long flags; 1178 unsigned int val; 1179 void __iomem *gpio = sachip->base + SA1111_GPIO; 1180 1181#define MODIFY_BITS(port, mask, dir) \ 1182 if (mask) { \ 1183 val = sa1111_readl(port); \ 1184 val &= ~(mask); \ 1185 val |= (dir) & (mask); \ 1186 sa1111_writel(val, port); \ 1187 } 1188 1189 spin_lock_irqsave(&sachip->lock, flags); 1190 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); 1191 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); 1192 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); 1193 1194 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); 1195 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); 1196 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); 1197 spin_unlock_irqrestore(&sachip->lock, flags); 1198} 1199EXPORT_SYMBOL(sa1111_set_io_dir); 1200 1201void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1202{ 1203 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1204 unsigned long flags; 1205 unsigned int val; 1206 void __iomem *gpio = sachip->base + SA1111_GPIO; 1207 1208 spin_lock_irqsave(&sachip->lock, flags); 1209 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); 1210 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); 1211 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); 1212 spin_unlock_irqrestore(&sachip->lock, flags); 1213} 1214EXPORT_SYMBOL(sa1111_set_io); 1215 1216void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1217{ 1218 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1219 unsigned long flags; 1220 unsigned int val; 1221 void __iomem *gpio = sachip->base + SA1111_GPIO; 1222 1223 spin_lock_irqsave(&sachip->lock, flags); 1224 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); 1225 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); 1226 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); 1227 spin_unlock_irqrestore(&sachip->lock, flags); 1228} 1229EXPORT_SYMBOL(sa1111_set_sleep_io); 1230 1231/* 1232 * Individual device operations. 1233 */ 1234 1235/** 1236 * sa1111_enable_device - enable an on-chip SA1111 function block 1237 * @sadev: SA1111 function block device to enable 1238 */ 1239void sa1111_enable_device(struct sa1111_dev *sadev) 1240{ 1241 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1242 unsigned long flags; 1243 unsigned int val; 1244 1245 spin_lock_irqsave(&sachip->lock, flags); 1246 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1247 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1248 spin_unlock_irqrestore(&sachip->lock, flags); 1249} 1250EXPORT_SYMBOL(sa1111_enable_device); 1251 1252/** 1253 * sa1111_disable_device - disable an on-chip SA1111 function block 1254 * @sadev: SA1111 function block device to disable 1255 */ 1256void sa1111_disable_device(struct sa1111_dev *sadev) 1257{ 1258 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1259 unsigned long flags; 1260 unsigned int val; 1261 1262 spin_lock_irqsave(&sachip->lock, flags); 1263 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1264 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1265 spin_unlock_irqrestore(&sachip->lock, flags); 1266} 1267EXPORT_SYMBOL(sa1111_disable_device); 1268 1269/* 1270 * SA1111 "Register Access Bus." 1271 * 1272 * We model this as a regular bus type, and hang devices directly 1273 * off this. 1274 */ 1275static int sa1111_match(struct device *_dev, struct device_driver *_drv) 1276{ 1277 struct sa1111_dev *dev = SA1111_DEV(_dev); 1278 struct sa1111_driver *drv = SA1111_DRV(_drv); 1279 1280 return dev->devid == drv->devid; 1281} 1282 1283static int sa1111_bus_suspend(struct device *dev, pm_message_t state) 1284{ 1285 struct sa1111_dev *sadev = SA1111_DEV(dev); 1286 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1287 int ret = 0; 1288 1289 if (drv && drv->suspend) 1290 ret = drv->suspend(sadev, state); 1291 return ret; 1292} 1293 1294static int sa1111_bus_resume(struct device *dev) 1295{ 1296 struct sa1111_dev *sadev = SA1111_DEV(dev); 1297 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1298 int ret = 0; 1299 1300 if (drv && drv->resume) 1301 ret = drv->resume(sadev); 1302 return ret; 1303} 1304 1305static int sa1111_bus_probe(struct device *dev) 1306{ 1307 struct sa1111_dev *sadev = SA1111_DEV(dev); 1308 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1309 int ret = -ENODEV; 1310 1311 if (drv->probe) 1312 ret = drv->probe(sadev); 1313 return ret; 1314} 1315 1316static int sa1111_bus_remove(struct device *dev) 1317{ 1318 struct sa1111_dev *sadev = SA1111_DEV(dev); 1319 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1320 int ret = 0; 1321 1322 if (drv->remove) 1323 ret = drv->remove(sadev); 1324 return ret; 1325} 1326 1327struct bus_type sa1111_bus_type = { 1328 .name = "sa1111-rab", 1329 .match = sa1111_match, 1330 .probe = sa1111_bus_probe, 1331 .remove = sa1111_bus_remove, 1332 .suspend = sa1111_bus_suspend, 1333 .resume = sa1111_bus_resume, 1334}; 1335EXPORT_SYMBOL(sa1111_bus_type); 1336 1337int sa1111_driver_register(struct sa1111_driver *driver) 1338{ 1339 driver->drv.bus = &sa1111_bus_type; 1340 return driver_register(&driver->drv); 1341} 1342EXPORT_SYMBOL(sa1111_driver_register); 1343 1344void sa1111_driver_unregister(struct sa1111_driver *driver) 1345{ 1346 driver_unregister(&driver->drv); 1347} 1348EXPORT_SYMBOL(sa1111_driver_unregister); 1349 1350static int __init sa1111_init(void) 1351{ 1352 int ret = bus_register(&sa1111_bus_type); 1353 if (ret == 0) 1354 platform_driver_register(&sa1111_device_driver); 1355 return ret; 1356} 1357 1358static void __exit sa1111_exit(void) 1359{ 1360 platform_driver_unregister(&sa1111_device_driver); 1361 bus_unregister(&sa1111_bus_type); 1362} 1363 1364subsys_initcall(sa1111_init); 1365module_exit(sa1111_exit); 1366 1367MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); 1368MODULE_LICENSE("GPL"); 1369