sa1111.c revision a22db0f38243f68957c89b1b9689a2064507bed6
1/* 2 * linux/arch/arm/common/sa1111.c 3 * 4 * SA1111 support 5 * 6 * Original code by John Dorsey 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This file contains all generic SA1111 support. 13 * 14 * All initialization functions provided here are intended to be called 15 * from machine specific code with proper arguments when required. 16 */ 17#include <linux/module.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/delay.h> 21#include <linux/errno.h> 22#include <linux/ioport.h> 23#include <linux/platform_device.h> 24#include <linux/slab.h> 25#include <linux/spinlock.h> 26#include <linux/dma-mapping.h> 27#include <linux/clk.h> 28#include <linux/io.h> 29 30#include <mach/hardware.h> 31#include <asm/mach-types.h> 32#include <asm/irq.h> 33#include <asm/mach/irq.h> 34#include <asm/sizes.h> 35 36#include <asm/hardware/sa1111.h> 37 38/* SA1111 IRQs */ 39#define IRQ_GPAIN0 (0) 40#define IRQ_GPAIN1 (1) 41#define IRQ_GPAIN2 (2) 42#define IRQ_GPAIN3 (3) 43#define IRQ_GPBIN0 (4) 44#define IRQ_GPBIN1 (5) 45#define IRQ_GPBIN2 (6) 46#define IRQ_GPBIN3 (7) 47#define IRQ_GPBIN4 (8) 48#define IRQ_GPBIN5 (9) 49#define IRQ_GPCIN0 (10) 50#define IRQ_GPCIN1 (11) 51#define IRQ_GPCIN2 (12) 52#define IRQ_GPCIN3 (13) 53#define IRQ_GPCIN4 (14) 54#define IRQ_GPCIN5 (15) 55#define IRQ_GPCIN6 (16) 56#define IRQ_GPCIN7 (17) 57#define IRQ_MSTXINT (18) 58#define IRQ_MSRXINT (19) 59#define IRQ_MSSTOPERRINT (20) 60#define IRQ_TPTXINT (21) 61#define IRQ_TPRXINT (22) 62#define IRQ_TPSTOPERRINT (23) 63#define SSPXMTINT (24) 64#define SSPRCVINT (25) 65#define SSPROR (26) 66#define AUDXMTDMADONEA (32) 67#define AUDRCVDMADONEA (33) 68#define AUDXMTDMADONEB (34) 69#define AUDRCVDMADONEB (35) 70#define AUDTFSR (36) 71#define AUDRFSR (37) 72#define AUDTUR (38) 73#define AUDROR (39) 74#define AUDDTS (40) 75#define AUDRDD (41) 76#define AUDSTO (42) 77#define IRQ_USBPWR (43) 78#define IRQ_HCIM (44) 79#define IRQ_HCIBUFFACC (45) 80#define IRQ_HCIRMTWKP (46) 81#define IRQ_NHCIMFCIR (47) 82#define IRQ_USB_PORT_RESUME (48) 83#define IRQ_S0_READY_NINT (49) 84#define IRQ_S1_READY_NINT (50) 85#define IRQ_S0_CD_VALID (51) 86#define IRQ_S1_CD_VALID (52) 87#define IRQ_S0_BVD1_STSCHG (53) 88#define IRQ_S1_BVD1_STSCHG (54) 89 90extern void sa1110_mb_enable(void); 91extern void sa1110_mb_disable(void); 92 93/* 94 * We keep the following data for the overall SA1111. Note that the 95 * struct device and struct resource are "fake"; they should be supplied 96 * by the bus above us. However, in the interests of getting all SA1111 97 * drivers converted over to the device model, we provide this as an 98 * anchor point for all the other drivers. 99 */ 100struct sa1111 { 101 struct device *dev; 102 struct clk *clk; 103 unsigned long phys; 104 int irq; 105 int irq_base; /* base for cascaded on-chip IRQs */ 106 spinlock_t lock; 107 void __iomem *base; 108#ifdef CONFIG_PM 109 void *saved_state; 110#endif 111}; 112 113/* 114 * We _really_ need to eliminate this. Its only users 115 * are the PWM and DMA checking code. 116 */ 117static struct sa1111 *g_sa1111; 118 119struct sa1111_dev_info { 120 unsigned long offset; 121 unsigned long skpcr_mask; 122 unsigned int devid; 123 unsigned int irq[6]; 124}; 125 126static struct sa1111_dev_info sa1111_devices[] = { 127 { 128 .offset = SA1111_USB, 129 .skpcr_mask = SKPCR_UCLKEN, 130 .devid = SA1111_DEVID_USB, 131 .irq = { 132 IRQ_USBPWR, 133 IRQ_HCIM, 134 IRQ_HCIBUFFACC, 135 IRQ_HCIRMTWKP, 136 IRQ_NHCIMFCIR, 137 IRQ_USB_PORT_RESUME 138 }, 139 }, 140 { 141 .offset = 0x0600, 142 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, 143 .devid = SA1111_DEVID_SAC, 144 .irq = { 145 AUDXMTDMADONEA, 146 AUDXMTDMADONEB, 147 AUDRCVDMADONEA, 148 AUDRCVDMADONEB 149 }, 150 }, 151 { 152 .offset = 0x0800, 153 .skpcr_mask = SKPCR_SCLKEN, 154 .devid = SA1111_DEVID_SSP, 155 }, 156 { 157 .offset = SA1111_KBD, 158 .skpcr_mask = SKPCR_PTCLKEN, 159 .devid = SA1111_DEVID_PS2, 160 .irq = { 161 IRQ_TPRXINT, 162 IRQ_TPTXINT 163 }, 164 }, 165 { 166 .offset = SA1111_MSE, 167 .skpcr_mask = SKPCR_PMCLKEN, 168 .devid = SA1111_DEVID_PS2, 169 .irq = { 170 IRQ_MSRXINT, 171 IRQ_MSTXINT 172 }, 173 }, 174 { 175 .offset = 0x1800, 176 .skpcr_mask = 0, 177 .devid = SA1111_DEVID_PCMCIA, 178 .irq = { 179 IRQ_S0_READY_NINT, 180 IRQ_S0_CD_VALID, 181 IRQ_S0_BVD1_STSCHG, 182 IRQ_S1_READY_NINT, 183 IRQ_S1_CD_VALID, 184 IRQ_S1_BVD1_STSCHG, 185 }, 186 }, 187}; 188 189/* 190 * SA1111 interrupt support. Since clearing an IRQ while there are 191 * active IRQs causes the interrupt output to pulse, the upper levels 192 * will call us again if there are more interrupts to process. 193 */ 194static void 195sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 196{ 197 unsigned int stat0, stat1, i; 198 struct sa1111 *sachip = irq_get_handler_data(irq); 199 void __iomem *mapbase = sachip->base + SA1111_INTC; 200 201 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 202 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); 203 204 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 205 206 desc->irq_data.chip->irq_ack(&desc->irq_data); 207 208 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 209 210 if (stat0 == 0 && stat1 == 0) { 211 do_bad_IRQ(irq, desc); 212 return; 213 } 214 215 for (i = 0; stat0; i++, stat0 >>= 1) 216 if (stat0 & 1) 217 generic_handle_irq(i + sachip->irq_base); 218 219 for (i = 32; stat1; i++, stat1 >>= 1) 220 if (stat1 & 1) 221 generic_handle_irq(i + sachip->irq_base); 222 223 /* For level-based interrupts */ 224 desc->irq_data.chip->irq_unmask(&desc->irq_data); 225} 226 227#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 228#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 229 230static void sa1111_ack_irq(struct irq_data *d) 231{ 232} 233 234static void sa1111_mask_lowirq(struct irq_data *d) 235{ 236 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 237 void __iomem *mapbase = sachip->base + SA1111_INTC; 238 unsigned long ie0; 239 240 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 241 ie0 &= ~SA1111_IRQMASK_LO(d->irq); 242 writel(ie0, mapbase + SA1111_INTEN0); 243} 244 245static void sa1111_unmask_lowirq(struct irq_data *d) 246{ 247 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 248 void __iomem *mapbase = sachip->base + SA1111_INTC; 249 unsigned long ie0; 250 251 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 252 ie0 |= SA1111_IRQMASK_LO(d->irq); 253 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 254} 255 256/* 257 * Attempt to re-trigger the interrupt. The SA1111 contains a register 258 * (INTSET) which claims to do this. However, in practice no amount of 259 * manipulation of INTEN and INTSET guarantees that the interrupt will 260 * be triggered. In fact, its very difficult, if not impossible to get 261 * INTSET to re-trigger the interrupt. 262 */ 263static int sa1111_retrigger_lowirq(struct irq_data *d) 264{ 265 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 266 void __iomem *mapbase = sachip->base + SA1111_INTC; 267 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 268 unsigned long ip0; 269 int i; 270 271 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 272 for (i = 0; i < 8; i++) { 273 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 274 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 275 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask) 276 break; 277 } 278 279 if (i == 8) 280 printk(KERN_ERR "Danger Will Robinson: failed to " 281 "re-trigger IRQ%d\n", d->irq); 282 return i == 8 ? -1 : 0; 283} 284 285static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags) 286{ 287 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 288 void __iomem *mapbase = sachip->base + SA1111_INTC; 289 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 290 unsigned long ip0; 291 292 if (flags == IRQ_TYPE_PROBE) 293 return 0; 294 295 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 296 return -EINVAL; 297 298 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 299 if (flags & IRQ_TYPE_EDGE_RISING) 300 ip0 &= ~mask; 301 else 302 ip0 |= mask; 303 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 304 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); 305 306 return 0; 307} 308 309static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on) 310{ 311 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 312 void __iomem *mapbase = sachip->base + SA1111_INTC; 313 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 314 unsigned long we0; 315 316 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 317 if (on) 318 we0 |= mask; 319 else 320 we0 &= ~mask; 321 sa1111_writel(we0, mapbase + SA1111_WAKEEN0); 322 323 return 0; 324} 325 326static struct irq_chip sa1111_low_chip = { 327 .name = "SA1111-l", 328 .irq_ack = sa1111_ack_irq, 329 .irq_mask = sa1111_mask_lowirq, 330 .irq_unmask = sa1111_unmask_lowirq, 331 .irq_retrigger = sa1111_retrigger_lowirq, 332 .irq_set_type = sa1111_type_lowirq, 333 .irq_set_wake = sa1111_wake_lowirq, 334}; 335 336static void sa1111_mask_highirq(struct irq_data *d) 337{ 338 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 339 void __iomem *mapbase = sachip->base + SA1111_INTC; 340 unsigned long ie1; 341 342 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 343 ie1 &= ~SA1111_IRQMASK_HI(d->irq); 344 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 345} 346 347static void sa1111_unmask_highirq(struct irq_data *d) 348{ 349 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 350 void __iomem *mapbase = sachip->base + SA1111_INTC; 351 unsigned long ie1; 352 353 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 354 ie1 |= SA1111_IRQMASK_HI(d->irq); 355 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 356} 357 358/* 359 * Attempt to re-trigger the interrupt. The SA1111 contains a register 360 * (INTSET) which claims to do this. However, in practice no amount of 361 * manipulation of INTEN and INTSET guarantees that the interrupt will 362 * be triggered. In fact, its very difficult, if not impossible to get 363 * INTSET to re-trigger the interrupt. 364 */ 365static int sa1111_retrigger_highirq(struct irq_data *d) 366{ 367 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 368 void __iomem *mapbase = sachip->base + SA1111_INTC; 369 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 370 unsigned long ip1; 371 int i; 372 373 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 374 for (i = 0; i < 8; i++) { 375 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); 376 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 377 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 378 break; 379 } 380 381 if (i == 8) 382 printk(KERN_ERR "Danger Will Robinson: failed to " 383 "re-trigger IRQ%d\n", d->irq); 384 return i == 8 ? -1 : 0; 385} 386 387static int sa1111_type_highirq(struct irq_data *d, unsigned int flags) 388{ 389 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 390 void __iomem *mapbase = sachip->base + SA1111_INTC; 391 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 392 unsigned long ip1; 393 394 if (flags == IRQ_TYPE_PROBE) 395 return 0; 396 397 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 398 return -EINVAL; 399 400 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 401 if (flags & IRQ_TYPE_EDGE_RISING) 402 ip1 &= ~mask; 403 else 404 ip1 |= mask; 405 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 406 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); 407 408 return 0; 409} 410 411static int sa1111_wake_highirq(struct irq_data *d, unsigned int on) 412{ 413 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 414 void __iomem *mapbase = sachip->base + SA1111_INTC; 415 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 416 unsigned long we1; 417 418 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 419 if (on) 420 we1 |= mask; 421 else 422 we1 &= ~mask; 423 sa1111_writel(we1, mapbase + SA1111_WAKEEN1); 424 425 return 0; 426} 427 428static struct irq_chip sa1111_high_chip = { 429 .name = "SA1111-h", 430 .irq_ack = sa1111_ack_irq, 431 .irq_mask = sa1111_mask_highirq, 432 .irq_unmask = sa1111_unmask_highirq, 433 .irq_retrigger = sa1111_retrigger_highirq, 434 .irq_set_type = sa1111_type_highirq, 435 .irq_set_wake = sa1111_wake_highirq, 436}; 437 438static void sa1111_setup_irq(struct sa1111 *sachip) 439{ 440 void __iomem *irqbase = sachip->base + SA1111_INTC; 441 unsigned int irq; 442 443 /* 444 * We're guaranteed that this region hasn't been taken. 445 */ 446 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); 447 448 /* disable all IRQs */ 449 sa1111_writel(0, irqbase + SA1111_INTEN0); 450 sa1111_writel(0, irqbase + SA1111_INTEN1); 451 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 452 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 453 454 /* 455 * detect on rising edge. Note: Feb 2001 Errata for SA1111 456 * specifies that S0ReadyInt and S1ReadyInt should be '1'. 457 */ 458 sa1111_writel(0, irqbase + SA1111_INTPOL0); 459 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | 460 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), 461 irqbase + SA1111_INTPOL1); 462 463 /* clear all IRQs */ 464 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); 465 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 466 467 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 468 irq_set_chip_and_handler(irq, &sa1111_low_chip, 469 handle_edge_irq); 470 irq_set_chip_data(irq, sachip); 471 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 472 } 473 474 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 475 irq_set_chip_and_handler(irq, &sa1111_high_chip, 476 handle_edge_irq); 477 irq_set_chip_data(irq, sachip); 478 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 479 } 480 481 /* 482 * Register SA1111 interrupt 483 */ 484 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 485 irq_set_handler_data(sachip->irq, sachip); 486 irq_set_chained_handler(sachip->irq, sa1111_irq_handler); 487} 488 489/* 490 * Bring the SA1111 out of reset. This requires a set procedure: 491 * 1. nRESET asserted (by hardware) 492 * 2. CLK turned on from SA1110 493 * 3. nRESET deasserted 494 * 4. VCO turned on, PLL_BYPASS turned off 495 * 5. Wait lock time, then assert RCLKEn 496 * 7. PCR set to allow clocking of individual functions 497 * 498 * Until we've done this, the only registers we can access are: 499 * SBI_SKCR 500 * SBI_SMCR 501 * SBI_SKID 502 */ 503static void sa1111_wake(struct sa1111 *sachip) 504{ 505 unsigned long flags, r; 506 507 spin_lock_irqsave(&sachip->lock, flags); 508 509 clk_enable(sachip->clk); 510 511 /* 512 * Turn VCO on, and disable PLL Bypass. 513 */ 514 r = sa1111_readl(sachip->base + SA1111_SKCR); 515 r &= ~SKCR_VCO_OFF; 516 sa1111_writel(r, sachip->base + SA1111_SKCR); 517 r |= SKCR_PLL_BYPASS | SKCR_OE_EN; 518 sa1111_writel(r, sachip->base + SA1111_SKCR); 519 520 /* 521 * Wait lock time. SA1111 manual _doesn't_ 522 * specify a figure for this! We choose 100us. 523 */ 524 udelay(100); 525 526 /* 527 * Enable RCLK. We also ensure that RDYEN is set. 528 */ 529 r |= SKCR_RCLKEN | SKCR_RDYEN; 530 sa1111_writel(r, sachip->base + SA1111_SKCR); 531 532 /* 533 * Wait 14 RCLK cycles for the chip to finish coming out 534 * of reset. (RCLK=24MHz). This is 590ns. 535 */ 536 udelay(1); 537 538 /* 539 * Ensure all clocks are initially off. 540 */ 541 sa1111_writel(0, sachip->base + SA1111_SKPCR); 542 543 spin_unlock_irqrestore(&sachip->lock, flags); 544} 545 546#ifdef CONFIG_ARCH_SA1100 547 548static u32 sa1111_dma_mask[] = { 549 ~0, 550 ~(1 << 20), 551 ~(1 << 23), 552 ~(1 << 24), 553 ~(1 << 25), 554 ~(1 << 20), 555 ~(1 << 20), 556 0, 557}; 558 559/* 560 * Configure the SA1111 shared memory controller. 561 */ 562void 563sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, 564 unsigned int cas_latency) 565{ 566 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); 567 568 if (cas_latency == 3) 569 smcr |= SMCR_CLAT; 570 571 sa1111_writel(smcr, sachip->base + SA1111_SMCR); 572 573 /* 574 * Now clear the bits in the DMA mask to work around the SA1111 575 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion 576 * Chip Specification Update, June 2000, Erratum #7). 577 */ 578 if (sachip->dev->dma_mask) 579 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; 580 581 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; 582} 583#endif 584 585#ifdef CONFIG_DMABOUNCE 586/* 587 * According to the "Intel StrongARM SA-1111 Microprocessor Companion 588 * Chip Specification Update" (June 2000), erratum #7, there is a 589 * significant bug in the SA1111 SDRAM shared memory controller. If 590 * an access to a region of memory above 1MB relative to the bank base, 591 * it is important that address bit 10 _NOT_ be asserted. Depending 592 * on the configuration of the RAM, bit 10 may correspond to one 593 * of several different (processor-relative) address bits. 594 * 595 * This routine only identifies whether or not a given DMA address 596 * is susceptible to the bug. 597 * 598 * This should only get called for sa1111_device types due to the 599 * way we configure our device dma_masks. 600 */ 601static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) 602{ 603 /* 604 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module 605 * User's Guide" mentions that jumpers R51 and R52 control the 606 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or 607 * SDRAM bank 1 on Neponset). The default configuration selects 608 * Assabet, so any address in bank 1 is necessarily invalid. 609 */ 610 return (machine_is_assabet() || machine_is_pfs168()) && 611 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); 612} 613#endif 614 615static void sa1111_dev_release(struct device *_dev) 616{ 617 struct sa1111_dev *dev = SA1111_DEV(_dev); 618 619 release_resource(&dev->res); 620 kfree(dev); 621} 622 623static int 624sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, 625 struct sa1111_dev_info *info) 626{ 627 struct sa1111_dev *dev; 628 int ret; 629 630 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); 631 if (!dev) { 632 ret = -ENOMEM; 633 goto out; 634 } 635 636 dev_set_name(&dev->dev, "%4.4lx", info->offset); 637 dev->devid = info->devid; 638 dev->dev.parent = sachip->dev; 639 dev->dev.bus = &sa1111_bus_type; 640 dev->dev.release = sa1111_dev_release; 641 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; 642 dev->res.start = sachip->phys + info->offset; 643 dev->res.end = dev->res.start + 511; 644 dev->res.name = dev_name(&dev->dev); 645 dev->res.flags = IORESOURCE_MEM; 646 dev->mapbase = sachip->base + info->offset; 647 dev->skpcr_mask = info->skpcr_mask; 648 memmove(dev->irq, info->irq, sizeof(dev->irq)); 649 650 ret = request_resource(parent, &dev->res); 651 if (ret) { 652 printk("SA1111: failed to allocate resource for %s\n", 653 dev->res.name); 654 dev_set_name(&dev->dev, NULL); 655 kfree(dev); 656 goto out; 657 } 658 659 660 ret = device_register(&dev->dev); 661 if (ret) { 662 release_resource(&dev->res); 663 kfree(dev); 664 goto out; 665 } 666 667#ifdef CONFIG_DMABOUNCE 668 /* 669 * If the parent device has a DMA mask associated with it, 670 * propagate it down to the children. 671 */ 672 if (sachip->dev->dma_mask) { 673 dev->dma_mask = *sachip->dev->dma_mask; 674 dev->dev.dma_mask = &dev->dma_mask; 675 676 if (dev->dma_mask != 0xffffffffUL) { 677 ret = dmabounce_register_dev(&dev->dev, 1024, 4096, 678 sa1111_needs_bounce); 679 if (ret) { 680 dev_err(&dev->dev, "SA1111: Failed to register" 681 " with dmabounce\n"); 682 device_unregister(&dev->dev); 683 } 684 } 685 } 686#endif 687 688out: 689 return ret; 690} 691 692/** 693 * sa1111_probe - probe for a single SA1111 chip. 694 * @phys_addr: physical address of device. 695 * 696 * Probe for a SA1111 chip. This must be called 697 * before any other SA1111-specific code. 698 * 699 * Returns: 700 * %-ENODEV device not found. 701 * %-EBUSY physical address already marked in-use. 702 * %0 successful. 703 */ 704static int __devinit 705__sa1111_probe(struct device *me, struct resource *mem, int irq) 706{ 707 struct sa1111 *sachip; 708 unsigned long id; 709 unsigned int has_devs; 710 int i, ret = -ENODEV; 711 712 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); 713 if (!sachip) 714 return -ENOMEM; 715 716 sachip->clk = clk_get(me, "SA1111_CLK"); 717 if (IS_ERR(sachip->clk)) { 718 ret = PTR_ERR(sachip->clk); 719 goto err_free; 720 } 721 722 ret = clk_prepare(sachip->clk); 723 if (ret) 724 goto err_clkput; 725 726 spin_lock_init(&sachip->lock); 727 728 sachip->dev = me; 729 dev_set_drvdata(sachip->dev, sachip); 730 731 sachip->phys = mem->start; 732 sachip->irq = irq; 733 734 /* 735 * Map the whole region. This also maps the 736 * registers for our children. 737 */ 738 sachip->base = ioremap(mem->start, PAGE_SIZE * 2); 739 if (!sachip->base) { 740 ret = -ENOMEM; 741 goto err_clk_unprep; 742 } 743 744 /* 745 * Probe for the chip. Only touch the SBI registers. 746 */ 747 id = sa1111_readl(sachip->base + SA1111_SKID); 748 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 749 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); 750 ret = -ENODEV; 751 goto err_unmap; 752 } 753 754 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " 755 "silicon revision %lx, metal revision %lx\n", 756 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); 757 758 /* 759 * We found it. Wake the chip up, and initialise. 760 */ 761 sa1111_wake(sachip); 762 763#ifdef CONFIG_ARCH_SA1100 764 { 765 unsigned int val; 766 767 /* 768 * The SDRAM configuration of the SA1110 and the SA1111 must 769 * match. This is very important to ensure that SA1111 accesses 770 * don't corrupt the SDRAM. Note that this ungates the SA1111's 771 * MBGNT signal, so we must have called sa1110_mb_disable() 772 * beforehand. 773 */ 774 sa1111_configure_smc(sachip, 1, 775 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), 776 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); 777 778 /* 779 * We only need to turn on DCLK whenever we want to use the 780 * DMA. It can otherwise be held firmly in the off position. 781 * (currently, we always enable it.) 782 */ 783 val = sa1111_readl(sachip->base + SA1111_SKPCR); 784 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); 785 786 /* 787 * Enable the SA1110 memory bus request and grant signals. 788 */ 789 sa1110_mb_enable(); 790 } 791#endif 792 793 /* 794 * The interrupt controller must be initialised before any 795 * other device to ensure that the interrupts are available. 796 */ 797 if (sachip->irq != NO_IRQ) 798 sa1111_setup_irq(sachip); 799 800 g_sa1111 = sachip; 801 802 has_devs = ~0; 803 if (machine_is_assabet() || machine_is_jornada720() || 804 machine_is_badge4()) 805 has_devs &= ~(1 << 4); 806 else 807 has_devs &= ~(1 << 1); 808 809 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) 810 if (has_devs & (1 << i)) 811 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); 812 813 return 0; 814 815 err_unmap: 816 iounmap(sachip->base); 817 err_clk_unprep: 818 clk_unprepare(sachip->clk); 819 err_clkput: 820 clk_put(sachip->clk); 821 err_free: 822 kfree(sachip); 823 return ret; 824} 825 826static int sa1111_remove_one(struct device *dev, void *data) 827{ 828 device_unregister(dev); 829 return 0; 830} 831 832static void __sa1111_remove(struct sa1111 *sachip) 833{ 834 void __iomem *irqbase = sachip->base + SA1111_INTC; 835 836 device_for_each_child(sachip->dev, NULL, sa1111_remove_one); 837 838 /* disable all IRQs */ 839 sa1111_writel(0, irqbase + SA1111_INTEN0); 840 sa1111_writel(0, irqbase + SA1111_INTEN1); 841 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 842 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 843 844 clk_disable(sachip->clk); 845 clk_unprepare(sachip->clk); 846 847 if (sachip->irq != NO_IRQ) { 848 irq_set_chained_handler(sachip->irq, NULL); 849 irq_set_handler_data(sachip->irq, NULL); 850 851 release_mem_region(sachip->phys + SA1111_INTC, 512); 852 } 853 854 iounmap(sachip->base); 855 clk_put(sachip->clk); 856 kfree(sachip); 857} 858 859struct sa1111_save_data { 860 unsigned int skcr; 861 unsigned int skpcr; 862 unsigned int skcdr; 863 unsigned char skaud; 864 unsigned char skpwm0; 865 unsigned char skpwm1; 866 867 /* 868 * Interrupt controller 869 */ 870 unsigned int intpol0; 871 unsigned int intpol1; 872 unsigned int inten0; 873 unsigned int inten1; 874 unsigned int wakepol0; 875 unsigned int wakepol1; 876 unsigned int wakeen0; 877 unsigned int wakeen1; 878}; 879 880#ifdef CONFIG_PM 881 882static int sa1111_suspend(struct platform_device *dev, pm_message_t state) 883{ 884 struct sa1111 *sachip = platform_get_drvdata(dev); 885 struct sa1111_save_data *save; 886 unsigned long flags; 887 unsigned int val; 888 void __iomem *base; 889 890 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); 891 if (!save) 892 return -ENOMEM; 893 sachip->saved_state = save; 894 895 spin_lock_irqsave(&sachip->lock, flags); 896 897 /* 898 * Save state. 899 */ 900 base = sachip->base; 901 save->skcr = sa1111_readl(base + SA1111_SKCR); 902 save->skpcr = sa1111_readl(base + SA1111_SKPCR); 903 save->skcdr = sa1111_readl(base + SA1111_SKCDR); 904 save->skaud = sa1111_readl(base + SA1111_SKAUD); 905 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); 906 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); 907 908 sa1111_writel(0, sachip->base + SA1111_SKPWM0); 909 sa1111_writel(0, sachip->base + SA1111_SKPWM1); 910 911 base = sachip->base + SA1111_INTC; 912 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); 913 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); 914 save->inten0 = sa1111_readl(base + SA1111_INTEN0); 915 save->inten1 = sa1111_readl(base + SA1111_INTEN1); 916 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); 917 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); 918 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); 919 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); 920 921 /* 922 * Disable. 923 */ 924 val = sa1111_readl(sachip->base + SA1111_SKCR); 925 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); 926 927 clk_disable(sachip->clk); 928 929 spin_unlock_irqrestore(&sachip->lock, flags); 930 931#ifdef CONFIG_ARCH_SA1100 932 sa1110_mb_disable(); 933#endif 934 935 return 0; 936} 937 938/* 939 * sa1111_resume - Restore the SA1111 device state. 940 * @dev: device to restore 941 * 942 * Restore the general state of the SA1111; clock control and 943 * interrupt controller. Other parts of the SA1111 must be 944 * restored by their respective drivers, and must be called 945 * via LDM after this function. 946 */ 947static int sa1111_resume(struct platform_device *dev) 948{ 949 struct sa1111 *sachip = platform_get_drvdata(dev); 950 struct sa1111_save_data *save; 951 unsigned long flags, id; 952 void __iomem *base; 953 954 save = sachip->saved_state; 955 if (!save) 956 return 0; 957 958 /* 959 * Ensure that the SA1111 is still here. 960 * FIXME: shouldn't do this here. 961 */ 962 id = sa1111_readl(sachip->base + SA1111_SKID); 963 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 964 __sa1111_remove(sachip); 965 platform_set_drvdata(dev, NULL); 966 kfree(save); 967 return 0; 968 } 969 970 /* 971 * First of all, wake up the chip. 972 */ 973 sa1111_wake(sachip); 974 975#ifdef CONFIG_ARCH_SA1100 976 /* Enable the memory bus request/grant signals */ 977 sa1110_mb_enable(); 978#endif 979 980 /* 981 * Only lock for write ops. Also, sa1111_wake must be called with 982 * released spinlock! 983 */ 984 spin_lock_irqsave(&sachip->lock, flags); 985 986 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 987 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 988 989 base = sachip->base; 990 sa1111_writel(save->skcr, base + SA1111_SKCR); 991 sa1111_writel(save->skpcr, base + SA1111_SKPCR); 992 sa1111_writel(save->skcdr, base + SA1111_SKCDR); 993 sa1111_writel(save->skaud, base + SA1111_SKAUD); 994 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); 995 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); 996 997 base = sachip->base + SA1111_INTC; 998 sa1111_writel(save->intpol0, base + SA1111_INTPOL0); 999 sa1111_writel(save->intpol1, base + SA1111_INTPOL1); 1000 sa1111_writel(save->inten0, base + SA1111_INTEN0); 1001 sa1111_writel(save->inten1, base + SA1111_INTEN1); 1002 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); 1003 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); 1004 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); 1005 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); 1006 1007 spin_unlock_irqrestore(&sachip->lock, flags); 1008 1009 sachip->saved_state = NULL; 1010 kfree(save); 1011 1012 return 0; 1013} 1014 1015#else 1016#define sa1111_suspend NULL 1017#define sa1111_resume NULL 1018#endif 1019 1020static int __devinit sa1111_probe(struct platform_device *pdev) 1021{ 1022 struct resource *mem; 1023 int irq; 1024 1025 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1026 if (!mem) 1027 return -EINVAL; 1028 irq = platform_get_irq(pdev, 0); 1029 if (irq < 0) 1030 return -ENXIO; 1031 1032 return __sa1111_probe(&pdev->dev, mem, irq); 1033} 1034 1035static int sa1111_remove(struct platform_device *pdev) 1036{ 1037 struct sa1111 *sachip = platform_get_drvdata(pdev); 1038 1039 if (sachip) { 1040#ifdef CONFIG_PM 1041 kfree(sachip->saved_state); 1042 sachip->saved_state = NULL; 1043#endif 1044 __sa1111_remove(sachip); 1045 platform_set_drvdata(pdev, NULL); 1046 } 1047 1048 return 0; 1049} 1050 1051/* 1052 * Not sure if this should be on the system bus or not yet. 1053 * We really want some way to register a system device at 1054 * the per-machine level, and then have this driver pick 1055 * up the registered devices. 1056 * 1057 * We also need to handle the SDRAM configuration for 1058 * PXA250/SA1110 machine classes. 1059 */ 1060static struct platform_driver sa1111_device_driver = { 1061 .probe = sa1111_probe, 1062 .remove = sa1111_remove, 1063 .suspend = sa1111_suspend, 1064 .resume = sa1111_resume, 1065 .driver = { 1066 .name = "sa1111", 1067 }, 1068}; 1069 1070/* 1071 * Get the parent device driver (us) structure 1072 * from a child function device 1073 */ 1074static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) 1075{ 1076 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); 1077} 1078 1079/* 1080 * The bits in the opdiv field are non-linear. 1081 */ 1082static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; 1083 1084static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) 1085{ 1086 unsigned int skcdr, fbdiv, ipdiv, opdiv; 1087 1088 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); 1089 1090 fbdiv = (skcdr & 0x007f) + 2; 1091 ipdiv = ((skcdr & 0x0f80) >> 7) + 2; 1092 opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; 1093 1094 return 3686400 * fbdiv / (ipdiv * opdiv); 1095} 1096 1097/** 1098 * sa1111_pll_clock - return the current PLL clock frequency. 1099 * @sadev: SA1111 function block 1100 * 1101 * BUG: we should look at SKCR. We also blindly believe that 1102 * the chip is being fed with the 3.6864MHz clock. 1103 * 1104 * Returns the PLL clock in Hz. 1105 */ 1106unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) 1107{ 1108 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1109 1110 return __sa1111_pll_clock(sachip); 1111} 1112EXPORT_SYMBOL(sa1111_pll_clock); 1113 1114/** 1115 * sa1111_select_audio_mode - select I2S or AC link mode 1116 * @sadev: SA1111 function block 1117 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S 1118 * 1119 * Frob the SKCR to select AC Link mode or I2S mode for 1120 * the audio block. 1121 */ 1122void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) 1123{ 1124 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1125 unsigned long flags; 1126 unsigned int val; 1127 1128 spin_lock_irqsave(&sachip->lock, flags); 1129 1130 val = sa1111_readl(sachip->base + SA1111_SKCR); 1131 if (mode == SA1111_AUDIO_I2S) { 1132 val &= ~SKCR_SELAC; 1133 } else { 1134 val |= SKCR_SELAC; 1135 } 1136 sa1111_writel(val, sachip->base + SA1111_SKCR); 1137 1138 spin_unlock_irqrestore(&sachip->lock, flags); 1139} 1140EXPORT_SYMBOL(sa1111_select_audio_mode); 1141 1142/** 1143 * sa1111_set_audio_rate - set the audio sample rate 1144 * @sadev: SA1111 SAC function block 1145 * @rate: sample rate to select 1146 */ 1147int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) 1148{ 1149 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1150 unsigned int div; 1151 1152 if (sadev->devid != SA1111_DEVID_SAC) 1153 return -EINVAL; 1154 1155 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; 1156 if (div == 0) 1157 div = 1; 1158 if (div > 128) 1159 div = 128; 1160 1161 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); 1162 1163 return 0; 1164} 1165EXPORT_SYMBOL(sa1111_set_audio_rate); 1166 1167/** 1168 * sa1111_get_audio_rate - get the audio sample rate 1169 * @sadev: SA1111 SAC function block device 1170 */ 1171int sa1111_get_audio_rate(struct sa1111_dev *sadev) 1172{ 1173 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1174 unsigned long div; 1175 1176 if (sadev->devid != SA1111_DEVID_SAC) 1177 return -EINVAL; 1178 1179 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; 1180 1181 return __sa1111_pll_clock(sachip) / (256 * div); 1182} 1183EXPORT_SYMBOL(sa1111_get_audio_rate); 1184 1185void sa1111_set_io_dir(struct sa1111_dev *sadev, 1186 unsigned int bits, unsigned int dir, 1187 unsigned int sleep_dir) 1188{ 1189 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1190 unsigned long flags; 1191 unsigned int val; 1192 void __iomem *gpio = sachip->base + SA1111_GPIO; 1193 1194#define MODIFY_BITS(port, mask, dir) \ 1195 if (mask) { \ 1196 val = sa1111_readl(port); \ 1197 val &= ~(mask); \ 1198 val |= (dir) & (mask); \ 1199 sa1111_writel(val, port); \ 1200 } 1201 1202 spin_lock_irqsave(&sachip->lock, flags); 1203 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); 1204 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); 1205 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); 1206 1207 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); 1208 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); 1209 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); 1210 spin_unlock_irqrestore(&sachip->lock, flags); 1211} 1212EXPORT_SYMBOL(sa1111_set_io_dir); 1213 1214void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1215{ 1216 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1217 unsigned long flags; 1218 unsigned int val; 1219 void __iomem *gpio = sachip->base + SA1111_GPIO; 1220 1221 spin_lock_irqsave(&sachip->lock, flags); 1222 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); 1223 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); 1224 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); 1225 spin_unlock_irqrestore(&sachip->lock, flags); 1226} 1227EXPORT_SYMBOL(sa1111_set_io); 1228 1229void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1230{ 1231 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1232 unsigned long flags; 1233 unsigned int val; 1234 void __iomem *gpio = sachip->base + SA1111_GPIO; 1235 1236 spin_lock_irqsave(&sachip->lock, flags); 1237 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); 1238 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); 1239 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); 1240 spin_unlock_irqrestore(&sachip->lock, flags); 1241} 1242EXPORT_SYMBOL(sa1111_set_sleep_io); 1243 1244/* 1245 * Individual device operations. 1246 */ 1247 1248/** 1249 * sa1111_enable_device - enable an on-chip SA1111 function block 1250 * @sadev: SA1111 function block device to enable 1251 */ 1252void sa1111_enable_device(struct sa1111_dev *sadev) 1253{ 1254 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1255 unsigned long flags; 1256 unsigned int val; 1257 1258 spin_lock_irqsave(&sachip->lock, flags); 1259 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1260 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1261 spin_unlock_irqrestore(&sachip->lock, flags); 1262} 1263EXPORT_SYMBOL(sa1111_enable_device); 1264 1265/** 1266 * sa1111_disable_device - disable an on-chip SA1111 function block 1267 * @sadev: SA1111 function block device to disable 1268 */ 1269void sa1111_disable_device(struct sa1111_dev *sadev) 1270{ 1271 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1272 unsigned long flags; 1273 unsigned int val; 1274 1275 spin_lock_irqsave(&sachip->lock, flags); 1276 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1277 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1278 spin_unlock_irqrestore(&sachip->lock, flags); 1279} 1280EXPORT_SYMBOL(sa1111_disable_device); 1281 1282/* 1283 * SA1111 "Register Access Bus." 1284 * 1285 * We model this as a regular bus type, and hang devices directly 1286 * off this. 1287 */ 1288static int sa1111_match(struct device *_dev, struct device_driver *_drv) 1289{ 1290 struct sa1111_dev *dev = SA1111_DEV(_dev); 1291 struct sa1111_driver *drv = SA1111_DRV(_drv); 1292 1293 return dev->devid == drv->devid; 1294} 1295 1296static int sa1111_bus_suspend(struct device *dev, pm_message_t state) 1297{ 1298 struct sa1111_dev *sadev = SA1111_DEV(dev); 1299 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1300 int ret = 0; 1301 1302 if (drv && drv->suspend) 1303 ret = drv->suspend(sadev, state); 1304 return ret; 1305} 1306 1307static int sa1111_bus_resume(struct device *dev) 1308{ 1309 struct sa1111_dev *sadev = SA1111_DEV(dev); 1310 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1311 int ret = 0; 1312 1313 if (drv && drv->resume) 1314 ret = drv->resume(sadev); 1315 return ret; 1316} 1317 1318static int sa1111_bus_probe(struct device *dev) 1319{ 1320 struct sa1111_dev *sadev = SA1111_DEV(dev); 1321 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1322 int ret = -ENODEV; 1323 1324 if (drv->probe) 1325 ret = drv->probe(sadev); 1326 return ret; 1327} 1328 1329static int sa1111_bus_remove(struct device *dev) 1330{ 1331 struct sa1111_dev *sadev = SA1111_DEV(dev); 1332 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1333 int ret = 0; 1334 1335 if (drv->remove) 1336 ret = drv->remove(sadev); 1337 return ret; 1338} 1339 1340struct bus_type sa1111_bus_type = { 1341 .name = "sa1111-rab", 1342 .match = sa1111_match, 1343 .probe = sa1111_bus_probe, 1344 .remove = sa1111_bus_remove, 1345 .suspend = sa1111_bus_suspend, 1346 .resume = sa1111_bus_resume, 1347}; 1348EXPORT_SYMBOL(sa1111_bus_type); 1349 1350int sa1111_driver_register(struct sa1111_driver *driver) 1351{ 1352 driver->drv.bus = &sa1111_bus_type; 1353 return driver_register(&driver->drv); 1354} 1355EXPORT_SYMBOL(sa1111_driver_register); 1356 1357void sa1111_driver_unregister(struct sa1111_driver *driver) 1358{ 1359 driver_unregister(&driver->drv); 1360} 1361EXPORT_SYMBOL(sa1111_driver_unregister); 1362 1363static int __init sa1111_init(void) 1364{ 1365 int ret = bus_register(&sa1111_bus_type); 1366 if (ret == 0) 1367 platform_driver_register(&sa1111_device_driver); 1368 return ret; 1369} 1370 1371static void __exit sa1111_exit(void) 1372{ 1373 platform_driver_unregister(&sa1111_device_driver); 1374 bus_unregister(&sa1111_bus_type); 1375} 1376 1377subsys_initcall(sa1111_init); 1378module_exit(sa1111_exit); 1379 1380MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); 1381MODULE_LICENSE("GPL"); 1382