kvm_arm.h revision 342cd0ab0e6ca3fe7c88a78890352748b8e894a9
1749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall/* 2749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Copyright (C) 2012 - Virtual Open Systems and Columbia University 3749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Author: Christoffer Dall <c.dall@virtualopensystems.com> 4749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * 5749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * This program is free software; you can redistribute it and/or modify 6749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * it under the terms of the GNU General Public License, version 2, as 7749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * published by the Free Software Foundation. 8749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * 9749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * This program is distributed in the hope that it will be useful, 10749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * but WITHOUT ANY WARRANTY; without even the implied warranty of 11749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * GNU General Public License for more details. 13749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * 14749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * You should have received a copy of the GNU General Public License 15749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * along with this program; if not, write to the Free Software 16749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall */ 18749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 19749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#ifndef __ARM_KVM_ARM_H__ 20749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define __ARM_KVM_ARM_H__ 21749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 22749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#include <linux/types.h> 23749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 24342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* Hyp Configuration Register (HCR) bits */ 25342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TGE (1 << 27) 26342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TVM (1 << 26) 27342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TTLB (1 << 25) 28342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TPU (1 << 24) 29342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TPC (1 << 23) 30342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TSW (1 << 22) 31342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TAC (1 << 21) 32342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TIDCP (1 << 20) 33342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TSC (1 << 19) 34342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TID3 (1 << 18) 35342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TID2 (1 << 17) 36342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TID1 (1 << 16) 37342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TID0 (1 << 15) 38342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TWE (1 << 14) 39342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_TWI (1 << 13) 40342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_DC (1 << 12) 41342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_BSU (3 << 10) 42342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_BSU_IS (1 << 10) 43342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_FB (1 << 9) 44342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_VA (1 << 8) 45342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_VI (1 << 7) 46342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_VF (1 << 6) 47342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_AMO (1 << 5) 48342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_IMO (1 << 4) 49342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_FMO (1 << 3) 50342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_PTW (1 << 2) 51342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_SWIO (1 << 1) 52342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_VM 1 53342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 54342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* 55342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * The bits we set in HCR: 56342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * TAC: Trap ACTLR 57342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * TSC: Trap SMC 58342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * TSW: Trap cache operations by set/way 59342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * TWI: Trap WFI 60342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * TIDCP: Trap L2CTLR/L2ECTLR 61342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * BSU_IS: Upgrade barriers to the inner shareable domain 62342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * FB: Force broadcast of all maintainance operations 63342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * AMO: Override CPSR.A and enable signaling with VA 64342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * IMO: Override CPSR.I and enable signaling with VI 65342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * FMO: Override CPSR.F and enable signaling with VF 66342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * SWIO: Turn set/way invalidates into set/way clean+invalidate 67342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall */ 68342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HCR_GUEST_MASK (HCR_TSC | HCR_TSW | HCR_TWI | HCR_VM | HCR_BSU_IS | \ 69342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall HCR_FB | HCR_TAC | HCR_AMO | HCR_IMO | HCR_FMO | \ 70342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall HCR_SWIO | HCR_TIDCP) 71342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 72342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* Hyp System Control Register (HSCTLR) bits */ 73342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_TE (1 << 30) 74342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_EE (1 << 25) 75342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_FI (1 << 21) 76342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_WXN (1 << 19) 77342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_I (1 << 12) 78342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_C (1 << 2) 79342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_A (1 << 1) 80342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_M 1 81342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HSCTLR_MASK (HSCTLR_M | HSCTLR_A | HSCTLR_C | HSCTLR_I | \ 82342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall HSCTLR_WXN | HSCTLR_FI | HSCTLR_EE | HSCTLR_TE) 83342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 84342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* TTBCR and HTCR Registers bits */ 85342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_EAE (1 << 31) 86342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_IMP (1 << 30) 87342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_SH1 (3 << 28) 88342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_ORGN1 (3 << 26) 89342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_IRGN1 (3 << 24) 90342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_EPD1 (1 << 23) 91342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_A1 (1 << 22) 92342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_T1SZ (3 << 16) 93342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_SH0 (3 << 12) 94342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_ORGN0 (3 << 10) 95342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_IRGN0 (3 << 8) 96342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_EPD0 (1 << 7) 97342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define TTBCR_T0SZ 3 98342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HTCR_MASK (TTBCR_T0SZ | TTBCR_IRGN0 | TTBCR_ORGN0 | TTBCR_SH0) 99342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 100342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* Hyp Debug Configuration Register bits */ 101342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_TDRA (1 << 11) 102342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_TDOSA (1 << 10) 103342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_TDA (1 << 9) 104342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_TDE (1 << 8) 105342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_HPME (1 << 7) 106342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_TPM (1 << 6) 107342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_TPMCR (1 << 5) 108342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define HDCR_HPMN_MASK (0x1F) 109342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 110342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* 111342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * The architecture supports 40-bit IPA as input to the 2nd stage translations 112342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * and PTRS_PER_S2_PGD becomes 1024, because each entry covers 1GB of address 113342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall * space. 114342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall */ 115342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_PHYS_SHIFT (40) 116342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_PHYS_SIZE (1ULL << KVM_PHYS_SHIFT) 117342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_PHYS_MASK (KVM_PHYS_SIZE - 1ULL) 118342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define PTRS_PER_S2_PGD (1ULL << (KVM_PHYS_SHIFT - 30)) 119342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t)) 120342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define S2_PGD_SIZE (1 << S2_PGD_ORDER) 121342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 122342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* Virtualization Translation Control Register (VTCR) bits */ 123342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_SH0 (3 << 12) 124342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_ORGN0 (3 << 10) 125342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_IRGN0 (3 << 8) 126342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_SL0 (3 << 6) 127342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_S (1 << 4) 128342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_T0SZ (0xf) 129342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_MASK (VTCR_SH0 | VTCR_ORGN0 | VTCR_IRGN0 | VTCR_SL0 | \ 130342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall VTCR_S | VTCR_T0SZ) 131342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_HTCR_SH (VTCR_SH0 | VTCR_ORGN0 | VTCR_IRGN0) 132342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_SL_L2 (0 << 6) /* Starting-level: 2 */ 133342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTCR_SL_L1 (1 << 6) /* Starting-level: 1 */ 134342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_VTCR_SL0 VTCR_SL_L1 135342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* stage-2 input address range defined as 2^(32-T0SZ) */ 136342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_T0SZ (32 - KVM_PHYS_SHIFT) 137342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_VTCR_T0SZ (KVM_T0SZ & VTCR_T0SZ) 138342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define KVM_VTCR_S ((KVM_VTCR_T0SZ << 1) & VTCR_S) 139342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 140342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall/* Virtualization Translation Table Base Register (VTTBR) bits */ 141342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#if KVM_VTCR_SL0 == VTCR_SL_L2 /* see ARM DDI 0406C: B4-1720 */ 142342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTTBR_X (14 - KVM_T0SZ) 143342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#else 144342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#define VTTBR_X (5 - KVM_T0SZ) 145342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall#endif 146342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 147342cd0ab0e6ca3fe7c88a78890352748b8e894a9Christoffer Dall 148749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#endif /* __ARM_KVM_ARM_H__ */ 149