1dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin/* 2dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * linux/arch/arm/kernel/fiqasm.S 3dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * 4dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * Derived from code originally in linux/arch/arm/kernel/fiq.c: 5dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * 6dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * Copyright (C) 1998 Russell King 7dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * Copyright (C) 1998, 1999 Phil Blundell 8dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * Copyright (C) 2011, Linaro Limited 9dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * 10dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * FIQ support written by Philip Blundell <philb@gnu.org>, 1998. 11dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * 12dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * FIQ support re-written by Russell King to be more generic 13dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * 14dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * v7/Thumb-2 compatibility modifications by Linaro Limited, 2011. 15dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin */ 16dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin 17dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin#include <linux/linkage.h> 18dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin#include <asm/assembler.h> 19dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin 20dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin/* 21dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * Taking an interrupt in FIQ mode is death, so both these functions 22dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin * disable irqs for the duration. 23dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin */ 24dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin 25dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave MartinENTRY(__set_fiq_regs) 26dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE 27dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mrs r1, cpsr 28dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin msr cpsr_c, r2 @ select FIQ mode 29dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mov r0, r0 @ avoid hazard prior to ARMv4 30dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin ldmia r0!, {r8 - r12} 31dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin ldr sp, [r0], #4 32dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin ldr lr, [r0] 33dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin msr cpsr_c, r1 @ return to SVC mode 34dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mov r0, r0 @ avoid hazard prior to ARMv4 356ebbf2ce437b33022d30badd49dc94d33ecfa498Russell King ret lr 36dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave MartinENDPROC(__set_fiq_regs) 37dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin 38dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave MartinENTRY(__get_fiq_regs) 39dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE 40dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mrs r1, cpsr 41dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin msr cpsr_c, r2 @ select FIQ mode 42dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mov r0, r0 @ avoid hazard prior to ARMv4 43dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin stmia r0!, {r8 - r12} 44dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin str sp, [r0], #4 45dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin str lr, [r0] 46dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin msr cpsr_c, r1 @ return to SVC mode 47dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave Martin mov r0, r0 @ avoid hazard prior to ARMv4 486ebbf2ce437b33022d30badd49dc94d33ecfa498Russell King ret lr 49dc2eb928a1bcf6a48f40c1f2ff21b66bdbf91a3cDave MartinENDPROC(__get_fiq_regs) 50