1749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall/* 2749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Copyright (C) 2012 - Virtual Open Systems and Columbia University 3749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Author: Christoffer Dall <c.dall@virtualopensystems.com> 4749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * 5749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * This program is free software; you can redistribute it and/or modify 6749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * it under the terms of the GNU General Public License, version 2, as 7749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * published by the Free Software Foundation. 8749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * 9749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * This program is distributed in the hope that it will be useful, 10749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * but WITHOUT ANY WARRANTY; without even the implied warranty of 11749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * GNU General Public License for more details. 13749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * 14749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * You should have received a copy of the GNU General Public License 15749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * along with this program; if not, write to the Free Software 16749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall */ 18749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 195b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall#include <linux/mm.h> 205b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall#include <linux/kvm_host.h> 215b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall#include <asm/kvm_arm.h> 22749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#include <asm/kvm_emulate.h> 23c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier#include <asm/opcodes.h> 245b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall#include <trace/events/kvm.h> 255b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 265b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall#include "trace.h" 27749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 28749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_NR_MODES 6 29749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_REG_OFFSET_USR 0 30749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_REG_OFFSET_FIQ 1 31749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_REG_OFFSET_IRQ 2 32749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_REG_OFFSET_SVC 3 33749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_REG_OFFSET_ABT 4 34749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define VCPU_REG_OFFSET_UND 5 35749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define REG_OFFSET(_reg) \ 36749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall (offsetof(struct kvm_regs, _reg) / sizeof(u32)) 37749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 38749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall#define USR_REG_OFFSET(_num) REG_OFFSET(usr_regs.uregs[_num]) 39749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 40749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dallstatic const unsigned long vcpu_reg_offsets[VCPU_NR_MODES][15] = { 41749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall /* USR/SYS Registers */ 42749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall [VCPU_REG_OFFSET_USR] = { 43749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2), 44749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5), 45749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8), 46749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11), 47749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(12), USR_REG_OFFSET(13), USR_REG_OFFSET(14), 48749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall }, 49749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 50749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall /* FIQ Registers */ 51749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall [VCPU_REG_OFFSET_FIQ] = { 52749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2), 53749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5), 54749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(6), USR_REG_OFFSET(7), 55749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[0]), /* r8 */ 56749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[1]), /* r9 */ 57749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[2]), /* r10 */ 58749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[3]), /* r11 */ 59749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[4]), /* r12 */ 60749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[5]), /* r13 */ 61749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(fiq_regs[6]), /* r14 */ 62749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall }, 63749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 64749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall /* IRQ Registers */ 65749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall [VCPU_REG_OFFSET_IRQ] = { 66749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2), 67749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5), 68749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8), 69749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11), 70749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(12), 71749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(irq_regs[0]), /* r13 */ 72749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(irq_regs[1]), /* r14 */ 73749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall }, 74749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 75749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall /* SVC Registers */ 76749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall [VCPU_REG_OFFSET_SVC] = { 77749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2), 78749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5), 79749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8), 80749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11), 81749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(12), 82749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(svc_regs[0]), /* r13 */ 83749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(svc_regs[1]), /* r14 */ 84749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall }, 85749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 86749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall /* ABT Registers */ 87749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall [VCPU_REG_OFFSET_ABT] = { 88749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2), 89749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5), 90749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8), 91749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11), 92749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(12), 93749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(abt_regs[0]), /* r13 */ 94749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(abt_regs[1]), /* r14 */ 95749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall }, 96749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 97749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall /* UND Registers */ 98749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall [VCPU_REG_OFFSET_UND] = { 99749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2), 100749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5), 101749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8), 102749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11), 103749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall USR_REG_OFFSET(12), 104749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(und_regs[0]), /* r13 */ 105749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall REG_OFFSET(und_regs[1]), /* r14 */ 106749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall }, 107749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall}; 108749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 109749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall/* 110749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Return a pointer to the register number valid in the current mode of 111749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * the virtual CPU. 112749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall */ 113db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngierunsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num) 114749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall{ 115db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long *reg_array = (unsigned long *)&vcpu->arch.regs; 116db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long mode = *vcpu_cpsr(vcpu) & MODE_MASK; 117749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 118749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall switch (mode) { 119749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case USR_MODE...SVC_MODE: 120749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall mode &= ~MODE32_BIT; /* 0 ... 3 */ 121749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall break; 122749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 123749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case ABT_MODE: 124749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall mode = VCPU_REG_OFFSET_ABT; 125749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall break; 126749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 127749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case UND_MODE: 128749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall mode = VCPU_REG_OFFSET_UND; 129749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall break; 130749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 131749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case SYSTEM_MODE: 132749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall mode = VCPU_REG_OFFSET_USR; 133749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall break; 134749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 135749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall default: 136749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall BUG(); 137749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall } 138749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 139749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall return reg_array + vcpu_reg_offsets[mode][reg_num]; 140749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall} 141749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall 142749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall/* 143749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall * Return the SPSR for the current mode of the virtual CPU. 144749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall */ 145db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngierunsigned long *vcpu_spsr(struct kvm_vcpu *vcpu) 146749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall{ 147db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long mode = *vcpu_cpsr(vcpu) & MODE_MASK; 148749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall switch (mode) { 149749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case SVC_MODE: 150749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall return &vcpu->arch.regs.KVM_ARM_SVC_spsr; 151749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case ABT_MODE: 152749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall return &vcpu->arch.regs.KVM_ARM_ABT_spsr; 153749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case UND_MODE: 154749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall return &vcpu->arch.regs.KVM_ARM_UND_spsr; 155749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case IRQ_MODE: 156749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall return &vcpu->arch.regs.KVM_ARM_IRQ_spsr; 157749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall case FIQ_MODE: 158749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall return &vcpu->arch.regs.KVM_ARM_FIQ_spsr; 159749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall default: 160749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall BUG(); 161749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall } 162749cf76c5a363e1383108a914ea09530bfa0bd43Christoffer Dall} 1635b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 164c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier/* 165c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier * A conditional instruction is allowed to trap, even though it 166c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier * wouldn't be executed. So let's re-implement the hardware, in 167c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier * software! 168c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier */ 169c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngierbool kvm_condition_valid(struct kvm_vcpu *vcpu) 170c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier{ 171c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier unsigned long cpsr, cond, insn; 172c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 173c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* 174c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier * Exception Code 0 can only happen if we set HCR.TGE to 1, to 175c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier * catch undefined instructions, and then we won't get past 176c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier * the arm_exit_handlers test anyway. 177c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier */ 178c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier BUG_ON(!kvm_vcpu_trap_get_class(vcpu)); 179c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 180c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* Top two bits non-zero? Unconditional. */ 181c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier if (kvm_vcpu_get_hsr(vcpu) >> 30) 182c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier return true; 183c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 184c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier cpsr = *vcpu_cpsr(vcpu); 185c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 186c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* Is condition field valid? */ 187c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier if ((kvm_vcpu_get_hsr(vcpu) & HSR_CV) >> HSR_CV_SHIFT) 188c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier cond = (kvm_vcpu_get_hsr(vcpu) & HSR_COND) >> HSR_COND_SHIFT; 189c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier else { 190c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* This can happen in Thumb mode: examine IT state. */ 191c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier unsigned long it; 192c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 193c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); 194c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 195c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* it == 0 => unconditional. */ 196c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier if (it == 0) 197c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier return true; 198c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 199c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* The cond for this insn works out as the top 4 bits. */ 200c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier cond = (it >> 4); 201c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier } 202c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 203c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier /* Shift makes it look like an ARM-mode instruction */ 204c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier insn = cond << 28; 205c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier return arm_check_condition(insn, cpsr) != ARM_OPCODE_CONDTEST_FAIL; 206c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier} 207c5997563298bc1b9da5212c15544962d4dbbe27dMarc Zyngier 2085b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/** 2095b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * adjust_itstate - adjust ITSTATE when emulating instructions in IT-block 2105b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @vcpu: The VCPU pointer 2115b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * 2125b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * When exceptions occur while instructions are executed in Thumb IF-THEN 2135b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * blocks, the ITSTATE field of the CPSR is not advanved (updated), so we have 2145b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * to do this little bit of work manually. The fields map like this: 2155b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * 2165b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * IT[7:0] -> CPSR[26:25],CPSR[15:10] 2175b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 2185b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallstatic void kvm_adjust_itstate(struct kvm_vcpu *vcpu) 2195b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 2205b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall unsigned long itbits, cond; 2215b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall unsigned long cpsr = *vcpu_cpsr(vcpu); 2225b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall bool is_arm = !(cpsr & PSR_T_BIT); 2235b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2245b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall BUG_ON(is_arm && (cpsr & PSR_IT_MASK)); 2255b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2265b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (!(cpsr & PSR_IT_MASK)) 2275b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall return; 2285b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2295b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall cond = (cpsr & 0xe000) >> 13; 2305b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall itbits = (cpsr & 0x1c00) >> (10 - 2); 2315b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall itbits |= (cpsr & (0x3 << 25)) >> 25; 2325b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2335b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Perform ITAdvance (see page A-52 in ARM DDI 0406C) */ 2345b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if ((itbits & 0x7) == 0) 2355b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall itbits = cond = 0; 2365b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall else 2375b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall itbits = (itbits << 1) & 0x1f; 2385b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2395b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall cpsr &= ~PSR_IT_MASK; 2405b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall cpsr |= cond << 13; 2415b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall cpsr |= (itbits & 0x1c) << (10 - 2); 2425b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall cpsr |= (itbits & 0x3) << 25; 2435b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) = cpsr; 2445b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 2455b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2465b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/** 2475b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * kvm_skip_instr - skip a trapped instruction and proceed to the next 2485b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @vcpu: The vcpu pointer 2495b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 2505b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallvoid kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr) 2515b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 2525b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall bool is_thumb; 2535b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2545b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_T_BIT); 2555b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (is_thumb && !is_wide_instr) 2565b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_pc(vcpu) += 2; 2575b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall else 2585b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_pc(vcpu) += 4; 2595b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall kvm_adjust_itstate(vcpu); 2605b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 2615b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2625b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2635b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/****************************************************************************** 2645b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * Inject exceptions into the guest 2655b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 2665b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2675b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallstatic u32 exc_vector_base(struct kvm_vcpu *vcpu) 2685b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 2695b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 sctlr = vcpu->arch.cp15[c1_SCTLR]; 2705b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 vbar = vcpu->arch.cp15[c12_VBAR]; 2715b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2725b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (sctlr & SCTLR_V) 2735b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall return 0xffff0000; 2745b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall else /* always have security exceptions */ 2755b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall return vbar; 2765b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 2775b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2785b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/** 2795b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * kvm_inject_undefined - inject an undefined exception into the guest 2805b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @vcpu: The VCPU to receive the undefined exception 2815b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * 2825b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * It is assumed that this code is called from the VCPU thread and that the 2835b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * VCPU therefore is not currently executing guest code. 2845b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * 2855b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * Modelled after TakeUndefInstrException() pseudocode. 2865b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 2875b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallvoid kvm_inject_undefined(struct kvm_vcpu *vcpu) 2885b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 289db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long new_lr_value; 290db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long new_spsr_value; 291db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long cpsr = *vcpu_cpsr(vcpu); 2925b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 sctlr = vcpu->arch.cp15[c1_SCTLR]; 2935b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall bool is_thumb = (cpsr & PSR_T_BIT); 2945b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 vect_offset = 4; 2955b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 return_offset = (is_thumb) ? 2 : 4; 2965b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 2975b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall new_spsr_value = cpsr; 2985b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall new_lr_value = *vcpu_pc(vcpu) - return_offset; 2995b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3005b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) = (cpsr & ~MODE_MASK) | UND_MODE; 3015b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) |= PSR_I_BIT; 3025b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) &= ~(PSR_IT_MASK | PSR_J_BIT | PSR_E_BIT | PSR_T_BIT); 3035b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3045b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (sctlr & SCTLR_TE) 3055b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) |= PSR_T_BIT; 3065b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (sctlr & SCTLR_EE) 3075b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) |= PSR_E_BIT; 3085b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3095b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Note: These now point to UND banked copies */ 3105b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_spsr(vcpu) = cpsr; 3115b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_reg(vcpu, 14) = new_lr_value; 3125b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3135b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Branch to exception vector */ 3145b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset; 3155b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 3165b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3175b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/* 3185b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * Modelled after TakeDataAbortException() and TakePrefetchAbortException 3195b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * pseudocode. 3205b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 3215b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallstatic void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr) 3225b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 323db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long new_lr_value; 324db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long new_spsr_value; 325db730d8d623a0826f7fb6b74e890d3eb97a1b7a3Marc Zyngier unsigned long cpsr = *vcpu_cpsr(vcpu); 3265b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 sctlr = vcpu->arch.cp15[c1_SCTLR]; 3275b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall bool is_thumb = (cpsr & PSR_T_BIT); 3285b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 vect_offset; 3295b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall u32 return_offset = (is_thumb) ? 4 : 0; 3305b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall bool is_lpae; 3315b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3325b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall new_spsr_value = cpsr; 3335b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall new_lr_value = *vcpu_pc(vcpu) + return_offset; 3345b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3355b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) = (cpsr & ~MODE_MASK) | ABT_MODE; 3365b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) |= PSR_I_BIT | PSR_A_BIT; 3375b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) &= ~(PSR_IT_MASK | PSR_J_BIT | PSR_E_BIT | PSR_T_BIT); 3385b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3395b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (sctlr & SCTLR_TE) 3405b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) |= PSR_T_BIT; 3415b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (sctlr & SCTLR_EE) 3425b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_cpsr(vcpu) |= PSR_E_BIT; 3435b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3445b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Note: These now point to ABT banked copies */ 3455b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_spsr(vcpu) = cpsr; 3465b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_reg(vcpu, 14) = new_lr_value; 3475b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3485b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (is_pabt) 3495b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vect_offset = 12; 3505b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall else 3515b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vect_offset = 16; 3525b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3535b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Branch to exception vector */ 3545b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall *vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset; 3555b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3565b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (is_pabt) { 357b373e492f3a3469c615c2ae218d2f723900bf981Anup Patel /* Set IFAR and IFSR */ 3585b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vcpu->arch.cp15[c6_IFAR] = addr; 3595b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall is_lpae = (vcpu->arch.cp15[c2_TTBCR] >> 31); 3605b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Always give debug fault for now - should give guest a clue */ 3615b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (is_lpae) 3625b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vcpu->arch.cp15[c5_IFSR] = 1 << 9 | 0x22; 3635b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall else 3645b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vcpu->arch.cp15[c5_IFSR] = 2; 3655b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall } else { /* !iabt */ 3665b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Set DFAR and DFSR */ 3675b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vcpu->arch.cp15[c6_DFAR] = addr; 3685b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall is_lpae = (vcpu->arch.cp15[c2_TTBCR] >> 31); 3695b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall /* Always give debug fault for now - should give guest a clue */ 3705b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall if (is_lpae) 3715b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vcpu->arch.cp15[c5_DFSR] = 1 << 9 | 0x22; 3725b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall else 3735b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall vcpu->arch.cp15[c5_DFSR] = 2; 3745b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall } 3755b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3765b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 3775b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3785b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/** 3795b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * kvm_inject_dabt - inject a data abort into the guest 3805b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @vcpu: The VCPU to receive the undefined exception 3815b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @addr: The address to report in the DFAR 3825b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * 3835b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * It is assumed that this code is called from the VCPU thread and that the 3845b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * VCPU therefore is not currently executing guest code. 3855b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 3865b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallvoid kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr) 3875b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 3885b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall inject_abt(vcpu, false, addr); 3895b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 3905b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall 3915b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall/** 3925b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * kvm_inject_pabt - inject a prefetch abort into the guest 3935b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @vcpu: The VCPU to receive the undefined exception 3945b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * @addr: The address to report in the DFAR 3955b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * 3965b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * It is assumed that this code is called from the VCPU thread and that the 3975b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall * VCPU therefore is not currently executing guest code. 3985b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall */ 3995b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dallvoid kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr) 4005b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall{ 4015b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall inject_abt(vcpu, true, addr); 4025b3e5e5bf230f56309706dfc05fc0cb173cc83aaChristoffer Dall} 403