15e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren/* 2670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren * linux/arch/arm/mach-omap1/sleep.S 35e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 47c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton * Low-level OMAP7XX/1510/1610 sleep/wakeUp support 55e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 65e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Initial SA1110 code: 75e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> 85e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 95e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Adapted for PXA by Nicolas Pitre: 105e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Copyright (c) 2002 Monta Vista Software, Inc. 115e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 125e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Support for OMAP1510/1610 by Dirk Behme <dirk.behme@de.bosch.com> 135e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 145e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * This program is free software; you can redistribute it and/or modify it 155e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * under the terms of the GNU General Public License as published by the 165e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Free Software Foundation; either version 2 of the License, or (at your 175e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * option) any later version. 185e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 195e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 205e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 215e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 225e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 235e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 245e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 255e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 265e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 275e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 285e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 295e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 305e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * You should have received a copy of the GNU General Public License along 315e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * with this program; if not, write to the Free Software Foundation, Inc., 325e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 675 Mass Ave, Cambridge, MA 02139, USA. 335e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren */ 345e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 355e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren#include <linux/linkage.h> 362e3ee9f45b3c25faa012abc9a62ab7aa515cd617Tony Lindgren 375e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren#include <asm/assembler.h> 382e3ee9f45b3c25faa012abc9a62ab7aa515cd617Tony Lindgren 394e969010c55d72fbdc69333ce59392c7b530f6a3Tony Lindgren#include <mach/hardware.h> 404e969010c55d72fbdc69333ce59392c7b530f6a3Tony Lindgren 412e3ee9f45b3c25faa012abc9a62ab7aa515cd617Tony Lindgren#include "iomap.h" 42c912f7e1eae169aaca333b4c5da3f36c98f2ccb0Kevin Hilman#include "pm.h" 435e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 445e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren .text 455e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 465e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 475e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren/* 485e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Forces OMAP into deep sleep state 495e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 505e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * omapXXXX_cpu_suspend() 515e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 525e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * The values of the registers ARM_IDLECT1 and ARM_IDLECT2 are passed 535e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * as arg0 and arg1 from caller. arg0 is stored in register r0 and arg1 545e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * in register r1. 555e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 565e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Note: This code get's copied to internal SRAM at boot. When the OMAP 575e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * wakes up it continues execution at the point it went to sleep. 585e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 595e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Note: Because of errata work arounds we have processor specific functions 605e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * here. They are mostly the same, but slightly different. 615e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 625e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren */ 635e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 647c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 65b6338bdc8305b27688a7feb8689e4ccfd42f0292Jean Pihet .align 3 667c0069264017fdac8ef017b8893f0f0d7a13851aAlistair BuxtonENTRY(omap7xx_cpu_suspend) 671a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 681a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ save registers on stack 691a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren stmfd sp!, {r0 - r12, lr} 701a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 711a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ Drain write cache 721a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mov r4, #0 731a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mcr p15, 0, r0, c7, c10, 4 741a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren nop 751a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 761a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ load base address of Traffic Controller 771a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mov r6, #TCMIF_ASM_BASE & 0xff000000 781a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r6, r6, #TCMIF_ASM_BASE & 0x00ff0000 791a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r6, r6, #TCMIF_ASM_BASE & 0x0000ff00 801a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 811a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ prepare to put SDRAM into self-refresh manually 821a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 831a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r9, r7, #SELF_REFRESH_MODE & 0xff000000 841a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r9, r9, #SELF_REFRESH_MODE & 0x000000ff 851a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren str r9, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 861a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 871a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ prepare to put EMIFS to Sleep 881a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 891a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r9, r8, #IDLE_EMIFS_REQUEST & 0xff 901a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren str r9, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 911a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 921a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ load base address of ARM_IDLECT1 and ARM_IDLECT2 931a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000 941a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000 951a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00 961a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 971a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ turn off clock domains 981a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ do not disable PERCK (0x04) 997c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton mov r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff 1007c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00 1011a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 1021a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1031a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ request ARM idle 1047c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton mov r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff 1057c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00 1061a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 1071a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1081a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ disable instruction cache 1091a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mrc p15, 0, r9, c1, c0, 0 1101a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren bic r2, r9, #0x1000 1111a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mcr p15, 0, r2, c1, c0, 0 1121a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren nop 1131a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1141a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren/* 1151a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren * Let's wait for the next wake up event to wake us up. r0 can't be 1161a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren * used here because r0 holds ARM_IDLECT1 1171a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren */ 1181a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mov r2, #0 1191a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 1201a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren/* 1217c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton * omap7xx_cpu_suspend()'s resume point. 1221a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren * 1231a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren * It will just start executing here, so we'll restore stuff from the 1241a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren * stack. 1251a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren */ 1261a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ re-enable Icache 1271a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren mcr p15, 0, r9, c1, c0, 0 1281a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1291a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ reset the ARM_IDLECT1 and ARM_IDLECT2. 1301a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren strh r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 1311a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren strh r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 1321a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1331a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ Restore EMIFF controls 1341a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren str r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 1351a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren str r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 1361a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1371a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren @ restore regs and return 1381a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren ldmfd sp!, {r0 - r12, pc} 1391a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1407c0069264017fdac8ef017b8893f0f0d7a13851aAlistair BuxtonENTRY(omap7xx_cpu_suspend_sz) 1417c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton .word . - omap7xx_cpu_suspend 1427c0069264017fdac8ef017b8893f0f0d7a13851aAlistair Buxton#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ 1431a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren 1441a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren#ifdef CONFIG_ARCH_OMAP15XX 145b6338bdc8305b27688a7feb8689e4ccfd42f0292Jean Pihet .align 3 1465e1c5ff4783e0ddd241580c9996390508722190eTony LindgrenENTRY(omap1510_cpu_suspend) 1475e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1485e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ save registers on stack 1495e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren stmfd sp!, {r0 - r12, lr} 1505e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1515e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ load base address of Traffic Controller 1525e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r4, #TCMIF_ASM_BASE & 0xff000000 1535e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r4, r4, #TCMIF_ASM_BASE & 0x00ff0000 1545e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r4, r4, #TCMIF_ASM_BASE & 0x0000ff00 1555e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1565e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ work around errata of OMAP1510 PDE bit for TC shut down 1575e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ clear PDE bit 1585e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren ldr r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 1595e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren bic r5, r5, #PDE_BIT & 0xff 1605e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren str r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 1615e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1625e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ set PWD_EN bit 1635e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren and r5, r5, #PWD_EN_BIT & 0xff 1645e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren str r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 1655e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1665e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ prepare to put SDRAM into self-refresh manually 1675e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren ldr r5, [r4, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 1685e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r5, r5, #SELF_REFRESH_MODE & 0xff000000 1695e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r5, r5, #SELF_REFRESH_MODE & 0x000000ff 1705e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren str r5, [r4, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 1715e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1725e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ prepare to put EMIFS to Sleep 1735e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren ldr r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 1745e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r5, r5, #IDLE_EMIFS_REQUEST & 0xff 1755e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren str r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 1765e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1775e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ load base address of ARM_IDLECT1 and ARM_IDLECT2 1785e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000 1795e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000 1805e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00 1815e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1825e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ turn off clock domains 1835e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r5, #OMAP1510_IDLE_CLOCK_DOMAINS & 0xff 18492105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r5, r5, #OMAP1510_IDLE_CLOCK_DOMAINS & 0xff00 1855e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 1865e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1875e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ request ARM idle 1885e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r3, #OMAP1510_DEEP_SLEEP_REQUEST & 0xff 1895e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r3, r3, #OMAP1510_DEEP_SLEEP_REQUEST & 0xff00 1905e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 1915e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 1925e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r5, #IDLE_WAIT_CYCLES & 0xff 19392105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r5, r5, #IDLE_WAIT_CYCLES & 0xff00 1945e1c5ff4783e0ddd241580c9996390508722190eTony Lindgrenl_1510_2: 1955e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren subs r5, r5, #1 1965e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren bne l_1510_2 1975e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren/* 1985e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Let's wait for the next wake up event to wake us up. r0 can't be 1995e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * used here because r0 holds ARM_IDLECT1 2005e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren */ 2015e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r2, #0 2025e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 2035e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren/* 2045e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * omap1510_cpu_suspend()'s resume point. 2055e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 2065e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * It will just start executing here, so we'll restore stuff from the 2075e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * stack, reset the ARM_IDLECT1 and ARM_IDLECT2. 2085e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren */ 2095e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 2105e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 2115e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 2125e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ restore regs and return 21392105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren ldmfd sp!, {r0 - r12, pc} 2145e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 2155e1c5ff4783e0ddd241580c9996390508722190eTony LindgrenENTRY(omap1510_cpu_suspend_sz) 2165e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren .word . - omap1510_cpu_suspend 2171a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8Tony Lindgren#endif /* CONFIG_ARCH_OMAP15XX */ 2185e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 2195e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren#if defined(CONFIG_ARCH_OMAP16XX) 220b6338bdc8305b27688a7feb8689e4ccfd42f0292Jean Pihet .align 3 2215e1c5ff4783e0ddd241580c9996390508722190eTony LindgrenENTRY(omap1610_cpu_suspend) 2225e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 2235e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren @ save registers on stack 2245e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren stmfd sp!, {r0 - r12, lr} 2255e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 22692105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren @ Drain write cache 22792105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren mov r4, #0 22892105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren mcr p15, 0, r0, c7, c10, 4 22992105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren nop 23092105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren 231670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Load base address of Traffic Controller 23292105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren mov r6, #TCMIF_ASM_BASE & 0xff000000 23392105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r6, r6, #TCMIF_ASM_BASE & 0x00ff0000 23492105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r6, r6, #TCMIF_ASM_BASE & 0x0000ff00 2355e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 236670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Prepare to put SDRAM into self-refresh manually 23792105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 23892105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r9, r7, #SELF_REFRESH_MODE & 0xff000000 23992105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r9, r9, #SELF_REFRESH_MODE & 0x000000ff 24092105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren str r9, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 2415e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 242670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Prepare to put EMIFS to Sleep 24392105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 24492105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r9, r8, #IDLE_EMIFS_REQUEST & 0xff 24592105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren str r9, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 2465e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 247670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Load base address of ARM_IDLECT1 and ARM_IDLECT2 2485e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000 2495e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000 2505e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00 2515e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 252670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Turn off clock domains 253670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Do not disable PERCK (0x04) 25492105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren mov r5, #OMAP1610_IDLECT2_SLEEP_VAL & 0xff 25592105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r5, r5, #OMAP1610_IDLECT2_SLEEP_VAL & 0xff00 2565e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 2575e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 258670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Request ARM idle 25992105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren mov r3, #OMAP1610_IDLECT1_SLEEP_VAL & 0xff 26092105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren orr r3, r3, #OMAP1610_IDLECT1_SLEEP_VAL & 0xff00 2615e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 2625e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 2635e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren/* 2645e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * Let's wait for the next wake up event to wake us up. r0 can't be 2655e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * used here because r0 holds ARM_IDLECT1 2665e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren */ 2675e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mov r2, #0 2685e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 269670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren 270670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Errata (HEL3SU467, section 1.4.4) specifies nop-instructions 271670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ according to this formula: 272670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ 2 + (4*DPLL_MULT)/DPLL_DIV/ARMDIV 273670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Max DPLL_MULT = 18 274670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ DPLL_DIV = 1 275670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ ARMDIV = 1 276670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ => 74 nop-instructions 277670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 278670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 279670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 280670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 281670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 282670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 283670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 284670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 285670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 286670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @10 287670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 288670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 289670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 290670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 291670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 292670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 293670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 294670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 295670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 296670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @20 297670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 298670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 299670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 300670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 301670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 302670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 303670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 304670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 305670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 306670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @30 307670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 308670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 309670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 310670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 311670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 312670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 313670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 314670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 315670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 316670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @40 317670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 318670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 319670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 320670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 321670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 322670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 323670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 324670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 325670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 326670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @50 327670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 328670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 329670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 330670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 331670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 332670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 333670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 334670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 335670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 336670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @60 337670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 338670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 339670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 340670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 341670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 342670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 343670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 344670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 345670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 346670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @70 347670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 348670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 349670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop 350670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren nop @74 3515e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren/* 3525e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * omap1610_cpu_suspend()'s resume point. 3535e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * 3545e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren * It will just start executing here, so we'll restore stuff from the 35592105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren * stack. 3565e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren */ 357670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Restore the ARM_IDLECT1 and ARM_IDLECT2. 3585e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 3595e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren strh r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 3605e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 36192105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren @ Restore EMIFF controls 36292105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren str r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] 36392105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren str r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] 36492105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren 365670c104ae8e7bcc28be0289a16dac2ddfb88b285Tony Lindgren @ Restore regs and return 36692105bb70634abacc08bbe12bf6f888fbd7dad38Tony Lindgren ldmfd sp!, {r0 - r12, pc} 3675e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren 3685e1c5ff4783e0ddd241580c9996390508722190eTony LindgrenENTRY(omap1610_cpu_suspend_sz) 3695e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren .word . - omap1610_cpu_suspend 3705e1c5ff4783e0ddd241580c9996390508722190eTony Lindgren#endif /* CONFIG_ARCH_OMAP16XX */ 371