board-3430sdp.c revision 0047c909fbde59b6c90cb925bbfe1098d3796c2e 
1/*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/input.h>
20#include <linux/input/matrix_keypad.h>
21#include <linux/spi/spi.h>
22#include <linux/i2c/twl.h>
23#include <linux/regulator/machine.h>
24#include <linux/io.h>
25#include <linux/gpio.h>
26#include <linux/mmc/host.h>
27#include <linux/platform_data/spi-omap2-mcspi.h>
28#include <linux/platform_data/omap-twl4030.h>
29#include <linux/usb/phy.h>
30
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33#include <asm/mach/map.h>
34
35#include "common.h"
36#include <linux/omap-dma.h>
37#include <video/omapdss.h>
38#include <video/omap-panel-tfp410.h>
39
40#include "gpmc.h"
41#include "gpmc-smc91x.h"
42
43#include "soc.h"
44#include "board-flash.h"
45#include "mux.h"
46#include "sdram-qimonda-hyb18m512160af-6.h"
47#include "hsmmc.h"
48#include "pm.h"
49#include "control.h"
50#include "common-board-devices.h"
51
52#define CONFIG_DISABLE_HFCLK 1
53
54#define SDP3430_TS_GPIO_IRQ_SDPV1	3
55#define SDP3430_TS_GPIO_IRQ_SDPV2	2
56
57#define ENABLE_VAUX3_DEDICATED	0x03
58#define ENABLE_VAUX3_DEV_GRP	0x20
59
60#define TWL4030_MSECURE_GPIO 22
61
62static uint32_t board_keymap[] = {
63	KEY(0, 0, KEY_LEFT),
64	KEY(0, 1, KEY_RIGHT),
65	KEY(0, 2, KEY_A),
66	KEY(0, 3, KEY_B),
67	KEY(0, 4, KEY_C),
68	KEY(1, 0, KEY_DOWN),
69	KEY(1, 1, KEY_UP),
70	KEY(1, 2, KEY_E),
71	KEY(1, 3, KEY_F),
72	KEY(1, 4, KEY_G),
73	KEY(2, 0, KEY_ENTER),
74	KEY(2, 1, KEY_I),
75	KEY(2, 2, KEY_J),
76	KEY(2, 3, KEY_K),
77	KEY(2, 4, KEY_3),
78	KEY(3, 0, KEY_M),
79	KEY(3, 1, KEY_N),
80	KEY(3, 2, KEY_O),
81	KEY(3, 3, KEY_P),
82	KEY(3, 4, KEY_Q),
83	KEY(4, 0, KEY_R),
84	KEY(4, 1, KEY_4),
85	KEY(4, 2, KEY_T),
86	KEY(4, 3, KEY_U),
87	KEY(4, 4, KEY_D),
88	KEY(5, 0, KEY_V),
89	KEY(5, 1, KEY_W),
90	KEY(5, 2, KEY_L),
91	KEY(5, 3, KEY_S),
92	KEY(5, 4, KEY_H),
93	0
94};
95
96static struct matrix_keymap_data board_map_data = {
97	.keymap			= board_keymap,
98	.keymap_size		= ARRAY_SIZE(board_keymap),
99};
100
101static struct twl4030_keypad_data sdp3430_kp_data = {
102	.keymap_data	= &board_map_data,
103	.rows		= 5,
104	.cols		= 6,
105	.rep		= 1,
106};
107
108#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO	8
109#define SDP3430_LCD_PANEL_ENABLE_GPIO		5
110
111static struct gpio sdp3430_dss_gpios[] __initdata = {
112	{SDP3430_LCD_PANEL_ENABLE_GPIO,    GPIOF_OUT_INIT_LOW, "LCD reset"    },
113	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
114};
115
116static void __init sdp3430_display_init(void)
117{
118	int r;
119
120	r = gpio_request_array(sdp3430_dss_gpios,
121			       ARRAY_SIZE(sdp3430_dss_gpios));
122	if (r)
123		printk(KERN_ERR "failed to get LCD control GPIOs\n");
124
125}
126
127static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
128{
129	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
130	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
131
132	return 0;
133}
134
135static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
136{
137	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
138	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
139}
140
141static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
142{
143	return 0;
144}
145
146static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
147{
148}
149
150
151static struct omap_dss_device sdp3430_lcd_device = {
152	.name			= "lcd",
153	.driver_name		= "sharp_ls_panel",
154	.type			= OMAP_DISPLAY_TYPE_DPI,
155	.phy.dpi.data_lines	= 16,
156	.platform_enable	= sdp3430_panel_enable_lcd,
157	.platform_disable	= sdp3430_panel_disable_lcd,
158};
159
160static struct tfp410_platform_data dvi_panel = {
161	.power_down_gpio	= -1,
162	.i2c_bus_num		= -1,
163};
164
165static struct omap_dss_device sdp3430_dvi_device = {
166	.name			= "dvi",
167	.type			= OMAP_DISPLAY_TYPE_DPI,
168	.driver_name		= "tfp410",
169	.data			= &dvi_panel,
170	.phy.dpi.data_lines	= 24,
171};
172
173static struct omap_dss_device sdp3430_tv_device = {
174	.name			= "tv",
175	.driver_name		= "venc",
176	.type			= OMAP_DISPLAY_TYPE_VENC,
177	.phy.venc.type		= OMAP_DSS_VENC_TYPE_SVIDEO,
178	.platform_enable	= sdp3430_panel_enable_tv,
179	.platform_disable	= sdp3430_panel_disable_tv,
180};
181
182
183static struct omap_dss_device *sdp3430_dss_devices[] = {
184	&sdp3430_lcd_device,
185	&sdp3430_dvi_device,
186	&sdp3430_tv_device,
187};
188
189static struct omap_dss_board_info sdp3430_dss_data = {
190	.num_devices	= ARRAY_SIZE(sdp3430_dss_devices),
191	.devices	= sdp3430_dss_devices,
192	.default_device	= &sdp3430_lcd_device,
193};
194
195static struct omap2_hsmmc_info mmc[] = {
196	{
197		.mmc		= 1,
198		/* 8 bits (default) requires S6.3 == ON,
199		 * so the SIM card isn't used; else 4 bits.
200		 */
201		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
202		.gpio_wp	= 4,
203		.deferred	= true,
204	},
205	{
206		.mmc		= 2,
207		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
208		.gpio_wp	= 7,
209		.deferred	= true,
210	},
211	{}	/* Terminator */
212};
213
214static struct omap_tw4030_pdata omap_twl4030_audio_data = {
215	.voice_connected = true,
216	.custom_routing	= true,
217
218	.has_hs		= OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
219	.has_hf		= OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
220
221	.has_mainmic	= true,
222	.has_submic	= true,
223	.has_hsmic	= true,
224	.has_linein	= OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
225};
226
227static int sdp3430_twl_gpio_setup(struct device *dev,
228		unsigned gpio, unsigned ngpio)
229{
230	/* gpio + 0 is "mmc0_cd" (input/IRQ),
231	 * gpio + 1 is "mmc1_cd" (input/IRQ)
232	 */
233	mmc[0].gpio_cd = gpio + 0;
234	mmc[1].gpio_cd = gpio + 1;
235	omap_hsmmc_late_init(mmc);
236
237	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
238	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
239
240	/* gpio + 15 is "sub_lcd_nRST" (output) */
241	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
242
243	omap_twl4030_audio_data.jack_detect = gpio + 2;
244	omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
245
246	return 0;
247}
248
249static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
250	.pulldowns	= BIT(2) | BIT(6) | BIT(8) | BIT(13)
251				| BIT(16) | BIT(17),
252	.setup		= sdp3430_twl_gpio_setup,
253};
254
255/* regulator consumer mappings */
256
257/* ads7846 on SPI */
258static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
259	REGULATOR_SUPPLY("vcc", "spi1.0"),
260};
261
262static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
263	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
264};
265
266static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
267	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
268};
269
270static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
271	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
272};
273
274/*
275 * Apply all the fixed voltages since most versions of U-Boot
276 * don't bother with that initialization.
277 */
278
279/* VAUX1 for mainboard (irda and sub-lcd) */
280static struct regulator_init_data sdp3430_vaux1 = {
281	.constraints = {
282		.min_uV			= 2800000,
283		.max_uV			= 2800000,
284		.apply_uV		= true,
285		.valid_modes_mask	= REGULATOR_MODE_NORMAL
286					| REGULATOR_MODE_STANDBY,
287		.valid_ops_mask		= REGULATOR_CHANGE_MODE
288					| REGULATOR_CHANGE_STATUS,
289	},
290};
291
292/* VAUX2 for camera module */
293static struct regulator_init_data sdp3430_vaux2 = {
294	.constraints = {
295		.min_uV			= 2800000,
296		.max_uV			= 2800000,
297		.apply_uV		= true,
298		.valid_modes_mask	= REGULATOR_MODE_NORMAL
299					| REGULATOR_MODE_STANDBY,
300		.valid_ops_mask		= REGULATOR_CHANGE_MODE
301					| REGULATOR_CHANGE_STATUS,
302	},
303};
304
305/* VAUX3 for LCD board */
306static struct regulator_init_data sdp3430_vaux3 = {
307	.constraints = {
308		.min_uV			= 2800000,
309		.max_uV			= 2800000,
310		.apply_uV		= true,
311		.valid_modes_mask	= REGULATOR_MODE_NORMAL
312					| REGULATOR_MODE_STANDBY,
313		.valid_ops_mask		= REGULATOR_CHANGE_MODE
314					| REGULATOR_CHANGE_STATUS,
315	},
316	.num_consumer_supplies		= ARRAY_SIZE(sdp3430_vaux3_supplies),
317	.consumer_supplies		= sdp3430_vaux3_supplies,
318};
319
320/* VAUX4 for OMAP VDD_CSI2 (camera) */
321static struct regulator_init_data sdp3430_vaux4 = {
322	.constraints = {
323		.min_uV			= 1800000,
324		.max_uV			= 1800000,
325		.apply_uV		= true,
326		.valid_modes_mask	= REGULATOR_MODE_NORMAL
327					| REGULATOR_MODE_STANDBY,
328		.valid_ops_mask		= REGULATOR_CHANGE_MODE
329					| REGULATOR_CHANGE_STATUS,
330	},
331};
332
333/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
334static struct regulator_init_data sdp3430_vmmc1 = {
335	.constraints = {
336		.min_uV			= 1850000,
337		.max_uV			= 3150000,
338		.valid_modes_mask	= REGULATOR_MODE_NORMAL
339					| REGULATOR_MODE_STANDBY,
340		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
341					| REGULATOR_CHANGE_MODE
342					| REGULATOR_CHANGE_STATUS,
343	},
344	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc1_supplies),
345	.consumer_supplies	= sdp3430_vmmc1_supplies,
346};
347
348/* VMMC2 for MMC2 card */
349static struct regulator_init_data sdp3430_vmmc2 = {
350	.constraints = {
351		.min_uV			= 1850000,
352		.max_uV			= 1850000,
353		.apply_uV		= true,
354		.valid_modes_mask	= REGULATOR_MODE_NORMAL
355					| REGULATOR_MODE_STANDBY,
356		.valid_ops_mask		= REGULATOR_CHANGE_MODE
357					| REGULATOR_CHANGE_STATUS,
358	},
359	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc2_supplies),
360	.consumer_supplies	= sdp3430_vmmc2_supplies,
361};
362
363/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
364static struct regulator_init_data sdp3430_vsim = {
365	.constraints = {
366		.min_uV			= 1800000,
367		.max_uV			= 3000000,
368		.valid_modes_mask	= REGULATOR_MODE_NORMAL
369					| REGULATOR_MODE_STANDBY,
370		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
371					| REGULATOR_CHANGE_MODE
372					| REGULATOR_CHANGE_STATUS,
373	},
374	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vsim_supplies),
375	.consumer_supplies	= sdp3430_vsim_supplies,
376};
377
378static struct twl4030_platform_data sdp3430_twldata = {
379	/* platform_data for children goes here */
380	.gpio		= &sdp3430_gpio_data,
381	.keypad		= &sdp3430_kp_data,
382
383	.vaux1		= &sdp3430_vaux1,
384	.vaux2		= &sdp3430_vaux2,
385	.vaux3		= &sdp3430_vaux3,
386	.vaux4		= &sdp3430_vaux4,
387	.vmmc1		= &sdp3430_vmmc1,
388	.vmmc2		= &sdp3430_vmmc2,
389	.vsim		= &sdp3430_vsim,
390};
391
392static int __init omap3430_i2c_init(void)
393{
394	/* i2c1 for PMIC only */
395	omap3_pmic_get_config(&sdp3430_twldata,
396			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
397			TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
398			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
399	sdp3430_twldata.vdac->constraints.apply_uV = true;
400	sdp3430_twldata.vpll2->constraints.apply_uV = true;
401	sdp3430_twldata.vpll2->constraints.name = "VDVI";
402
403	sdp3430_twldata.audio->codec->hs_extmute = 1;
404	sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
405
406	omap3_pmic_init("twl4030", &sdp3430_twldata);
407
408	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
409	omap_register_i2c_bus(2, 400, NULL, 0);
410	/* i2c3 on display connector (for DVI, tfp410) */
411	omap_register_i2c_bus(3, 400, NULL, 0);
412	return 0;
413}
414
415#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
416
417static struct omap_smc91x_platform_data board_smc91x_data = {
418	.cs		= 3,
419	.flags		= GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
420				IORESOURCE_IRQ_LOWLEVEL,
421};
422
423static void __init board_smc91x_init(void)
424{
425	if (omap_rev() > OMAP3430_REV_ES1_0)
426		board_smc91x_data.gpio_irq = 6;
427	else
428		board_smc91x_data.gpio_irq = 29;
429
430	gpmc_smc91x_init(&board_smc91x_data);
431}
432
433#else
434
435static inline void board_smc91x_init(void)
436{
437}
438
439#endif
440
441static void enable_board_wakeup_source(void)
442{
443	/* T2 interrupt line (keypad) */
444	omap_mux_init_signal("sys_nirq",
445		OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
446}
447
448static struct usbhs_phy_data phy_data[] __initdata = {
449	{
450		.port = 1,
451		.reset_gpio = 57,
452		.vcc_gpio = -EINVAL,
453	},
454	{
455		.port = 2,
456		.reset_gpio = 61,
457		.vcc_gpio = -EINVAL,
458	},
459};
460
461static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
462
463	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
464	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
465};
466
467#ifdef CONFIG_OMAP_MUX
468static struct omap_board_mux board_mux[] __initdata = {
469	{ .reg_offset = OMAP_MUX_TERMINATOR },
470};
471#else
472#define board_mux	NULL
473#endif
474
475/*
476 * SDP3430 V2 Board CS organization
477 * Different from SDP3430 V1. Now 4 switches used to specify CS
478 *
479 * See also the Switch S8 settings in the comments.
480 */
481static char chip_sel_3430[][GPMC_CS_NUM] = {
482	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
483	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
484	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
485};
486
487static struct mtd_partition sdp_nor_partitions[] = {
488	/* bootloader (U-Boot, etc) in first sector */
489	{
490		.name		= "Bootloader-NOR",
491		.offset		= 0,
492		.size		= SZ_256K,
493		.mask_flags	= MTD_WRITEABLE, /* force read-only */
494	},
495	/* bootloader params in the next sector */
496	{
497		.name		= "Params-NOR",
498		.offset		= MTDPART_OFS_APPEND,
499		.size		= SZ_256K,
500		.mask_flags	= 0,
501	},
502	/* kernel */
503	{
504		.name		= "Kernel-NOR",
505		.offset		= MTDPART_OFS_APPEND,
506		.size		= SZ_2M,
507		.mask_flags	= 0
508	},
509	/* file system */
510	{
511		.name		= "Filesystem-NOR",
512		.offset		= MTDPART_OFS_APPEND,
513		.size		= MTDPART_SIZ_FULL,
514		.mask_flags	= 0
515	}
516};
517
518static struct mtd_partition sdp_onenand_partitions[] = {
519	{
520		.name		= "X-Loader-OneNAND",
521		.offset		= 0,
522		.size		= 4 * (64 * 2048),
523		.mask_flags	= MTD_WRITEABLE  /* force read-only */
524	},
525	{
526		.name		= "U-Boot-OneNAND",
527		.offset		= MTDPART_OFS_APPEND,
528		.size		= 2 * (64 * 2048),
529		.mask_flags	= MTD_WRITEABLE  /* force read-only */
530	},
531	{
532		.name		= "U-Boot Environment-OneNAND",
533		.offset		= MTDPART_OFS_APPEND,
534		.size		= 1 * (64 * 2048),
535	},
536	{
537		.name		= "Kernel-OneNAND",
538		.offset		= MTDPART_OFS_APPEND,
539		.size		= 16 * (64 * 2048),
540	},
541	{
542		.name		= "File System-OneNAND",
543		.offset		= MTDPART_OFS_APPEND,
544		.size		= MTDPART_SIZ_FULL,
545	},
546};
547
548static struct mtd_partition sdp_nand_partitions[] = {
549	/* All the partition sizes are listed in terms of NAND block size */
550	{
551		.name		= "X-Loader-NAND",
552		.offset		= 0,
553		.size		= 4 * (64 * 2048),
554		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
555	},
556	{
557		.name		= "U-Boot-NAND",
558		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
559		.size		= 10 * (64 * 2048),
560		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
561	},
562	{
563		.name		= "Boot Env-NAND",
564
565		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1c0000 */
566		.size		= 6 * (64 * 2048),
567	},
568	{
569		.name		= "Kernel-NAND",
570		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
571		.size		= 40 * (64 * 2048),
572	},
573	{
574		.name		= "File System - NAND",
575		.size		= MTDPART_SIZ_FULL,
576		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x780000 */
577	},
578};
579
580static struct flash_partitions sdp_flash_partitions[] = {
581	{
582		.parts = sdp_nor_partitions,
583		.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
584	},
585	{
586		.parts = sdp_onenand_partitions,
587		.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
588	},
589	{
590		.parts = sdp_nand_partitions,
591		.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
592	},
593};
594
595static void __init omap_3430sdp_init(void)
596{
597	int gpio_pendown;
598
599	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
600	omap_hsmmc_init(mmc);
601	omap3430_i2c_init();
602	omap_display_init(&sdp3430_dss_data);
603	if (omap_rev() > OMAP3430_REV_ES1_0)
604		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
605	else
606		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
607	omap_ads7846_init(1, gpio_pendown, 310, NULL);
608	omap_serial_init();
609	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
610	usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
611	usb_musb_init(NULL);
612	board_smc91x_init();
613	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
614	sdp3430_display_init();
615	enable_board_wakeup_source();
616
617	usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
618	usbhs_init(&usbhs_bdata);
619}
620
621MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
622	/* Maintainer: Syed Khasim - Texas Instruments Inc */
623	.atag_offset	= 0x100,
624	.reserve	= omap_reserve,
625	.map_io		= omap3_map_io,
626	.init_early	= omap3430_init_early,
627	.init_irq	= omap3_init_irq,
628	.handle_irq	= omap3_intc_handle_irq,
629	.init_machine	= omap_3430sdp_init,
630	.init_late	= omap3430_init_late,
631	.init_time	= omap3_sync32k_timer_init,
632	.restart	= omap3xxx_restart,
633MACHINE_END
634