board-3430sdp.c revision 6a58baf8f222f60cded29770ff9a0f6f6c100b64
1/* 2 * linux/arch/arm/mach-omap2/board-3430sdp.c 3 * 4 * Copyright (C) 2007 Texas Instruments 5 * 6 * Modified from mach-omap2/board-generic.c 7 * 8 * Initial code: Syed Mohammed Khasim 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/init.h> 17#include <linux/platform_device.h> 18#include <linux/delay.h> 19#include <linux/input.h> 20#include <linux/input/matrix_keypad.h> 21#include <linux/spi/spi.h> 22#include <linux/spi/ads7846.h> 23#include <linux/i2c/twl.h> 24#include <linux/regulator/machine.h> 25#include <linux/io.h> 26#include <linux/gpio.h> 27#include <linux/mmc/host.h> 28 29#include <mach/hardware.h> 30#include <asm/mach-types.h> 31#include <asm/mach/arch.h> 32#include <asm/mach/map.h> 33 34#include <plat/mcspi.h> 35#include <plat/board.h> 36#include <plat/usb.h> 37#include <plat/common.h> 38#include <plat/dma.h> 39#include <plat/gpmc.h> 40#include <plat/display.h> 41#include <plat/panel-generic-dpi.h> 42 43#include <plat/gpmc-smc91x.h> 44 45#include "board-flash.h" 46#include "mux.h" 47#include "sdram-qimonda-hyb18m512160af-6.h" 48#include "hsmmc.h" 49#include "pm.h" 50#include "control.h" 51 52#define CONFIG_DISABLE_HFCLK 1 53 54#define SDP3430_TS_GPIO_IRQ_SDPV1 3 55#define SDP3430_TS_GPIO_IRQ_SDPV2 2 56 57#define ENABLE_VAUX3_DEDICATED 0x03 58#define ENABLE_VAUX3_DEV_GRP 0x20 59 60#define TWL4030_MSECURE_GPIO 22 61 62/* FIXME: These values need to be updated based on more profiling on 3430sdp*/ 63static struct cpuidle_params omap3_cpuidle_params_table[] = { 64 /* C1 */ 65 {1, 2, 2, 5}, 66 /* C2 */ 67 {1, 10, 10, 30}, 68 /* C3 */ 69 {1, 50, 50, 300}, 70 /* C4 */ 71 {1, 1500, 1800, 4000}, 72 /* C5 */ 73 {1, 2500, 7500, 12000}, 74 /* C6 */ 75 {1, 3000, 8500, 15000}, 76 /* C7 */ 77 {1, 10000, 30000, 300000}, 78}; 79 80static uint32_t board_keymap[] = { 81 KEY(0, 0, KEY_LEFT), 82 KEY(0, 1, KEY_RIGHT), 83 KEY(0, 2, KEY_A), 84 KEY(0, 3, KEY_B), 85 KEY(0, 4, KEY_C), 86 KEY(1, 0, KEY_DOWN), 87 KEY(1, 1, KEY_UP), 88 KEY(1, 2, KEY_E), 89 KEY(1, 3, KEY_F), 90 KEY(1, 4, KEY_G), 91 KEY(2, 0, KEY_ENTER), 92 KEY(2, 1, KEY_I), 93 KEY(2, 2, KEY_J), 94 KEY(2, 3, KEY_K), 95 KEY(2, 4, KEY_3), 96 KEY(3, 0, KEY_M), 97 KEY(3, 1, KEY_N), 98 KEY(3, 2, KEY_O), 99 KEY(3, 3, KEY_P), 100 KEY(3, 4, KEY_Q), 101 KEY(4, 0, KEY_R), 102 KEY(4, 1, KEY_4), 103 KEY(4, 2, KEY_T), 104 KEY(4, 3, KEY_U), 105 KEY(4, 4, KEY_D), 106 KEY(5, 0, KEY_V), 107 KEY(5, 1, KEY_W), 108 KEY(5, 2, KEY_L), 109 KEY(5, 3, KEY_S), 110 KEY(5, 4, KEY_H), 111 0 112}; 113 114static struct matrix_keymap_data board_map_data = { 115 .keymap = board_keymap, 116 .keymap_size = ARRAY_SIZE(board_keymap), 117}; 118 119static struct twl4030_keypad_data sdp3430_kp_data = { 120 .keymap_data = &board_map_data, 121 .rows = 5, 122 .cols = 6, 123 .rep = 1, 124}; 125 126static int ts_gpio; /* Needed for ads7846_get_pendown_state */ 127 128/** 129 * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq 130 * 131 * @return - void. If request gpio fails then Flag KERN_ERR. 132 */ 133static void ads7846_dev_init(void) 134{ 135 if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) { 136 printk(KERN_ERR "can't get ads746 pen down GPIO\n"); 137 return; 138 } 139 140 gpio_direction_input(ts_gpio); 141 gpio_set_debounce(ts_gpio, 310); 142} 143 144static int ads7846_get_pendown_state(void) 145{ 146 return !gpio_get_value(ts_gpio); 147} 148 149static struct ads7846_platform_data tsc2046_config __initdata = { 150 .get_pendown_state = ads7846_get_pendown_state, 151 .keep_vref_on = 1, 152 .wakeup = true, 153}; 154 155 156static struct omap2_mcspi_device_config tsc2046_mcspi_config = { 157 .turbo_mode = 0, 158 .single_channel = 1, /* 0: slave, 1: master */ 159}; 160 161static struct spi_board_info sdp3430_spi_board_info[] __initdata = { 162 [0] = { 163 /* 164 * TSC2046 operates at a max freqency of 2MHz, so 165 * operate slightly below at 1.5MHz 166 */ 167 .modalias = "ads7846", 168 .bus_num = 1, 169 .chip_select = 0, 170 .max_speed_hz = 1500000, 171 .controller_data = &tsc2046_mcspi_config, 172 .irq = 0, 173 .platform_data = &tsc2046_config, 174 }, 175}; 176 177 178#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 179#define SDP3430_LCD_PANEL_ENABLE_GPIO 5 180 181static unsigned backlight_gpio; 182static unsigned enable_gpio; 183static int lcd_enabled; 184static int dvi_enabled; 185 186static void __init sdp3430_display_init(void) 187{ 188 int r; 189 190 enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO; 191 backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO; 192 193 r = gpio_request(enable_gpio, "LCD reset"); 194 if (r) { 195 printk(KERN_ERR "failed to get LCD reset GPIO\n"); 196 goto err0; 197 } 198 199 r = gpio_request(backlight_gpio, "LCD Backlight"); 200 if (r) { 201 printk(KERN_ERR "failed to get LCD backlight GPIO\n"); 202 goto err1; 203 } 204 205 gpio_direction_output(enable_gpio, 0); 206 gpio_direction_output(backlight_gpio, 0); 207 208 return; 209err1: 210 gpio_free(enable_gpio); 211err0: 212 return; 213} 214 215static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) 216{ 217 if (dvi_enabled) { 218 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); 219 return -EINVAL; 220 } 221 222 gpio_direction_output(enable_gpio, 1); 223 gpio_direction_output(backlight_gpio, 1); 224 225 lcd_enabled = 1; 226 227 return 0; 228} 229 230static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) 231{ 232 lcd_enabled = 0; 233 234 gpio_direction_output(enable_gpio, 0); 235 gpio_direction_output(backlight_gpio, 0); 236} 237 238static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev) 239{ 240 if (lcd_enabled) { 241 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); 242 return -EINVAL; 243 } 244 245 dvi_enabled = 1; 246 247 return 0; 248} 249 250static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev) 251{ 252 dvi_enabled = 0; 253} 254 255static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev) 256{ 257 return 0; 258} 259 260static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev) 261{ 262} 263 264 265static struct omap_dss_device sdp3430_lcd_device = { 266 .name = "lcd", 267 .driver_name = "sharp_ls_panel", 268 .type = OMAP_DISPLAY_TYPE_DPI, 269 .phy.dpi.data_lines = 16, 270 .platform_enable = sdp3430_panel_enable_lcd, 271 .platform_disable = sdp3430_panel_disable_lcd, 272}; 273 274static struct panel_generic_dpi_data dvi_panel = { 275 .name = "generic", 276 .platform_enable = sdp3430_panel_enable_dvi, 277 .platform_disable = sdp3430_panel_disable_dvi, 278}; 279 280static struct omap_dss_device sdp3430_dvi_device = { 281 .name = "dvi", 282 .type = OMAP_DISPLAY_TYPE_DPI, 283 .driver_name = "generic_dpi_panel", 284 .data = &dvi_panel, 285 .phy.dpi.data_lines = 24, 286}; 287 288static struct omap_dss_device sdp3430_tv_device = { 289 .name = "tv", 290 .driver_name = "venc", 291 .type = OMAP_DISPLAY_TYPE_VENC, 292 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 293 .platform_enable = sdp3430_panel_enable_tv, 294 .platform_disable = sdp3430_panel_disable_tv, 295}; 296 297 298static struct omap_dss_device *sdp3430_dss_devices[] = { 299 &sdp3430_lcd_device, 300 &sdp3430_dvi_device, 301 &sdp3430_tv_device, 302}; 303 304static struct omap_dss_board_info sdp3430_dss_data = { 305 .num_devices = ARRAY_SIZE(sdp3430_dss_devices), 306 .devices = sdp3430_dss_devices, 307 .default_device = &sdp3430_lcd_device, 308}; 309 310static struct regulator_consumer_supply sdp3430_vdda_dac_supply = 311 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 312 313static struct omap_board_config_kernel sdp3430_config[] __initdata = { 314}; 315 316static void __init omap_3430sdp_init_early(void) 317{ 318 omap2_init_common_infrastructure(); 319 omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL); 320} 321 322static int sdp3430_batt_table[] = { 323/* 0 C*/ 32430800, 29500, 28300, 27100, 32526000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, 32617200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, 32711600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, 3288020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, 3295640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, 3304040, 3910, 3790, 3670, 3550 331}; 332 333static struct twl4030_bci_platform_data sdp3430_bci_data = { 334 .battery_tmp_tbl = sdp3430_batt_table, 335 .tblsize = ARRAY_SIZE(sdp3430_batt_table), 336}; 337 338static struct omap2_hsmmc_info mmc[] = { 339 { 340 .mmc = 1, 341 /* 8 bits (default) requires S6.3 == ON, 342 * so the SIM card isn't used; else 4 bits. 343 */ 344 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 345 .gpio_wp = 4, 346 }, 347 { 348 .mmc = 2, 349 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 350 .gpio_wp = 7, 351 }, 352 {} /* Terminator */ 353}; 354 355static int sdp3430_twl_gpio_setup(struct device *dev, 356 unsigned gpio, unsigned ngpio) 357{ 358 /* gpio + 0 is "mmc0_cd" (input/IRQ), 359 * gpio + 1 is "mmc1_cd" (input/IRQ) 360 */ 361 mmc[0].gpio_cd = gpio + 0; 362 mmc[1].gpio_cd = gpio + 1; 363 omap2_hsmmc_init(mmc); 364 365 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ 366 gpio_request(gpio + 7, "sub_lcd_en_bkl"); 367 gpio_direction_output(gpio + 7, 0); 368 369 /* gpio + 15 is "sub_lcd_nRST" (output) */ 370 gpio_request(gpio + 15, "sub_lcd_nRST"); 371 gpio_direction_output(gpio + 15, 0); 372 373 return 0; 374} 375 376static struct twl4030_gpio_platform_data sdp3430_gpio_data = { 377 .gpio_base = OMAP_MAX_GPIO_LINES, 378 .irq_base = TWL4030_GPIO_IRQ_BASE, 379 .irq_end = TWL4030_GPIO_IRQ_END, 380 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13) 381 | BIT(16) | BIT(17), 382 .setup = sdp3430_twl_gpio_setup, 383}; 384 385static struct twl4030_usb_data sdp3430_usb_data = { 386 .usb_mode = T2_USB_MODE_ULPI, 387}; 388 389static struct twl4030_madc_platform_data sdp3430_madc_data = { 390 .irq_line = 1, 391}; 392 393/* regulator consumer mappings */ 394 395/* ads7846 on SPI */ 396static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { 397 REGULATOR_SUPPLY("vcc", "spi1.0"), 398}; 399 400static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { 401 REGULATOR_SUPPLY("vdda_dac", "omapdss"), 402}; 403 404/* VPLL2 for digital video outputs */ 405static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { 406 REGULATOR_SUPPLY("vdds_dsi", "omapdss"), 407}; 408 409static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { 410 REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0"), 411}; 412 413static struct regulator_consumer_supply sdp3430_vsim_supplies[] = { 414 REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.0"), 415}; 416 417static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = { 418 REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"), 419}; 420 421/* 422 * Apply all the fixed voltages since most versions of U-Boot 423 * don't bother with that initialization. 424 */ 425 426/* VAUX1 for mainboard (irda and sub-lcd) */ 427static struct regulator_init_data sdp3430_vaux1 = { 428 .constraints = { 429 .min_uV = 2800000, 430 .max_uV = 2800000, 431 .apply_uV = true, 432 .valid_modes_mask = REGULATOR_MODE_NORMAL 433 | REGULATOR_MODE_STANDBY, 434 .valid_ops_mask = REGULATOR_CHANGE_MODE 435 | REGULATOR_CHANGE_STATUS, 436 }, 437}; 438 439/* VAUX2 for camera module */ 440static struct regulator_init_data sdp3430_vaux2 = { 441 .constraints = { 442 .min_uV = 2800000, 443 .max_uV = 2800000, 444 .apply_uV = true, 445 .valid_modes_mask = REGULATOR_MODE_NORMAL 446 | REGULATOR_MODE_STANDBY, 447 .valid_ops_mask = REGULATOR_CHANGE_MODE 448 | REGULATOR_CHANGE_STATUS, 449 }, 450}; 451 452/* VAUX3 for LCD board */ 453static struct regulator_init_data sdp3430_vaux3 = { 454 .constraints = { 455 .min_uV = 2800000, 456 .max_uV = 2800000, 457 .apply_uV = true, 458 .valid_modes_mask = REGULATOR_MODE_NORMAL 459 | REGULATOR_MODE_STANDBY, 460 .valid_ops_mask = REGULATOR_CHANGE_MODE 461 | REGULATOR_CHANGE_STATUS, 462 }, 463 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies), 464 .consumer_supplies = sdp3430_vaux3_supplies, 465}; 466 467/* VAUX4 for OMAP VDD_CSI2 (camera) */ 468static struct regulator_init_data sdp3430_vaux4 = { 469 .constraints = { 470 .min_uV = 1800000, 471 .max_uV = 1800000, 472 .apply_uV = true, 473 .valid_modes_mask = REGULATOR_MODE_NORMAL 474 | REGULATOR_MODE_STANDBY, 475 .valid_ops_mask = REGULATOR_CHANGE_MODE 476 | REGULATOR_CHANGE_STATUS, 477 }, 478}; 479 480/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ 481static struct regulator_init_data sdp3430_vmmc1 = { 482 .constraints = { 483 .min_uV = 1850000, 484 .max_uV = 3150000, 485 .valid_modes_mask = REGULATOR_MODE_NORMAL 486 | REGULATOR_MODE_STANDBY, 487 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 488 | REGULATOR_CHANGE_MODE 489 | REGULATOR_CHANGE_STATUS, 490 }, 491 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies), 492 .consumer_supplies = sdp3430_vmmc1_supplies, 493}; 494 495/* VMMC2 for MMC2 card */ 496static struct regulator_init_data sdp3430_vmmc2 = { 497 .constraints = { 498 .min_uV = 1850000, 499 .max_uV = 1850000, 500 .apply_uV = true, 501 .valid_modes_mask = REGULATOR_MODE_NORMAL 502 | REGULATOR_MODE_STANDBY, 503 .valid_ops_mask = REGULATOR_CHANGE_MODE 504 | REGULATOR_CHANGE_STATUS, 505 }, 506 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies), 507 .consumer_supplies = sdp3430_vmmc2_supplies, 508}; 509 510/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ 511static struct regulator_init_data sdp3430_vsim = { 512 .constraints = { 513 .min_uV = 1800000, 514 .max_uV = 3000000, 515 .valid_modes_mask = REGULATOR_MODE_NORMAL 516 | REGULATOR_MODE_STANDBY, 517 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 518 | REGULATOR_CHANGE_MODE 519 | REGULATOR_CHANGE_STATUS, 520 }, 521 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies), 522 .consumer_supplies = sdp3430_vsim_supplies, 523}; 524 525/* VDAC for DSS driving S-Video */ 526static struct regulator_init_data sdp3430_vdac = { 527 .constraints = { 528 .min_uV = 1800000, 529 .max_uV = 1800000, 530 .apply_uV = true, 531 .valid_modes_mask = REGULATOR_MODE_NORMAL 532 | REGULATOR_MODE_STANDBY, 533 .valid_ops_mask = REGULATOR_CHANGE_MODE 534 | REGULATOR_CHANGE_STATUS, 535 }, 536 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies), 537 .consumer_supplies = sdp3430_vdda_dac_supplies, 538}; 539 540static struct regulator_init_data sdp3430_vpll2 = { 541 .constraints = { 542 .name = "VDVI", 543 .min_uV = 1800000, 544 .max_uV = 1800000, 545 .apply_uV = true, 546 .valid_modes_mask = REGULATOR_MODE_NORMAL 547 | REGULATOR_MODE_STANDBY, 548 .valid_ops_mask = REGULATOR_CHANGE_MODE 549 | REGULATOR_CHANGE_STATUS, 550 }, 551 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies), 552 .consumer_supplies = sdp3430_vpll2_supplies, 553}; 554 555static struct twl4030_codec_audio_data sdp3430_audio; 556 557static struct twl4030_codec_data sdp3430_codec = { 558 .audio_mclk = 26000000, 559 .audio = &sdp3430_audio, 560}; 561 562static struct twl4030_platform_data sdp3430_twldata = { 563 .irq_base = TWL4030_IRQ_BASE, 564 .irq_end = TWL4030_IRQ_END, 565 566 /* platform_data for children goes here */ 567 .bci = &sdp3430_bci_data, 568 .gpio = &sdp3430_gpio_data, 569 .madc = &sdp3430_madc_data, 570 .keypad = &sdp3430_kp_data, 571 .usb = &sdp3430_usb_data, 572 .codec = &sdp3430_codec, 573 574 .vaux1 = &sdp3430_vaux1, 575 .vaux2 = &sdp3430_vaux2, 576 .vaux3 = &sdp3430_vaux3, 577 .vaux4 = &sdp3430_vaux4, 578 .vmmc1 = &sdp3430_vmmc1, 579 .vmmc2 = &sdp3430_vmmc2, 580 .vsim = &sdp3430_vsim, 581 .vdac = &sdp3430_vdac, 582 .vpll2 = &sdp3430_vpll2, 583}; 584 585static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = { 586 { 587 I2C_BOARD_INFO("twl4030", 0x48), 588 .flags = I2C_CLIENT_WAKE, 589 .irq = INT_34XX_SYS_NIRQ, 590 .platform_data = &sdp3430_twldata, 591 }, 592}; 593 594static int __init omap3430_i2c_init(void) 595{ 596 /* i2c1 for PMIC only */ 597 omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo, 598 ARRAY_SIZE(sdp3430_i2c_boardinfo)); 599 /* i2c2 on camera connector (for sensor control) and optional isp1301 */ 600 omap_register_i2c_bus(2, 400, NULL, 0); 601 /* i2c3 on display connector (for DVI, tfp410) */ 602 omap_register_i2c_bus(3, 400, NULL, 0); 603 return 0; 604} 605 606#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 607 608static struct omap_smc91x_platform_data board_smc91x_data = { 609 .cs = 3, 610 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 | 611 IORESOURCE_IRQ_LOWLEVEL, 612}; 613 614static void __init board_smc91x_init(void) 615{ 616 if (omap_rev() > OMAP3430_REV_ES1_0) 617 board_smc91x_data.gpio_irq = 6; 618 else 619 board_smc91x_data.gpio_irq = 29; 620 621 gpmc_smc91x_init(&board_smc91x_data); 622} 623 624#else 625 626static inline void board_smc91x_init(void) 627{ 628} 629 630#endif 631 632static void enable_board_wakeup_source(void) 633{ 634 /* T2 interrupt line (keypad) */ 635 omap_mux_init_signal("sys_nirq", 636 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); 637} 638 639static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 640 641 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 642 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 643 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 644 645 .phy_reset = true, 646 .reset_gpio_port[0] = 57, 647 .reset_gpio_port[1] = 61, 648 .reset_gpio_port[2] = -EINVAL 649}; 650 651#ifdef CONFIG_OMAP_MUX 652static struct omap_board_mux board_mux[] __initdata = { 653 { .reg_offset = OMAP_MUX_TERMINATOR }, 654}; 655#endif 656 657/* 658 * SDP3430 V2 Board CS organization 659 * Different from SDP3430 V1. Now 4 switches used to specify CS 660 * 661 * See also the Switch S8 settings in the comments. 662 */ 663static char chip_sel_3430[][GPMC_CS_NUM] = { 664 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ 665 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ 666 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ 667}; 668 669static struct mtd_partition sdp_nor_partitions[] = { 670 /* bootloader (U-Boot, etc) in first sector */ 671 { 672 .name = "Bootloader-NOR", 673 .offset = 0, 674 .size = SZ_256K, 675 .mask_flags = MTD_WRITEABLE, /* force read-only */ 676 }, 677 /* bootloader params in the next sector */ 678 { 679 .name = "Params-NOR", 680 .offset = MTDPART_OFS_APPEND, 681 .size = SZ_256K, 682 .mask_flags = 0, 683 }, 684 /* kernel */ 685 { 686 .name = "Kernel-NOR", 687 .offset = MTDPART_OFS_APPEND, 688 .size = SZ_2M, 689 .mask_flags = 0 690 }, 691 /* file system */ 692 { 693 .name = "Filesystem-NOR", 694 .offset = MTDPART_OFS_APPEND, 695 .size = MTDPART_SIZ_FULL, 696 .mask_flags = 0 697 } 698}; 699 700static struct mtd_partition sdp_onenand_partitions[] = { 701 { 702 .name = "X-Loader-OneNAND", 703 .offset = 0, 704 .size = 4 * (64 * 2048), 705 .mask_flags = MTD_WRITEABLE /* force read-only */ 706 }, 707 { 708 .name = "U-Boot-OneNAND", 709 .offset = MTDPART_OFS_APPEND, 710 .size = 2 * (64 * 2048), 711 .mask_flags = MTD_WRITEABLE /* force read-only */ 712 }, 713 { 714 .name = "U-Boot Environment-OneNAND", 715 .offset = MTDPART_OFS_APPEND, 716 .size = 1 * (64 * 2048), 717 }, 718 { 719 .name = "Kernel-OneNAND", 720 .offset = MTDPART_OFS_APPEND, 721 .size = 16 * (64 * 2048), 722 }, 723 { 724 .name = "File System-OneNAND", 725 .offset = MTDPART_OFS_APPEND, 726 .size = MTDPART_SIZ_FULL, 727 }, 728}; 729 730static struct mtd_partition sdp_nand_partitions[] = { 731 /* All the partition sizes are listed in terms of NAND block size */ 732 { 733 .name = "X-Loader-NAND", 734 .offset = 0, 735 .size = 4 * (64 * 2048), 736 .mask_flags = MTD_WRITEABLE, /* force read-only */ 737 }, 738 { 739 .name = "U-Boot-NAND", 740 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ 741 .size = 10 * (64 * 2048), 742 .mask_flags = MTD_WRITEABLE, /* force read-only */ 743 }, 744 { 745 .name = "Boot Env-NAND", 746 747 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ 748 .size = 6 * (64 * 2048), 749 }, 750 { 751 .name = "Kernel-NAND", 752 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ 753 .size = 40 * (64 * 2048), 754 }, 755 { 756 .name = "File System - NAND", 757 .size = MTDPART_SIZ_FULL, 758 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ 759 }, 760}; 761 762static struct flash_partitions sdp_flash_partitions[] = { 763 { 764 .parts = sdp_nor_partitions, 765 .nr_parts = ARRAY_SIZE(sdp_nor_partitions), 766 }, 767 { 768 .parts = sdp_onenand_partitions, 769 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), 770 }, 771 { 772 .parts = sdp_nand_partitions, 773 .nr_parts = ARRAY_SIZE(sdp_nand_partitions), 774 }, 775}; 776 777static struct omap_musb_board_data musb_board_data = { 778 .interface_type = MUSB_INTERFACE_ULPI, 779 .mode = MUSB_OTG, 780 .power = 100, 781}; 782 783static void __init omap_3430sdp_init(void) 784{ 785 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 786 omap_board_config = sdp3430_config; 787 omap_board_config_size = ARRAY_SIZE(sdp3430_config); 788 omap3_pm_init_cpuidle(omap3_cpuidle_params_table); 789 omap3430_i2c_init(); 790 omap_display_init(&sdp3430_dss_data); 791 if (omap_rev() > OMAP3430_REV_ES1_0) 792 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; 793 else 794 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1; 795 sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio); 796 spi_register_board_info(sdp3430_spi_board_info, 797 ARRAY_SIZE(sdp3430_spi_board_info)); 798 ads7846_dev_init(); 799 omap_serial_init(); 800 usb_musb_init(&musb_board_data); 801 board_smc91x_init(); 802 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); 803 sdp3430_display_init(); 804 enable_board_wakeup_source(); 805 usb_ehci_init(&ehci_pdata); 806} 807 808MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") 809 /* Maintainer: Syed Khasim - Texas Instruments Inc */ 810 .boot_params = 0x80000100, 811 .reserve = omap_reserve, 812 .map_io = omap3_map_io, 813 .init_early = omap_3430sdp_init_early, 814 .init_irq = omap_init_irq, 815 .init_machine = omap_3430sdp_init, 816 .timer = &omap_timer, 817MACHINE_END 818