1543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley/* 2543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * linux/arch/arm/mach-omap2/clock.c 3543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * 4a16e97037b518533569a778f0e997704e5c43796Tony Lindgren * Copyright (C) 2005-2008 Texas Instruments, Inc. 58c34974ab0ecbbcdabd343f8cd0013cd2d2b0fa8Paul Walmsley * Copyright (C) 2004-2010 Nokia Corporation 6543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * 7a16e97037b518533569a778f0e997704e5c43796Tony Lindgren * Contacts: 8a16e97037b518533569a778f0e997704e5c43796Tony Lindgren * Richard Woodruff <r-woodruff2@ti.com> 9543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * Paul Walmsley 10543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * 11543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * This program is free software; you can redistribute it and/or modify 12543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * it under the terms of the GNU General Public License version 2 as 13543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * published by the Free Software Foundation. 14543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley */ 15543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#undef DEBUG 16543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 17543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#include <linux/kernel.h> 181fe9be8248ae9a04a09fcec7fed486d31e7f0897Paul Walmsley#include <linux/export.h> 19543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#include <linux/list.h> 20543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#include <linux/errno.h> 214d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley#include <linux/err.h> 224d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley#include <linux/delay.h> 2332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette#include <linux/clk-provider.h> 24fced80c735941fa518ac67c0b61bbe153fb8c050Russell King#include <linux/io.h> 25fbd3bdb213e91e9e698959caae1f3b4ead515602Russell King#include <linux/bitops.h> 2678e52e026d288aad88b46bff0d94b05e145c4583J Keerthy#include <linux/clk-private.h> 275e7c58dc8d9b7f31d418cf98c6a8cad84b86f510Jean Pihet#include <asm/cpu.h> 28dbc04161048dd5e5c3c58546688a0cc0854051e9Tony Lindgren 29dbc04161048dd5e5c3c58546688a0cc0854051e9Tony Lindgren#include <trace/events/power.h> 30dbc04161048dd5e5c3c58546688a0cc0854051e9Tony Lindgren 31dbc04161048dd5e5c3c58546688a0cc0854051e9Tony Lindgren#include "soc.h" 32dbc04161048dd5e5c3c58546688a0cc0854051e9Tony Lindgren#include "clockdomain.h" 33543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#include "clock.h" 34c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley#include "cm.h" 35ff4ae5d9319b86f940e410e92659c50f9879ff46Paul Walmsley#include "cm2xxx.h" 36ff4ae5d9319b86f940e410e92659c50f9879ff46Paul Walmsley#include "cm3xxx.h" 37543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#include "cm-regbits-24xx.h" 38543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley#include "cm-regbits-34xx.h" 39c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley#include "common.h" 40c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 41c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley/* 42c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait 43c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * for a module to indicate that it is no longer in idle 44c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley */ 45c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley#define MAX_MODULE_ENABLE_WAIT 100000 46543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 47995411953604e3c973328dda8c7807e45aca0f2bAfzal Mohammedu16 cpu_mask; 48543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 4930962d9d0c74f6b00a7dece200fa08392b62817dPaul Walmsley/* 508111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo * Clock features setup. Used instead of CPU type checks. 518111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo */ 528111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristostruct ti_clk_features ti_clk_features; 538111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo 54a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo/* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */ 55a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo#define OMAP3430_DPLL_FINT_BAND1_MIN 750000 56a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo#define OMAP3430_DPLL_FINT_BAND1_MAX 2100000 57a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo#define OMAP3430_DPLL_FINT_BAND2_MIN 7500000 58a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo#define OMAP3430_DPLL_FINT_BAND2_MAX 21000000 59a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo 60a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo/* 61a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo * DPLL valid Fint frequency range for OMAP36xx and OMAP4xxx. 62a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo * From device data manual section 4.3 "DPLL and DLL Specifications". 63a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo */ 64a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo#define OMAP3PLUS_DPLL_FINT_MIN 32000 65a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo#define OMAP3PLUS_DPLL_FINT_MAX 52000000 66a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo 678111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo/* 6812706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * clkdm_control: if true, then when a clock is enabled in the 6912706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * hardware, its clockdomain will first be enabled; and when a clock 7012706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * is disabled in the hardware, its clockdomain will be disabled 7112706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * afterwards. 7212706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley */ 7312706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsleystatic bool clkdm_control = true; 7412706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley 7523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayakstatic LIST_HEAD(clk_hw_omap_clocks); 763ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristovoid __iomem *clk_memmaps[CLK_MAX_MEMMAPS]; 773ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo 783ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristovoid omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg) 793ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo{ 803ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo if (clk->flags & MEMMAP_ADDRESSING) { 813ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo struct clk_omap_reg *r = (struct clk_omap_reg *)® 823ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo writel_relaxed(val, clk_memmaps[r->index] + r->offset); 833ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo } else { 843ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo writel_relaxed(val, reg); 853ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo } 863ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo} 873ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo 883ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristou32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg) 893ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo{ 903ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo u32 val; 913ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo 923ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo if (clk->flags & MEMMAP_ADDRESSING) { 933ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo struct clk_omap_reg *r = (struct clk_omap_reg *)® 943ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo val = readl_relaxed(clk_memmaps[r->index] + r->offset); 953ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo } else { 963ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo val = readl_relaxed(reg); 973ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo } 983ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo 993ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo return val; 1003ada6b10aaf2ff5c7dc6e8add6fdf1b7333d1b34Tero Kristo} 10132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 10232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/* 10330962d9d0c74f6b00a7dece200fa08392b62817dPaul Walmsley * OMAP2+ specific clock functions 10430962d9d0c74f6b00a7dece200fa08392b62817dPaul Walmsley */ 105543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 1064b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley/* Private functions */ 1074b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley 108c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 109c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley/** 110c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * _wait_idlest_generic - wait for a module to leave the idle state 111519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo * @clk: module clock to wait for (needed for register offsets) 112c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * @reg: virtual address of module IDLEST register 113c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * @mask: value to mask against to determine if the module is active 114c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * @idlest: idle state indicator (0 or 1) for the clock 115c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * @name: name of the clock (for printk) 116c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * 117c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * Wait for a module to leave idle, where its idle-status register is 118c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * not inside the CM module. Returns 1 if the module left idle 119c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * promptly, or 0 if the module did not leave idle before the timeout 120c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * elapsed. XXX Deprecated - should be moved into drivers for the 121c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley * individual IP block that the IDLEST register exists in. 122c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley */ 123519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristostatic int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg, 124519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo u32 mask, u8 idlest, const char *name) 125c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley{ 126c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley int i = 0, ena = 0; 127c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 128c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley ena = (idlest) ? 0 : mask; 129c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 130519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo omap_test_timeout(((omap2_clk_readl(clk, reg) & mask) == ena), 131c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley MAX_MODULE_ENABLE_WAIT, i); 132c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 133c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley if (i < MAX_MODULE_ENABLE_WAIT) 134c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley pr_debug("omap clock: module associated with clock %s ready after %d loops\n", 135c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley name, i); 136c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley else 137c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n", 138c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley name, MAX_MODULE_ENABLE_WAIT); 139c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 140c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; 141c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley}; 142c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley 1434b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley/** 1444b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE 1454b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * @clk: struct clk * belonging to the module 1464b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * 1474b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * If the necessary clocks for the OMAP hardware IP block that 1484b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * corresponds to clock @clk are enabled, then wait for the module to 1494b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * indicate readiness (i.e., to leave IDLE). This code does not 1504b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * belong in the clock code and will be moved in the medium term to 1514b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley * module-dependent code. No return value. 1524b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley */ 15332cc002116b866151ca24c6e9110ba8a93754753Mike Turquettestatic void _omap2_module_wait_ready(struct clk_hw_omap *clk) 1544b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley{ 1554b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley void __iomem *companion_reg, *idlest_reg; 156c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley u8 other_bit, idlest_bit, idlest_val, idlest_reg_id; 157c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley s16 prcm_mod; 158c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley int r; 1594b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley 1604b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley /* Not all modules have multiple clocks that their IDLEST depends on */ 1614b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley if (clk->ops->find_companion) { 1624b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley clk->ops->find_companion(clk, &companion_reg, &other_bit); 163519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo if (!(omap2_clk_readl(clk, companion_reg) & (1 << other_bit))) 1644b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley return; 1654b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley } 1664b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley 167419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); 168c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id); 169c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley if (r) { 170c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley /* IDLEST register not in the CM module */ 171519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo _wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit), 172519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo idlest_val, __clk_get_name(clk->hw.clk)); 173c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley } else { 174c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit); 175c4ceedcb18cf7a06059482a3a1828b9aad9f78cfPaul Walmsley }; 1764b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley} 1774b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley 1784b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley/* Public functions */ 1794b1f76ed4f8012929494261eb6923b3c98554a9aPaul Walmsley 180543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley/** 181333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk 182333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley * @clk: OMAP clock struct ptr to use 183333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley * 184333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley * Convert a clockdomain name stored in a struct clk 'clk' into a 185333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley * clockdomain pointer, and save it into the struct clk. Intended to be 186333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley * called during clk_register(). No return value. 187333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley */ 18832cc002116b866151ca24c6e9110ba8a93754753Mike Turquettevoid omap2_init_clk_clkdm(struct clk_hw *hw) 18932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 19032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette struct clk_hw_omap *clk = to_clk_hw_omap(hw); 191333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley struct clockdomain *clkdm; 1925dcc3b975e972989574c009457f0e333c342910dRajendra Nayak const char *clk_name; 193333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley 194333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley if (!clk->clkdm_name) 195333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley return; 196333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley 19732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clk_name = __clk_get_name(hw->clk); 1985dcc3b975e972989574c009457f0e333c342910dRajendra Nayak 199333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley clkdm = clkdm_lookup(clk->clkdm_name); 200333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley if (clkdm) { 201333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley pr_debug("clock: associated clk %s to clkdm %s\n", 2025dcc3b975e972989574c009457f0e333c342910dRajendra Nayak clk_name, clk->clkdm_name); 203333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley clk->clkdm = clkdm; 204333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley } else { 2057852ec0536ca39cefffc6301dc77f8ae55592926Paul Walmsley pr_debug("clock: could not associate clk %s to clkdm %s\n", 2065dcc3b975e972989574c009457f0e333c342910dRajendra Nayak clk_name, clk->clkdm_name); 207333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley } 208333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley} 209333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley 210333943ba9e1716a3751af82f2dcc7620b83091edPaul Walmsley/** 21112706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable 21212706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * 21312706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * Prevent the OMAP clock code from calling into the clockdomain code 21412706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * when a hardware clock in that clockdomain is enabled or disabled. 21512706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * Intended to be called at init time from omap*_clk_init(). No 21612706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley * return value. 21712706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley */ 21812706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsleyvoid __init omap2_clk_disable_clkdm_control(void) 21912706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley{ 22012706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley clkdm_control = false; 22112706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley} 22212706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley 22312706c542574ea0127a13815efe59ca9ba6d88d7Paul Walmsley/** 22472350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * omap2_clk_dflt_find_companion - find companion clock to @clk 22572350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * @clk: struct clk * to find the companion clock of 22672350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in 22772350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * @other_bit: u8 ** to return the companion clock bit shift in 22872350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * 22972350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * Note: We don't need special code here for INVERT_ENABLE for the 23072350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * time being since INVERT_ENABLE only applies to clocks enabled by 23172350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * CM_CLKEN_PLL 232543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley * 23372350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's 23472350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * just a matter of XORing the bits. 23572350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * 23672350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * Some clocks don't have companion clocks. For example, modules with 23772350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * only an interface clock (such as MAILBOXES) don't have a companion 23872350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * clock. Right now, this code relies on the hardware exporting a bit 23972350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * in the correct companion register that indicates that the 24072350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * nonexistent 'companion clock' is active. Future patches will 24172350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * associate this type of code with per-module data structures to 24272350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * avoid this issue, and remove the casts. No return value. 243543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley */ 24432cc002116b866151ca24c6e9110ba8a93754753Mike Turquettevoid omap2_clk_dflt_find_companion(struct clk_hw_omap *clk, 24532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette void __iomem **other_reg, u8 *other_bit) 246543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley{ 24772350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley u32 r; 248543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 249543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley /* 25072350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes 25172350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * it's just a matter of XORing the bits. 252543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley */ 25372350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); 254543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 25572350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley *other_reg = (__force void __iomem *)r; 25672350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley *other_bit = clk->enable_bit; 25772350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley} 258543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 25972350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley/** 26072350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk 26172350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * @clk: struct clk * to find IDLEST info for 26272350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * @idlest_reg: void __iomem ** to return the CM_IDLEST va in 263419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan * @idlest_bit: u8 * to return the CM_IDLEST bit shift in 264419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan * @idlest_val: u8 * to return the idle status indicator 26572350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * 26672350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * Return the CM_IDLEST register address and bit shift corresponding 26772350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * to the module that "owns" this clock. This default code assumes 26872350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that 26972350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * the IDLEST register address ID corresponds to the CM_*CLKEN 27072350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * register address ID (e.g., that CM_FCLKEN2 corresponds to 27172350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley * CM_IDLEST2). This is not true for all modules. No return value. 272543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley */ 27332cc002116b866151ca24c6e9110ba8a93754753Mike Turquettevoid omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk, 27432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val) 275543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley{ 27672350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley u32 r; 277543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 27872350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); 27972350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley *idlest_reg = (__force void __iomem *)r; 28072350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley *idlest_bit = clk->enable_bit; 281419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan 282419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan /* 283419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan * 24xx uses 0 to indicate not ready, and 1 to indicate ready. 284419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan * 34xx reverses this, just to keep us on our toes 285419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan * AM35xx uses both, depending on the module. 286419cc97d3678f0fca5e60b3853dd9c1371f67805Ranjith Lohithakshan */ 287066edb2d57d7db37121b420409c1deb185069c1dTero Kristo *idlest_val = ti_clk_features.cm_idlest_val; 28872350b29a4c0debfc27c2edbeed9b4ff3f935dd4Paul Walmsley} 289543d93781a3c744017594d0721c4c1814a26bccePaul Walmsley 29032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/** 29132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * omap2_dflt_clk_enable - enable a clock in the hardware 29232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * @hw: struct clk_hw * of the clock to enable 29332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * 29432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Enable the clock @hw in the hardware. We first call into the OMAP 29532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * clockdomain code to "enable" the corresponding clockdomain if this 29632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * is the first enabled user of the clockdomain. Then program the 29732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * hardware to enable the clock. Then wait for the IP block that uses 29832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * this clock to leave idle (if applicable). Returns the error value 29932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * from clkdm_clk_enable() if it terminated with an error, or -EINVAL 30032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * if @hw has a null clock enable_reg, or zero upon success. 30132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 30232cc002116b866151ca24c6e9110ba8a93754753Mike Turquetteint omap2_dflt_clk_enable(struct clk_hw *hw) 30332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 30432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette struct clk_hw_omap *clk; 30532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette u32 v; 30632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette int ret = 0; 30732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 30832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clk = to_clk_hw_omap(hw); 30932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 31032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clkdm_control && clk->clkdm) { 31132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette ret = clkdm_clk_enable(clk->clkdm, hw->clk); 31232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (ret) { 31332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette WARN(1, "%s: could not enable %s's clockdomain %s: %d\n", 31432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __func__, __clk_get_name(hw->clk), 31532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clk->clkdm->name, ret); 31632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return ret; 31732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 31832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 31932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 32032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (unlikely(clk->enable_reg == NULL)) { 32132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s missing enable_reg\n", __func__, 32232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __clk_get_name(hw->clk)); 32332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette ret = -EINVAL; 32432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette goto err; 32532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 32632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 32732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette /* FIXME should not have INVERT_ENABLE bit here */ 328519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo v = omap2_clk_readl(clk, clk->enable_reg); 32932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clk->flags & INVERT_ENABLE) 33032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette v &= ~(1 << clk->enable_bit); 33132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette else 33232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette v |= (1 << clk->enable_bit); 333519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo omap2_clk_writel(v, clk, clk->enable_reg); 334519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo v = omap2_clk_readl(clk, clk->enable_reg); /* OCP barrier */ 33532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 33632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clk->ops && clk->ops->find_idlest) 33732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette _omap2_module_wait_ready(clk); 33832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 33932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return 0; 34032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 34132cc002116b866151ca24c6e9110ba8a93754753Mike Turquetteerr: 34232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clkdm_control && clk->clkdm) 34332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clkdm_clk_disable(clk->clkdm, hw->clk); 34432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return ret; 34532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette} 34632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 34732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/** 34832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * omap2_dflt_clk_disable - disable a clock in the hardware 34932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * @hw: struct clk_hw * of the clock to disable 35032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * 35132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Disable the clock @hw in the hardware, and call into the OMAP 35232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * clockdomain code to "disable" the corresponding clockdomain if all 35332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * clocks/hwmods in that clockdomain are now disabled. No return 35432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * value. 35532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 35632cc002116b866151ca24c6e9110ba8a93754753Mike Turquettevoid omap2_dflt_clk_disable(struct clk_hw *hw) 35732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 35832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette struct clk_hw_omap *clk; 35932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette u32 v; 36032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 36132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clk = to_clk_hw_omap(hw); 36232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (!clk->enable_reg) { 36332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette /* 36432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * 'independent' here refers to a clock which is not 36532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * controlled by its parent. 36632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 36732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: independent clock %s has no enable_reg\n", 36832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __func__, __clk_get_name(hw->clk)); 36932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return; 37032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 37132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 372519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo v = omap2_clk_readl(clk, clk->enable_reg); 37332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clk->flags & INVERT_ENABLE) 37432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette v |= (1 << clk->enable_bit); 37532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette else 37632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette v &= ~(1 << clk->enable_bit); 377519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo omap2_clk_writel(v, clk, clk->enable_reg); 37832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette /* No OCP barrier needed here since it is a disable operation */ 37932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 38032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clkdm_control && clk->clkdm) 38132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clkdm_clk_disable(clk->clkdm, hw->clk); 38232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette} 38332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 38432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/** 38532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw 38632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * @hw: struct clk_hw * of the clock being enabled 38732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * 38832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Increment the usecount of the clockdomain of the clock pointed to 38932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * by @hw; if the usecount is 1, the clockdomain will be "enabled." 39032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Only needed for clocks that don't use omap2_dflt_clk_enable() as 39132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * their enable function pointer. Passes along the return value of 39232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * clkdm_clk_enable(), -EINVAL if @hw is not associated with a 39332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * clockdomain, or 0 if clock framework-based clockdomain control is 39432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * not implemented. 39532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 39632cc002116b866151ca24c6e9110ba8a93754753Mike Turquetteint omap2_clkops_enable_clkdm(struct clk_hw *hw) 39732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 39832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette struct clk_hw_omap *clk; 39932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette int ret = 0; 40032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 40132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clk = to_clk_hw_omap(hw); 40232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 40332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (unlikely(!clk->clkdm)) { 40432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s: no clkdm set ?!\n", __func__, 40532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __clk_get_name(hw->clk)); 40632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return -EINVAL; 40732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 40832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 40932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (unlikely(clk->enable_reg)) 41032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s: should use dflt_clk_enable ?!\n", __func__, 41132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __clk_get_name(hw->clk)); 41232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 41332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (!clkdm_control) { 41432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n", 41532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __func__, __clk_get_name(hw->clk)); 41632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return 0; 41732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 41832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 41932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette ret = clkdm_clk_enable(clk->clkdm, hw->clk); 42032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette WARN(ret, "%s: could not enable %s's clockdomain %s: %d\n", 42132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __func__, __clk_get_name(hw->clk), clk->clkdm->name, ret); 42232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 42332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return ret; 42432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette} 42532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 42632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/** 42732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * omap2_clkops_disable_clkdm - decrement usecount on clkdm of @hw 42832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * @hw: struct clk_hw * of the clock being disabled 42932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * 43032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Decrement the usecount of the clockdomain of the clock pointed to 43132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * by @hw; if the usecount is 0, the clockdomain will be "disabled." 43232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Only needed for clocks that don't use omap2_dflt_clk_disable() as their 43332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * disable function pointer. No return value. 43432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 43532cc002116b866151ca24c6e9110ba8a93754753Mike Turquettevoid omap2_clkops_disable_clkdm(struct clk_hw *hw) 43632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 43732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette struct clk_hw_omap *clk; 43832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 43932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clk = to_clk_hw_omap(hw); 44032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 44132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (unlikely(!clk->clkdm)) { 44232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s: no clkdm set ?!\n", __func__, 44332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __clk_get_name(hw->clk)); 44432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return; 44532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 44632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 44732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (unlikely(clk->enable_reg)) 44832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s: should use dflt_clk_disable ?!\n", __func__, 44932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __clk_get_name(hw->clk)); 45032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 45132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (!clkdm_control) { 45232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n", 45332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette __func__, __clk_get_name(hw->clk)); 45432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return; 45532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette } 45632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 45732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette clkdm_clk_disable(clk->clkdm, hw->clk); 45832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette} 45932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 46032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/** 46132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * omap2_dflt_clk_is_enabled - is clock enabled in the hardware? 46232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * @hw: struct clk_hw * to check 46332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * 46432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * Return 1 if the clock represented by @hw is enabled in the 46532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * hardware, or 0 otherwise. Intended for use in the struct 46632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * clk_ops.is_enabled function pointer. 46732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 46832cc002116b866151ca24c6e9110ba8a93754753Mike Turquetteint omap2_dflt_clk_is_enabled(struct clk_hw *hw) 46932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 47032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette struct clk_hw_omap *clk = to_clk_hw_omap(hw); 47132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette u32 v; 47232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 473519ab8b202f37fb76cc6f32ef34da79716680d03Tero Kristo v = omap2_clk_readl(clk, clk->enable_reg); 47432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 47532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (clk->flags & INVERT_ENABLE) 47632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette v ^= BIT(clk->enable_bit); 47732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 47832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette v &= BIT(clk->enable_bit); 47932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 48032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return v ? 1 : 0; 48132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette} 48232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 48332cc002116b866151ca24c6e9110ba8a93754753Mike Turquettestatic int __initdata mpurate; 48432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 48532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette/* 48632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * By default we use the rate set by the bootloader. 48732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette * You can override this with mpurate= cmdline option. 48832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette */ 48932cc002116b866151ca24c6e9110ba8a93754753Mike Turquettestatic int __init omap_clk_setup(char *str) 49032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette{ 49132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette get_option(&str, &mpurate); 49232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 49332cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (!mpurate) 49432cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return 1; 49532cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 49632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette if (mpurate < 1000) 49732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette mpurate *= 1000000; 49832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 49932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette return 1; 50032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette} 50132cc002116b866151ca24c6e9110ba8a93754753Mike Turquette__setup("mpurate=", omap_clk_setup); 50232cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 50323fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak/** 50423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock 50523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * @clk: struct clk * to initialize 50623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * 50723fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * Add an OMAP clock @clk to the internal list of OMAP clocks. Used 50823fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * temporarily for autoidle handling, until this support can be 50923fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * integrated into the common clock framework code in some way. No 51023fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * return value. 51123fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak */ 51223fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayakvoid omap2_init_clk_hw_omap_clocks(struct clk *clk) 51323fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak{ 51423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak struct clk_hw_omap *c; 51523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 51623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak if (__clk_get_flags(clk) & CLK_IS_BASIC) 51723fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak return; 51823fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 51923fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak c = to_clk_hw_omap(__clk_get_hw(clk)); 52023fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak list_add(&c->node, &clk_hw_omap_clocks); 52123fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak} 52223fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 52323fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak/** 52423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * omap2_clk_enable_autoidle_all - enable autoidle on all OMAP clocks that 52523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * support it 52623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * 52723fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * Enable clock autoidle on all OMAP clocks that have allow_idle 52823fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * function pointers associated with them. This function is intended 52923fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * to be temporary until support for this is added to the common clock 53023fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * code. Returns 0. 53123fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak */ 53223fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayakint omap2_clk_enable_autoidle_all(void) 53323fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak{ 53423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak struct clk_hw_omap *c; 53523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 53623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak list_for_each_entry(c, &clk_hw_omap_clocks, node) 53723fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak if (c->ops && c->ops->allow_idle) 53823fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak c->ops->allow_idle(c); 539b1a07b478b63f0a8f971b3a82ce34a67a9324547Tero Kristo 540b1a07b478b63f0a8f971b3a82ce34a67a9324547Tero Kristo of_ti_clk_allow_autoidle_all(); 541b1a07b478b63f0a8f971b3a82ce34a67a9324547Tero Kristo 54223fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak return 0; 54323fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak} 54423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 54523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak/** 54623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * omap2_clk_disable_autoidle_all - disable autoidle on all OMAP clocks that 54723fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * support it 54823fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * 54923fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * Disable clock autoidle on all OMAP clocks that have allow_idle 55023fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * function pointers associated with them. This function is intended 55123fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * to be temporary until support for this is added to the common clock 55223fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak * code. Returns 0. 55323fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak */ 55423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayakint omap2_clk_disable_autoidle_all(void) 55523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak{ 55623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak struct clk_hw_omap *c; 55723fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 55823fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak list_for_each_entry(c, &clk_hw_omap_clocks, node) 55923fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak if (c->ops && c->ops->deny_idle) 56023fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak c->ops->deny_idle(c); 561b1a07b478b63f0a8f971b3a82ce34a67a9324547Tero Kristo 562b1a07b478b63f0a8f971b3a82ce34a67a9324547Tero Kristo of_ti_clk_deny_autoidle_all(); 563b1a07b478b63f0a8f971b3a82ce34a67a9324547Tero Kristo 56423fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak return 0; 56523fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak} 56623fb8ba3a8f55f28a7a89b64b3711fcf72239d7fRajendra Nayak 5678577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak/** 568818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * omap2_clk_deny_idle - disable autoidle on an OMAP clock 569818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * @clk: struct clk * to disable autoidle for 570818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * 571818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * Disable autoidle on an OMAP clock. 572818b40e500b2afadeabfd7ca369800c350989143Tero Kristo */ 573818b40e500b2afadeabfd7ca369800c350989143Tero Kristoint omap2_clk_deny_idle(struct clk *clk) 574818b40e500b2afadeabfd7ca369800c350989143Tero Kristo{ 575818b40e500b2afadeabfd7ca369800c350989143Tero Kristo struct clk_hw_omap *c; 576818b40e500b2afadeabfd7ca369800c350989143Tero Kristo 577818b40e500b2afadeabfd7ca369800c350989143Tero Kristo if (__clk_get_flags(clk) & CLK_IS_BASIC) 578818b40e500b2afadeabfd7ca369800c350989143Tero Kristo return -EINVAL; 579818b40e500b2afadeabfd7ca369800c350989143Tero Kristo 580818b40e500b2afadeabfd7ca369800c350989143Tero Kristo c = to_clk_hw_omap(__clk_get_hw(clk)); 581818b40e500b2afadeabfd7ca369800c350989143Tero Kristo if (c->ops && c->ops->deny_idle) 582818b40e500b2afadeabfd7ca369800c350989143Tero Kristo c->ops->deny_idle(c); 583818b40e500b2afadeabfd7ca369800c350989143Tero Kristo return 0; 584818b40e500b2afadeabfd7ca369800c350989143Tero Kristo} 585818b40e500b2afadeabfd7ca369800c350989143Tero Kristo 586818b40e500b2afadeabfd7ca369800c350989143Tero Kristo/** 587818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * omap2_clk_allow_idle - enable autoidle on an OMAP clock 588818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * @clk: struct clk * to enable autoidle for 589818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * 590818b40e500b2afadeabfd7ca369800c350989143Tero Kristo * Enable autoidle on an OMAP clock. 591818b40e500b2afadeabfd7ca369800c350989143Tero Kristo */ 592818b40e500b2afadeabfd7ca369800c350989143Tero Kristoint omap2_clk_allow_idle(struct clk *clk) 593818b40e500b2afadeabfd7ca369800c350989143Tero Kristo{ 594818b40e500b2afadeabfd7ca369800c350989143Tero Kristo struct clk_hw_omap *c; 595818b40e500b2afadeabfd7ca369800c350989143Tero Kristo 596818b40e500b2afadeabfd7ca369800c350989143Tero Kristo if (__clk_get_flags(clk) & CLK_IS_BASIC) 597818b40e500b2afadeabfd7ca369800c350989143Tero Kristo return -EINVAL; 598818b40e500b2afadeabfd7ca369800c350989143Tero Kristo 599818b40e500b2afadeabfd7ca369800c350989143Tero Kristo c = to_clk_hw_omap(__clk_get_hw(clk)); 600818b40e500b2afadeabfd7ca369800c350989143Tero Kristo if (c->ops && c->ops->allow_idle) 601818b40e500b2afadeabfd7ca369800c350989143Tero Kristo c->ops->allow_idle(c); 602818b40e500b2afadeabfd7ca369800c350989143Tero Kristo return 0; 603818b40e500b2afadeabfd7ca369800c350989143Tero Kristo} 604818b40e500b2afadeabfd7ca369800c350989143Tero Kristo 605818b40e500b2afadeabfd7ca369800c350989143Tero Kristo/** 6068577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * omap2_clk_enable_init_clocks - prepare & enable a list of clocks 6078577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * @clk_names: ptr to an array of strings of clock names to enable 6088577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * @num_clocks: number of clock names in @clk_names 6098577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * 6108577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * Prepare and enable a list of clocks, named by @clk_names. No 6118577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * return value. XXX Deprecated; only needed until these clocks are 6128577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * properly claimed and enabled by the drivers or core code that uses 6138577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak * them. XXX What code disables & calls clk_put on these clocks? 6148577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak */ 6158577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayakvoid omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks) 6168577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak{ 6178577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak struct clk *init_clk; 6188577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak int i; 6198577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak 6208577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak for (i = 0; i < num_clocks; i++) { 6218577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak init_clk = clk_get(NULL, clk_names[i]); 6228577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak clk_prepare_enable(init_clk); 6238577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak } 6248577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak} 6258577413c0a26e9bc0b412289640243f3b20f4517Rajendra Nayak 62632cc002116b866151ca24c6e9110ba8a93754753Mike Turquetteconst struct clk_hw_omap_ops clkhwops_wait = { 62732cc002116b866151ca24c6e9110ba8a93754753Mike Turquette .find_idlest = omap2_clk_dflt_find_idlest, 62832cc002116b866151ca24c6e9110ba8a93754753Mike Turquette .find_companion = omap2_clk_dflt_find_companion, 62932cc002116b866151ca24c6e9110ba8a93754753Mike Turquette}; 63032cc002116b866151ca24c6e9110ba8a93754753Mike Turquette 6314d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley/** 63278e52e026d288aad88b46bff0d94b05e145c4583J Keerthy * omap_clocks_register - register an array of omap_clk 63378e52e026d288aad88b46bff0d94b05e145c4583J Keerthy * @ocs: pointer to an array of omap_clk to register 63478e52e026d288aad88b46bff0d94b05e145c4583J Keerthy */ 63578e52e026d288aad88b46bff0d94b05e145c4583J Keerthyvoid __init omap_clocks_register(struct omap_clk oclks[], int cnt) 63678e52e026d288aad88b46bff0d94b05e145c4583J Keerthy{ 63778e52e026d288aad88b46bff0d94b05e145c4583J Keerthy struct omap_clk *c; 63878e52e026d288aad88b46bff0d94b05e145c4583J Keerthy 63978e52e026d288aad88b46bff0d94b05e145c4583J Keerthy for (c = oclks; c < oclks + cnt; c++) { 64078e52e026d288aad88b46bff0d94b05e145c4583J Keerthy clkdev_add(&c->lk); 64178e52e026d288aad88b46bff0d94b05e145c4583J Keerthy if (!__clk_init(NULL, c->lk.clk)) 64278e52e026d288aad88b46bff0d94b05e145c4583J Keerthy omap2_init_clk_hw_omap_clocks(c->lk.clk); 64378e52e026d288aad88b46bff0d94b05e145c4583J Keerthy } 64478e52e026d288aad88b46bff0d94b05e145c4583J Keerthy} 64578e52e026d288aad88b46bff0d94b05e145c4583J Keerthy 64678e52e026d288aad88b46bff0d94b05e145c4583J Keerthy/** 6474d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument 6484d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * @mpurate_ck_name: clk name of the clock to change rate 6494d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * 6504d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * Change the ARM MPU clock rate to the rate specified on the command 6514d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * line, if one was specified. @mpurate_ck_name should be 6524d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * "virt_prcm_set" on OMAP2xxx and "dpll1_ck" on OMAP34xx/OMAP36xx. 6534d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * XXX Does not handle voltage scaling - on OMAP2xxx this is currently 6544d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * handled by the virt_prcm_set clock, but this should be handled by 6554d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * the OPP layer. XXX This is intended to be handled by the OPP layer 6564d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * code in the near future and should be removed from the clock code. 6574d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects 6584d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name 6594d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * cannot be found, or 0 upon success. 6604d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley */ 6614d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsleyint __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name) 6624d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley{ 6634d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley struct clk *mpurate_ck; 6644d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley int r; 6654d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 6664d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley if (!mpurate) 6674d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return -EINVAL; 6684d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 6694d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley mpurate_ck = clk_get(NULL, mpurate_ck_name); 6704d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name)) 6714d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return -ENOENT; 6724d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 6734d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley r = clk_set_rate(mpurate_ck, mpurate); 674c48cd659892962f79bba4b4e0eedea8e5aa54c44Russell King if (r < 0) { 6754d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n", 67632cc002116b866151ca24c6e9110ba8a93754753Mike Turquette mpurate_ck_name, mpurate, r); 677f6281f6684d613948e7b9f0bd956488bb33993abJulia Lawall clk_put(mpurate_ck); 6784d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return -EINVAL; 6794d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley } 6804d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 6814d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley calibrate_delay(); 6824d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley clk_put(mpurate_ck); 6834d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 6844d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return 0; 6854d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley} 6864d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 6874d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley/** 6884d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * omap2_clk_print_new_rates - print summary of current clock tree rates 6894d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * @hfclkin_ck_name: clk name for the off-chip HF oscillator 6904d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * @core_ck_name: clk name for the on-chip CORE_CLK 6914d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * @mpu_ck_name: clk name for the ARM MPU clock 6924d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * 6934d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * Prints a short message to the console with the HFCLKIN oscillator 6944d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * rate, the rate of the CORE clock, and the rate of the ARM MPU clock. 6954d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * Called by the boot-time MPU rate switching code. XXX This is intended 6964d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * to be handled by the OPP layer code in the near future and should be 6974d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley * removed from the clock code. No return value. 6984d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley */ 6994d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsleyvoid __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, 7004d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley const char *core_ck_name, 7014d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley const char *mpu_ck_name) 7024d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley{ 7034d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley struct clk *hfclkin_ck, *core_ck, *mpu_ck; 7044d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley unsigned long hfclkin_rate; 7054d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 7064d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley mpu_ck = clk_get(NULL, mpu_ck_name); 7074d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name)) 7084d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return; 7094d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 7104d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley core_ck = clk_get(NULL, core_ck_name); 7114d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name)) 7124d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return; 7134d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 7144d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley hfclkin_ck = clk_get(NULL, hfclkin_ck_name); 7154d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name)) 7164d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley return; 7174d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 7184d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley hfclkin_rate = clk_get_rate(hfclkin_ck); 7194d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley 7207852ec0536ca39cefffc6301dc77f8ae55592926Paul Walmsley pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", 7217852ec0536ca39cefffc6301dc77f8ae55592926Paul Walmsley (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10), 7224d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley (clk_get_rate(core_ck) / 1000000), 7234d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley (clk_get_rate(mpu_ck) / 1000000)); 7244d30e82c26b7212021b9a5ab57760d9b8a3075fePaul Walmsley} 7258111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo 7268111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo/** 7278111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo * ti_clk_init_features - init clock features struct for the SoC 7288111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo * 7298111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo * Initializes the clock features struct based on the SoC type. 7308111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo */ 7318111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristovoid __init ti_clk_init_features(void) 7328111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo{ 733a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo /* Fint setup for DPLLs */ 734a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo if (cpu_is_omap3430()) { 735a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo ti_clk_features.fint_min = OMAP3430_DPLL_FINT_BAND1_MIN; 736a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo ti_clk_features.fint_max = OMAP3430_DPLL_FINT_BAND2_MAX; 737a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo ti_clk_features.fint_band1_max = OMAP3430_DPLL_FINT_BAND1_MAX; 738a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo ti_clk_features.fint_band2_min = OMAP3430_DPLL_FINT_BAND2_MIN; 739a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo } else { 740a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo ti_clk_features.fint_min = OMAP3PLUS_DPLL_FINT_MIN; 741a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo ti_clk_features.fint_max = OMAP3PLUS_DPLL_FINT_MAX; 742a24886e263ec4b7062c88cfa84577080ea00da94Tero Kristo } 743512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo 744512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo /* Bypass value setup for DPLLs */ 745512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo if (cpu_is_omap24xx()) { 746512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo ti_clk_features.dpll_bypass_vals |= 747512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP2XXX_EN_DPLL_LPBYPASS) | 748512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP2XXX_EN_DPLL_FRBYPASS); 749512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo } else if (cpu_is_omap34xx()) { 750512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo ti_clk_features.dpll_bypass_vals |= 751512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP3XXX_EN_DPLL_LPBYPASS) | 752512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP3XXX_EN_DPLL_FRBYPASS); 753512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx() || 754512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo soc_is_omap54xx() || soc_is_dra7xx()) { 755512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo ti_clk_features.dpll_bypass_vals |= 756512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP4XXX_EN_DPLL_LPBYPASS) | 757512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP4XXX_EN_DPLL_FRBYPASS) | 758512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo (1 << OMAP4XXX_EN_DPLL_MNBYPASS); 759512d91cbd990c67df16d0a7b3ff5d35055ac6b39Tero Kristo } 7602337c5b58b6e9fd2fb46ab64e7ccbc44dc0ba40aTero Kristo 7612337c5b58b6e9fd2fb46ab64e7ccbc44dc0ba40aTero Kristo /* Jitter correction only available on OMAP343X */ 7622337c5b58b6e9fd2fb46ab64e7ccbc44dc0ba40aTero Kristo if (cpu_is_omap343x()) 7632337c5b58b6e9fd2fb46ab64e7ccbc44dc0ba40aTero Kristo ti_clk_features.flags |= TI_CLK_DPLL_HAS_FREQSEL; 764066edb2d57d7db37121b420409c1deb185069c1dTero Kristo 765066edb2d57d7db37121b420409c1deb185069c1dTero Kristo /* Idlest value for interface clocks. 766066edb2d57d7db37121b420409c1deb185069c1dTero Kristo * 24xx uses 0 to indicate not ready, and 1 to indicate ready. 767066edb2d57d7db37121b420409c1deb185069c1dTero Kristo * 34xx reverses this, just to keep us on our toes 768066edb2d57d7db37121b420409c1deb185069c1dTero Kristo * AM35xx uses both, depending on the module. 769066edb2d57d7db37121b420409c1deb185069c1dTero Kristo */ 770066edb2d57d7db37121b420409c1deb185069c1dTero Kristo if (cpu_is_omap24xx()) 771066edb2d57d7db37121b420409c1deb185069c1dTero Kristo ti_clk_features.cm_idlest_val = OMAP24XX_CM_IDLEST_VAL; 772066edb2d57d7db37121b420409c1deb185069c1dTero Kristo else if (cpu_is_omap34xx()) 773066edb2d57d7db37121b420409c1deb185069c1dTero Kristo ti_clk_features.cm_idlest_val = OMAP34XX_CM_IDLEST_VAL; 7748111e01045c1b3ac6b5d3c2ee3b8dc562efdf3aeTero Kristo} 775