1657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley/*
2657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * OMAP3517/3505-specific clock framework functions
3657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
4657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Copyright (C) 2010 Texas Instruments, Inc.
5ec538e30f7eded2c4af8d9184619a3de65bc378ePaul Walmsley * Copyright (C) 2011 Nokia Corporation
6657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
7657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Ranjith Lohithakshan
8657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Paul Walmsley
9657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
10657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Parts of this code are based on code written by
11657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
12657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Russell King
13657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
14657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * This program is free software; you can redistribute it and/or modify
15657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * it under the terms of the GNU General Public License version 2 as
16657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * published by the Free Software Foundation.
17657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley */
18657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#undef DEBUG
19657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
20657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#include <linux/kernel.h>
21657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#include <linux/clk.h>
22657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#include <linux/io.h>
23657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
24657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#include "clock.h"
25657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#include "clock3517.h"
26ff4ae5d9319b86f940e410e92659c50f9879ff46Paul Walmsley#include "cm3xxx.h"
27657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#include "cm-regbits-34xx.h"
28657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
29657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley/*
30657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * In AM35xx IPSS, the {ICK,FCK} enable bits for modules are exported
31657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * in the same register at a bit offset of 0x8. The EN_ACK for ICK is
32657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * at an offset of 4 from ICK enable bit.
33657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley */
34657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#define AM35XX_IPSS_ICK_MASK			0xF
35657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#define AM35XX_IPSS_ICK_EN_ACK_OFFSET 		0x4
36657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#define AM35XX_IPSS_ICK_FCK_OFFSET		0x8
37657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley#define AM35XX_IPSS_CLK_IDLEST_VAL		0
38657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
39657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley/**
40657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * am35xx_clk_find_idlest - return clock ACK info for AM35XX IPSS
41657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @clk: struct clk * being enabled
42657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
43657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
44657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
45657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
46657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * The interface clocks on AM35xx IPSS reflects the clock idle status
47657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * in the enable register itsel at a bit offset of 4 from the enable
48657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * bit. A value of 1 indicates that clock is enabled.
49657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley */
50b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayakstatic void am35xx_clk_find_idlest(struct clk_hw_omap *clk,
51657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley					    void __iomem **idlest_reg,
52657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley					    u8 *idlest_bit,
53657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley					    u8 *idlest_val)
54657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley{
55657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*idlest_reg = (__force void __iomem *)(clk->enable_reg);
56657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET;
57657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*idlest_val = AM35XX_IPSS_CLK_IDLEST_VAL;
58657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley}
59657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
60657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley/**
61657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * am35xx_clk_find_companion - find companion clock to @clk
62657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @clk: struct clk * to find the companion clock of
63657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
64657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @other_bit: u8 ** to return the companion clock bit shift in
65657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
66657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * Some clocks don't have companion clocks.  For example, modules with
67657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * only an interface clock (such as HECC) don't have a companion
68657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * clock.  Right now, this code relies on the hardware exporting a bit
69657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * in the correct companion register that indicates that the
70657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * nonexistent 'companion clock' is active.  Future patches will
71657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * associate this type of code with per-module data structures to
72657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * avoid this issue, and remove the casts.  No return value.
73657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley */
74b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayakstatic void am35xx_clk_find_companion(struct clk_hw_omap *clk,
75b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak				      void __iomem **other_reg,
76b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak				      u8 *other_bit)
77657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley{
78657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*other_reg = (__force void __iomem *)(clk->enable_reg);
79657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	if (clk->enable_bit & AM35XX_IPSS_ICK_MASK)
80657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley		*other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET;
81657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	else
82657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley		*other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET;
83657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley}
84b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayakconst struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait = {
85b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak	.find_idlest	= am35xx_clk_find_idlest,
86b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak	.find_companion	= am35xx_clk_find_companion,
87b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak};
88657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
89657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley/**
90657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS
91657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @clk: struct clk * being enabled
92657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
93657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
94657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
95657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley *
96657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * The IPSS target CM_IDLEST bit is at a different shift from the
97657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * CM_{I,F}CLKEN bit.  Pass back the correct info via @idlest_reg
98657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley * and @idlest_bit.  No return value.
99657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley */
100b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayakstatic void am35xx_clk_ipss_find_idlest(struct clk_hw_omap *clk,
101657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley					    void __iomem **idlest_reg,
102657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley					    u8 *idlest_bit,
103657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley					    u8 *idlest_val)
104657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley{
105657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	u32 r;
106657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley
107657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
108657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*idlest_reg = (__force void __iomem *)r;
109657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*idlest_bit = AM35XX_ST_IPSS_SHIFT;
110657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley	*idlest_val = OMAP34XX_CM_IDLEST_VAL;
111657ebfadc19c5a14f709dee1645082828330d5d4Paul Walmsley}
11225f4214e388dda818765b670fb608f2e6467d877Rajendra Nayak
113b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayakconst struct clk_hw_omap_ops clkhwops_am35xx_ipss_wait = {
114b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak	.allow_idle	= omap2_clkt_iclk_allow_idle,
115b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak	.deny_idle	= omap2_clkt_iclk_deny_idle,
116b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak	.find_idlest	= am35xx_clk_ipss_find_idlest,
117b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak	.find_companion	= omap2_clk_dflt_find_companion,
118b4777a21381fd1f87be8c606a616b7f97f485d2bRajendra Nayak};
119