159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 2139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley * OMAP2xxx/3xxx-common Power/Reset Management (PRM) register definitions 359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 4139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. 559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Copyright (C) 2008-2010 Nokia Corporation 659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Paul Walmsley 759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * This program is free software; you can redistribute it and/or modify 959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * it under the terms of the GNU General Public License version 2 as 1059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * published by the Free Software Foundation. 1159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 1259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * The PRM hardware modules on the OMAP2/3 are quite similar to each 1359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * other. The PRM on OMAP4 has a new register layout, and is handled 1459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * in a separate file. 1559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 1659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_3XXX_H 1759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define __ARCH_ARM_MACH_OMAP2_PRM2XXX_3XXX_H 1859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 1959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#include "prcm-common.h" 2059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#include "prm.h" 2159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 2259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 2359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Module specific PRM register offsets from PRM_BASE + domain offset 2459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Use prm_{read,write}_mod_reg() with these registers. 2659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * With a few exceptions, these are the register names beginning with 2859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * {PM,RM}_* on both OMAP2/3 SoC families.. (The exceptions are the 2959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * IRQSTATUS and IRQENABLE bits.) 3059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 3159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 3259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Register offsets appearing on both OMAP2 and OMAP3 */ 3359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 3459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP2_RM_RSTCTRL 0x0050 3559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP2_RM_RSTTIME 0x0054 3659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP2_RM_RSTST 0x0058 3759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP2_PM_PWSTCTRL 0x00e0 3859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP2_PM_PWSTST 0x00e4 3959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 4059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_WKEN 0x00a0 4159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_WKEN1 PM_WKEN 4259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_WKST 0x00b0 4359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_WKST1 PM_WKST 4459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_WKDEP 0x00c8 4559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_EVGENCTRL 0x00d4 4659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_EVGENONTIM 0x00d8 4759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define PM_EVGENOFFTIM 0x00dc 4859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 4959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 50139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley#ifndef __ASSEMBLER__ 5159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 52139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley#include <linux/io.h> 53498153995b9ff41279be54fc56facb92f5cad793Paul Walmsley#include "powerdomain.h" 5459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 5559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Power/reset management domain register get/set */ 56139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsleystatic inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx) 57139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley{ 58edfaf05c2fcb853fcf35f12aeb9c340f5913337fVictor Kamensky return readl_relaxed(prm_base + module + idx); 59139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley} 60139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 61139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsleystatic inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) 62139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley{ 63edfaf05c2fcb853fcf35f12aeb9c340f5913337fVictor Kamensky writel_relaxed(val, prm_base + module + idx); 64139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley} 65139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 66139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley/* Read-modify-write a register in a PRM module. Caller must lock */ 67139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsleystatic inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, 68139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley s16 idx) 69139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley{ 70139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley u32 v; 71139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 72139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley v = omap2_prm_read_mod_reg(module, idx); 73139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley v &= ~mask; 74139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley v |= bits; 75139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley omap2_prm_write_mod_reg(v, module, idx); 76139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 77139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley return v; 78139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley} 79139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 80139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley/* Read a PRM register, AND it, and shift the result down to bit 0 */ 81139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsleystatic inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) 82139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley{ 83139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley u32 v; 84139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 85139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley v = omap2_prm_read_mod_reg(domain, idx); 86139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley v &= mask; 87139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley v >>= __ffs(mask); 88139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 89139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley return v; 90139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley} 91139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 92139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsleystatic inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) 93139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley{ 94139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx); 95139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley} 96139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley 97139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsleystatic inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) 98139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley{ 99139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx); 100139563ad27e7baad7935b8113940f0d804cf513bPaul Walmsley} 10159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 10259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* These omap2_ PRM functions apply to both OMAP2 and 3 */ 10359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsleyextern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); 10459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsleyextern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); 105cc1226e7635011c7dd1e786770ed51ee751800f2omar ramirezextern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); 10659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 107498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); 108498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm); 109498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm); 110498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, 111498153995b9ff41279be54fc56facb92f5cad793Paul Walmsley u8 pwrst); 112498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, 113498153995b9ff41279be54fc56facb92f5cad793Paul Walmsley u8 pwrst); 114498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); 115498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); 116498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); 117498153995b9ff41279be54fc56facb92f5cad793Paul Walmsleyextern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm); 118498153995b9ff41279be54fc56facb92f5cad793Paul Walmsley 1194bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsleyextern int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, 1204bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsley struct clockdomain *clkdm2); 1214bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsleyextern int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, 1224bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsley struct clockdomain *clkdm2); 1234bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsleyextern int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, 1244bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsley struct clockdomain *clkdm2); 1254bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsleyextern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); 1264bd5259e53accda0fe295d3b25da348f4d5f4b09Paul Walmsley 127a5ebba6b54bc8038a38d3eacac3a79bbeaf3ee24Linus Torvalds#endif /* __ASSEMBLER */ 12859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 12959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 13059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Bits common to specific registers 13159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 13259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * The 3430 register and bit names are generally used, 13359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * since they tend to make more sense 13459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 13559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 13659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PM_EVGENONTIM_MPU */ 13759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Named PM_EVEGENONTIM_MPU on the 24XX */ 13859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_ONTIMEVAL_SHIFT 0 13959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_ONTIMEVAL_MASK (0xffffffff << 0) 14059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 14159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PM_EVGENOFFTIM_MPU */ 14259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Named PM_EVEGENOFFTIM_MPU on the 24XX */ 14359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_OFFTIMEVAL_SHIFT 0 14459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_OFFTIMEVAL_MASK (0xffffffff << 0) 14559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 14659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PRM_CLKSETUP and PRCM_VOLTSETUP */ 14759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Named PRCM_CLKSSETUP on the 24XX */ 14859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_SETUP_TIME_SHIFT 0 14959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_SETUP_TIME_MASK (0xffff << 0) 15059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 15159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PRM_CLKSRC_CTRL */ 15259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Named PRCM_CLKSRC_CTRL on the 24XX */ 15359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_SYSCLKDIV_SHIFT 6 15459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_SYSCLKDIV_MASK (0x3 << 6) 15599e7938def490ea68e201578a83cff6248217891Rajendra Nayak#define OMAP_SYSCLKDIV_WIDTH 2 15659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_AUTOEXTCLKMODE_SHIFT 3 15759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_AUTOEXTCLKMODE_MASK (0x3 << 3) 15859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_SYSCLKSEL_SHIFT 0 15959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_SYSCLKSEL_MASK (0x3 << 0) 16059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 16159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PM_EVGENCTRL_MPU */ 16259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_OFFLOADMODE_SHIFT 3 16359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_OFFLOADMODE_MASK (0x3 << 3) 16459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_ONLOADMODE_SHIFT 1 16559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_ONLOADMODE_MASK (0x3 << 1) 16659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_ENABLE_MASK (1 << 0) 16759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 16859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PRM_RSTTIME */ 16959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Named RM_RSTTIME_WKUP on the 24xx */ 17059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_RSTTIME2_SHIFT 8 17159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_RSTTIME2_MASK (0x1f << 8) 17259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_RSTTIME1_SHIFT 0 17359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_RSTTIME1_MASK (0xff << 0) 17459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 17559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* PRM_RSTCTRL */ 17659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* Named RM_RSTCTRL_WKUP on the 24xx */ 17759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 2420 calls RST_DPLL3 'RST_DPLL' */ 17859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_RST_DPLL3_MASK (1 << 2) 17959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_RST_GS_MASK (1 << 1) 18059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 18159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 18259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 18359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Bits common to module-shared registers 18459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 18559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * Not all registers of a particular type support all of these bits - 18659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * check TRM if you are unsure 18759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 18859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 18959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 19059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 24XX: RM_RSTST_MPU and RM_RSTST_DSP - on 24XX, 'COREDOMAINWKUP_RST' is 19159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * called 'COREWKUP_RST' 19259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 19359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 3430: RM_RSTST_IVA2, RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSS, 19459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * RM_RSTST_CAM, RM_RSTST_PER, RM_RSTST_NEON 19559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 19659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_COREDOMAINWKUP_RST_MASK (1 << 3) 19759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 19859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 19959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 24XX: RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSP 20059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 20159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2430: RM_RSTST_MDM 20259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 20359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 3430: RM_RSTST_CORE, RM_RSTST_EMU 20459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 20559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_DOMAINWKUP_RST_MASK (1 << 2) 20659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 20759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 20859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 24XX: RM_RSTST_MPU, RM_RSTST_WKUP, RM_RSTST_DSP 20959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * On 24XX, 'GLOBALWARM_RST' is called 'GLOBALWMPU_RST'. 21059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 21159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2430: RM_RSTST_MDM 21259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 21359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 3430: RM_RSTST_CORE, RM_RSTST_EMU 21459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 2152bb2a5d30abb0dc99d074877bfad2056142c730bPaul Walmsley#define OMAP_GLOBALWARM_RST_SHIFT 1 21659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_GLOBALWARM_RST_MASK (1 << 1) 2172bb2a5d30abb0dc99d074877bfad2056142c730bPaul Walmsley#define OMAP_GLOBALCOLD_RST_SHIFT 0 21859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_GLOBALCOLD_RST_MASK (1 << 0) 21959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 22059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 22159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 24XX: PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_CORE, PM_WKDEP_DSP 22259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2420 TRM sometimes uses "EN_WAKEUP" instead of "EN_WKUP" 22359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 22459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2430: PM_WKDEP_MDM 22559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 22659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM, 22759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * PM_WKDEP_PER 22859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 22959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_EN_WKUP_SHIFT 4 23059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_EN_WKUP_MASK (1 << 4) 23159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 23259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley/* 23359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, 23459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * PM_PWSTCTRL_DSP 23559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 23659fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 2430: PM_PWSTCTRL_MDM 23759fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 23859fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, 23959fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER, 24059fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley * PM_PWSTCTRL_NEON 24159fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley */ 24259fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#define OMAP_LOGICRETSTATE_MASK (1 << 2) 24359fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 24459fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley 24559fb659b065f52fcc2deed293cfbfc58f890376cPaul Walmsley#endif 246