common.c revision d236f5a5f77183c270223e8816804e7763463282 
1/*
2 * arch/arm/mach-orion5x/common.c
3 *
4 * Core functions for Marvell Orion 5x SoCs
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2.  This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
17#include <linux/mbus.h>
18#include <linux/mv643xx_eth.h>
19#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h>
21#include <asm/page.h>
22#include <asm/setup.h>
23#include <asm/timex.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/mach/time.h>
27#include <asm/arch/hardware.h>
28#include <asm/arch/orion5x.h>
29#include <asm/plat-orion/ehci-orion.h>
30#include <asm/plat-orion/orion_nand.h>
31#include <asm/plat-orion/time.h>
32#include "common.h"
33
34/*****************************************************************************
35 * I/O Address Mapping
36 ****************************************************************************/
37static struct map_desc orion5x_io_desc[] __initdata = {
38	{
39		.virtual	= ORION5X_REGS_VIRT_BASE,
40		.pfn		= __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
41		.length		= ORION5X_REGS_SIZE,
42		.type		= MT_DEVICE
43	},
44	{
45		.virtual	= ORION5X_PCIE_IO_VIRT_BASE,
46		.pfn		= __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
47		.length		= ORION5X_PCIE_IO_SIZE,
48		.type		= MT_DEVICE
49	},
50	{
51		.virtual	= ORION5X_PCI_IO_VIRT_BASE,
52		.pfn		= __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
53		.length		= ORION5X_PCI_IO_SIZE,
54		.type		= MT_DEVICE
55	},
56	{
57		.virtual	= ORION5X_PCIE_WA_VIRT_BASE,
58		.pfn		= __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
59		.length		= ORION5X_PCIE_WA_SIZE,
60		.type		= MT_DEVICE
61	},
62};
63
64void __init orion5x_map_io(void)
65{
66	iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
67}
68
69/*****************************************************************************
70 * UART
71 ****************************************************************************/
72
73static struct resource orion5x_uart_resources[] = {
74	{
75		.start		= UART0_PHYS_BASE,
76		.end		= UART0_PHYS_BASE + 0xff,
77		.flags		= IORESOURCE_MEM,
78	},
79	{
80		.start		= IRQ_ORION5X_UART0,
81		.end		= IRQ_ORION5X_UART0,
82		.flags		= IORESOURCE_IRQ,
83	},
84	{
85		.start		= UART1_PHYS_BASE,
86		.end		= UART1_PHYS_BASE + 0xff,
87		.flags		= IORESOURCE_MEM,
88	},
89	{
90		.start		= IRQ_ORION5X_UART1,
91		.end		= IRQ_ORION5X_UART1,
92		.flags		= IORESOURCE_IRQ,
93	},
94};
95
96static struct plat_serial8250_port orion5x_uart_data[] = {
97	{
98		.mapbase	= UART0_PHYS_BASE,
99		.membase	= (char *)UART0_VIRT_BASE,
100		.irq		= IRQ_ORION5X_UART0,
101		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
102		.iotype		= UPIO_MEM,
103		.regshift	= 2,
104		.uartclk	= ORION5X_TCLK,
105	},
106	{
107		.mapbase	= UART1_PHYS_BASE,
108		.membase	= (char *)UART1_VIRT_BASE,
109		.irq		= IRQ_ORION5X_UART1,
110		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
111		.iotype		= UPIO_MEM,
112		.regshift	= 2,
113		.uartclk	= ORION5X_TCLK,
114	},
115	{ },
116};
117
118static struct platform_device orion5x_uart = {
119	.name			= "serial8250",
120	.id			= PLAT8250_DEV_PLATFORM,
121	.dev			= {
122		.platform_data	= orion5x_uart_data,
123	},
124	.resource		= orion5x_uart_resources,
125	.num_resources		= ARRAY_SIZE(orion5x_uart_resources),
126};
127
128/*******************************************************************************
129 * USB Controller - 2 interfaces
130 ******************************************************************************/
131
132static struct resource orion5x_ehci0_resources[] = {
133	{
134		.start	= ORION5X_USB0_PHYS_BASE,
135		.end	= ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
136		.flags	= IORESOURCE_MEM,
137	},
138	{
139		.start	= IRQ_ORION5X_USB0_CTRL,
140		.end	= IRQ_ORION5X_USB0_CTRL,
141		.flags	= IORESOURCE_IRQ,
142	},
143};
144
145static struct resource orion5x_ehci1_resources[] = {
146	{
147		.start	= ORION5X_USB1_PHYS_BASE,
148		.end	= ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
149		.flags	= IORESOURCE_MEM,
150	},
151	{
152		.start	= IRQ_ORION5X_USB1_CTRL,
153		.end	= IRQ_ORION5X_USB1_CTRL,
154		.flags	= IORESOURCE_IRQ,
155	},
156};
157
158static struct orion_ehci_data orion5x_ehci_data = {
159	.dram		= &orion5x_mbus_dram_info,
160};
161
162static u64 ehci_dmamask = 0xffffffffUL;
163
164static struct platform_device orion5x_ehci0 = {
165	.name		= "orion-ehci",
166	.id		= 0,
167	.dev		= {
168		.dma_mask		= &ehci_dmamask,
169		.coherent_dma_mask	= 0xffffffff,
170		.platform_data		= &orion5x_ehci_data,
171	},
172	.resource	= orion5x_ehci0_resources,
173	.num_resources	= ARRAY_SIZE(orion5x_ehci0_resources),
174};
175
176static struct platform_device orion5x_ehci1 = {
177	.name		= "orion-ehci",
178	.id		= 1,
179	.dev		= {
180		.dma_mask		= &ehci_dmamask,
181		.coherent_dma_mask	= 0xffffffff,
182		.platform_data		= &orion5x_ehci_data,
183	},
184	.resource	= orion5x_ehci1_resources,
185	.num_resources	= ARRAY_SIZE(orion5x_ehci1_resources),
186};
187
188/*****************************************************************************
189 * Gigabit Ethernet port
190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
191 ****************************************************************************/
192
193struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
194	.dram		= &orion5x_mbus_dram_info,
195};
196
197static struct resource orion5x_eth_shared_resources[] = {
198	{
199		.start	= ORION5X_ETH_PHYS_BASE + 0x2000,
200		.end	= ORION5X_ETH_PHYS_BASE + 0x3fff,
201		.flags	= IORESOURCE_MEM,
202	},
203};
204
205static struct platform_device orion5x_eth_shared = {
206	.name		= MV643XX_ETH_SHARED_NAME,
207	.id		= 0,
208	.dev		= {
209		.platform_data	= &orion5x_eth_shared_data,
210	},
211	.num_resources	= 1,
212	.resource	= orion5x_eth_shared_resources,
213};
214
215static struct resource orion5x_eth_resources[] = {
216	{
217		.name	= "eth irq",
218		.start	= IRQ_ORION5X_ETH_SUM,
219		.end	= IRQ_ORION5X_ETH_SUM,
220		.flags	= IORESOURCE_IRQ,
221	}
222};
223
224static struct platform_device orion5x_eth = {
225	.name		= MV643XX_ETH_NAME,
226	.id		= 0,
227	.num_resources	= 1,
228	.resource	= orion5x_eth_resources,
229};
230
231void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
232{
233	eth_data->shared = &orion5x_eth_shared;
234	orion5x_eth.dev.platform_data = eth_data;
235
236	platform_device_register(&orion5x_eth_shared);
237	platform_device_register(&orion5x_eth);
238}
239
240/*****************************************************************************
241 * I2C controller
242 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
243 ****************************************************************************/
244
245static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
246	.freq_m		= 8, /* assumes 166 MHz TCLK */
247	.freq_n		= 3,
248	.timeout	= 1000, /* Default timeout of 1 second */
249};
250
251static struct resource orion5x_i2c_resources[] = {
252	{
253		.name   = "i2c base",
254		.start  = I2C_PHYS_BASE,
255		.end    = I2C_PHYS_BASE + 0x20 -1,
256		.flags  = IORESOURCE_MEM,
257	},
258	{
259		.name   = "i2c irq",
260		.start  = IRQ_ORION5X_I2C,
261		.end    = IRQ_ORION5X_I2C,
262		.flags  = IORESOURCE_IRQ,
263	},
264};
265
266static struct platform_device orion5x_i2c = {
267	.name		= MV64XXX_I2C_CTLR_NAME,
268	.id		= 0,
269	.num_resources	= ARRAY_SIZE(orion5x_i2c_resources),
270	.resource	= orion5x_i2c_resources,
271	.dev		= {
272		.platform_data = &orion5x_i2c_pdata,
273	},
274};
275
276/*****************************************************************************
277 * Sata port
278 ****************************************************************************/
279static struct resource orion5x_sata_resources[] = {
280        {
281                .name   = "sata base",
282                .start  = ORION5X_SATA_PHYS_BASE,
283                .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
284                .flags  = IORESOURCE_MEM,
285        },
286	{
287                .name   = "sata irq",
288                .start  = IRQ_ORION5X_SATA,
289                .end    = IRQ_ORION5X_SATA,
290                .flags  = IORESOURCE_IRQ,
291        },
292};
293
294static struct platform_device orion5x_sata = {
295	.name           = "sata_mv",
296	.id             = 0,
297	.dev		= {
298		.coherent_dma_mask	= 0xffffffff,
299	},
300	.num_resources  = ARRAY_SIZE(orion5x_sata_resources),
301	.resource       = orion5x_sata_resources,
302};
303
304void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
305{
306	sata_data->dram = &orion5x_mbus_dram_info;
307	orion5x_sata.dev.platform_data = sata_data;
308	platform_device_register(&orion5x_sata);
309}
310
311/*****************************************************************************
312 * Time handling
313 ****************************************************************************/
314
315static void orion5x_timer_init(void)
316{
317	orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
318}
319
320struct sys_timer orion5x_timer = {
321        .init = orion5x_timer_init,
322};
323
324/*****************************************************************************
325 * General
326 ****************************************************************************/
327
328/*
329 * Identify device ID and rev from PCIe configuration header space '0'.
330 */
331static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
332{
333	orion5x_pcie_id(dev, rev);
334
335	if (*dev == MV88F5281_DEV_ID) {
336		if (*rev == MV88F5281_REV_D2) {
337			*dev_name = "MV88F5281-D2";
338		} else if (*rev == MV88F5281_REV_D1) {
339			*dev_name = "MV88F5281-D1";
340		} else {
341			*dev_name = "MV88F5281-Rev-Unsupported";
342		}
343	} else if (*dev == MV88F5182_DEV_ID) {
344		if (*rev == MV88F5182_REV_A2) {
345			*dev_name = "MV88F5182-A2";
346		} else {
347			*dev_name = "MV88F5182-Rev-Unsupported";
348		}
349	} else if (*dev == MV88F5181_DEV_ID) {
350		if (*rev == MV88F5181_REV_B1) {
351			*dev_name = "MV88F5181-Rev-B1";
352		} else {
353			*dev_name = "MV88F5181-Rev-Unsupported";
354		}
355	} else {
356		*dev_name = "Device-Unknown";
357	}
358}
359
360void __init orion5x_init(void)
361{
362	char *dev_name;
363	u32 dev, rev;
364
365	orion5x_id(&dev, &rev, &dev_name);
366	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
367
368	/*
369	 * Setup Orion address map
370	 */
371	orion5x_setup_cpu_mbus_bridge();
372
373	/*
374	 * Register devices.
375	 */
376	platform_device_register(&orion5x_uart);
377	platform_device_register(&orion5x_ehci0);
378	if (dev == MV88F5182_DEV_ID)
379		platform_device_register(&orion5x_ehci1);
380	platform_device_register(&orion5x_i2c);
381}
382
383/*
384 * Many orion-based systems have buggy bootloader implementations.
385 * This is a common fixup for bogus memory tags.
386 */
387void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
388			    char **from, struct meminfo *meminfo)
389{
390	for (; t->hdr.size; t = tag_next(t))
391		if (t->hdr.tag == ATAG_MEM &&
392		    (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
393		     t->u.mem.start & ~PAGE_MASK)) {
394			printk(KERN_WARNING
395			       "Clearing invalid memory bank %dKB@0x%08x\n",
396			       t->u.mem.size / 1024, t->u.mem.start);
397			t->hdr.tag = 0;
398		}
399}
400