104fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#ifndef __ASM_ARCH_RESET_H 204fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#define __ASM_ARCH_RESET_H 304fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao 404fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#include "hardware.h" 504fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao 604fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */ 704fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */ 804fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#define RESET_STATUS_LOWPOWER (1 << 2) /* Exit from Low Power/Sleep */ 904fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */ 1004fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#define RESET_STATUS_ALL (0xf) 1104fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao 1204fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miaoextern unsigned int reset_status; 1304fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miaostatic inline void clear_reset_status(unsigned int mask) 1404fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao{ 1504fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao RCSR = mask; 1604fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao} 1704fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao 1804fef228fb00dd79475a2313f4ba73b4fbfe2faaEric Miao#endif /* __ASM_ARCH_RESET_H */ 19