cpu-db8500.c revision 5caecb44704657b9587977eb87a397f9b25cabbc 
1/*
2 * Copyright (C) 2008-2009 ST-Ericsson SA
3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/amba/bus.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/mfd/abx500/ab8500.h>
20
21#include <asm/pmu.h>
22#include <asm/mach/map.h>
23#include <asm/pmu.h>
24#include <plat/gpio-nomadik.h>
25#include <mach/hardware.h>
26#include <mach/setup.h>
27#include <mach/devices.h>
28#include <mach/usb.h>
29#include <mach/db8500-regs.h>
30
31#include "devices-db8500.h"
32#include "ste-dma40-db8500.h"
33
34/* minimum static i/o mapping required to boot U8500 platforms */
35static struct map_desc u8500_uart_io_desc[] __initdata = {
36	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
37	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
38};
39/*  U8500 and U9540 common io_desc */
40static struct map_desc u8500_common_io_desc[] __initdata = {
41	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
42	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
43	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
44	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
45	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
46	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
47
48	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
49	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
50	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
51	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
52	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
53
54	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
55	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
56	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
57	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
58};
59
60/* U8500 IO map specific description */
61static struct map_desc u8500_io_desc[] __initdata = {
62	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
63	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
64
65};
66
67/* U9540 IO map specific description */
68static struct map_desc u9540_io_desc[] __initdata = {
69	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
70	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
71};
72
73void __init u8500_map_io(void)
74{
75	/*
76	 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
77	 */
78	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
79
80	ux500_map_io();
81
82	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
83
84	if (cpu_is_u9540())
85		iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
86	else
87		iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
88
89	_PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
90}
91
92static struct resource db8500_pmu_resources[] = {
93	[0] = {
94		.start		= IRQ_DB8500_PMU,
95		.end		= IRQ_DB8500_PMU,
96		.flags		= IORESOURCE_IRQ,
97	},
98};
99
100/*
101 * The PMU IRQ lines of two cores are wired together into a single interrupt.
102 * Bounce the interrupt to the other core if it's not ours.
103 */
104static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
105{
106	irqreturn_t ret = handler(irq, dev);
107	int other = !smp_processor_id();
108
109	if (ret == IRQ_NONE && cpu_online(other))
110		irq_set_affinity(irq, cpumask_of(other));
111
112	/*
113	 * We should be able to get away with the amount of IRQ_NONEs we give,
114	 * while still having the spurious IRQ detection code kick in if the
115	 * interrupt really starts hitting spuriously.
116	 */
117	return ret;
118}
119
120struct arm_pmu_platdata db8500_pmu_platdata = {
121	.handle_irq		= db8500_pmu_handler,
122};
123
124static struct platform_device db8500_pmu_device = {
125	.name			= "arm-pmu",
126	.id			= ARM_PMU_DEVICE_CPU,
127	.num_resources		= ARRAY_SIZE(db8500_pmu_resources),
128	.resource		= db8500_pmu_resources,
129	.dev.platform_data	= &db8500_pmu_platdata,
130};
131
132static struct platform_device db8500_prcmu_device = {
133	.name			= "db8500-prcmu",
134};
135
136static struct platform_device *platform_devs[] __initdata = {
137	&u8500_dma40_device,
138	&db8500_pmu_device,
139	&db8500_prcmu_device,
140};
141
142static struct platform_device *of_platform_devs[] __initdata = {
143	&u8500_dma40_device,
144};
145
146static resource_size_t __initdata db8500_gpio_base[] = {
147	U8500_GPIOBANK0_BASE,
148	U8500_GPIOBANK1_BASE,
149	U8500_GPIOBANK2_BASE,
150	U8500_GPIOBANK3_BASE,
151	U8500_GPIOBANK4_BASE,
152	U8500_GPIOBANK5_BASE,
153	U8500_GPIOBANK6_BASE,
154	U8500_GPIOBANK7_BASE,
155	U8500_GPIOBANK8_BASE,
156};
157
158static void __init db8500_add_gpios(struct device *parent)
159{
160	struct nmk_gpio_platform_data pdata = {
161		.supports_sleepmode = true,
162	};
163
164	dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
165			 IRQ_DB8500_GPIO0, &pdata);
166	dbx500_add_pinctrl(parent, "pinctrl-db8500");
167}
168
169static int usb_db8500_rx_dma_cfg[] = {
170	DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
171	DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
172	DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
173	DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
174	DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
175	DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
176	DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
177	DB8500_DMA_DEV39_USB_OTG_IEP_8
178};
179
180static int usb_db8500_tx_dma_cfg[] = {
181	DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
182	DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
183	DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
184	DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
185	DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
186	DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
187	DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
188	DB8500_DMA_DEV39_USB_OTG_OEP_8
189};
190
191static const char *db8500_read_soc_id(void)
192{
193	void __iomem *uid = __io_address(U8500_BB_UID_BASE);
194
195	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
196			 readl((u32 *)uid+1),
197			 readl((u32 *)uid+1), readl((u32 *)uid+2),
198			 readl((u32 *)uid+3), readl((u32 *)uid+4));
199}
200
201static struct device * __init db8500_soc_device_init(void)
202{
203	const char *soc_id = db8500_read_soc_id();
204
205	return ux500_soc_device_init(soc_id);
206}
207
208/*
209 * This function is called from the board init
210 */
211struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
212{
213	struct device *parent;
214	int i;
215
216	parent = db8500_soc_device_init();
217
218	db8500_add_rtc(parent);
219	db8500_add_gpios(parent);
220	db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
221
222	platform_device_register_data(parent,
223		"cpufreq-u8500", -1, NULL, 0);
224
225	for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
226		platform_devs[i]->dev.parent = parent;
227
228	db8500_prcmu_device.dev.platform_data = ab8500;
229
230	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
231
232	return parent;
233}
234
235/* TODO: Once all pieces are DT:ed, remove completely. */
236struct device * __init u8500_of_init_devices(void)
237{
238	struct device *parent;
239	int i;
240
241	parent = db8500_soc_device_init();
242
243	db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
244
245	platform_device_register_data(parent,
246		"cpufreq-u8500", -1, NULL, 0);
247
248	for (i = 0; i < ARRAY_SIZE(of_platform_devs); i++)
249		of_platform_devs[i]->dev.parent = parent;
250
251	/*
252	 * Devices to be DT:ed:
253	 *   u8500_dma40_device  = todo
254	 *   db8500_pmu_device   = done
255	 *   db8500_prcmu_device = done
256	 */
257	platform_add_devices(of_platform_devs, ARRAY_SIZE(of_platform_devs));
258
259	return parent;
260}
261