cpu-db8500.c revision fcbd458e95316fe5031f1b8eaf5e66ce8f3c3146
1/* 2 * Copyright (C) 2008-2009 ST-Ericsson 3 * 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2, as 8 * published by the Free Software Foundation. 9 * 10 */ 11#include <linux/types.h> 12#include <linux/init.h> 13#include <linux/device.h> 14#include <linux/amba/bus.h> 15#include <linux/irq.h> 16#include <linux/gpio.h> 17#include <linux/platform_device.h> 18#include <linux/io.h> 19 20#include <asm/mach/map.h> 21#include <mach/hardware.h> 22#include <mach/setup.h> 23#include <mach/devices.h> 24 25#include "devices-db8500.h" 26 27static struct platform_device *platform_devs[] __initdata = { 28 &u8500_gpio_devs[0], 29 &u8500_gpio_devs[1], 30 &u8500_gpio_devs[2], 31 &u8500_gpio_devs[3], 32 &u8500_gpio_devs[4], 33 &u8500_gpio_devs[5], 34 &u8500_gpio_devs[6], 35 &u8500_gpio_devs[7], 36 &u8500_gpio_devs[8], 37 &u8500_dma40_device, 38}; 39 40/* minimum static i/o mapping required to boot U8500 platforms */ 41static struct map_desc u8500_io_desc[] __initdata = { 42 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 43 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 44 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 45 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 46 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 47 __MEM_DEV_DESC(U8500_BOOT_ROM_BASE, SZ_1M), 48}; 49 50static struct map_desc u8500_ed_io_desc[] __initdata = { 51 __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K), 52 __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K), 53}; 54 55static struct map_desc u8500_v1_io_desc[] __initdata = { 56 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 57 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE_V1, SZ_4K), 58}; 59 60static struct map_desc u8500_v2_io_desc[] __initdata = { 61 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 62}; 63 64/* 65 * Functions to differentiate between later ASICs 66 * We look into the end of the ROM to locate the hardcoded ASIC ID. 67 * This is only needed to differentiate between minor revisions and 68 * process variants of an ASIC, the major revisions are encoded in 69 * the cpuid. 70 */ 71#define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOT_ROM_BASE + 0x1FFF4) 72#define U8500_ASIC_ID_LOC_V2 (U8500_BOOT_ROM_BASE + 0x1DBF4) 73#define U8500_ASIC_REV_ED 0x01 74#define U8500_ASIC_REV_V10 0xA0 75#define U8500_ASIC_REV_V11 0xA1 76#define U8500_ASIC_REV_V20 0xB0 77 78/** 79 * struct db8500_asic_id - fields of the ASIC ID 80 * @process: the manufacturing process, 0x40 is 40 nm 81 * 0x00 is "standard" 82 * @partnumber: hithereto 0x8500 for DB8500 83 * @revision: version code in the series 84 * This field definion is not formally defined but makes 85 * sense. 86 */ 87struct db8500_asic_id { 88 u8 process; 89 u16 partnumber; 90 u8 revision; 91}; 92 93/* This isn't going to change at runtime */ 94static struct db8500_asic_id db8500_id; 95 96static void __init get_db8500_asic_id(void) 97{ 98 u32 asicid; 99 100 if (cpu_is_u8500v1() || cpu_is_u8500ed()) 101 asicid = readl(__io_address(U8500_ASIC_ID_LOC_ED_V1)); 102 else if (cpu_is_u8500v2()) 103 asicid = readl(__io_address(U8500_ASIC_ID_LOC_V2)); 104 else 105 BUG(); 106 107 db8500_id.process = (asicid >> 24); 108 db8500_id.partnumber = (asicid >> 16) & 0xFFFFU; 109 db8500_id.revision = asicid & 0xFFU; 110} 111 112bool cpu_is_u8500v10(void) 113{ 114 return (db8500_id.revision == U8500_ASIC_REV_V10); 115} 116 117bool cpu_is_u8500v11(void) 118{ 119 return (db8500_id.revision == U8500_ASIC_REV_V11); 120} 121 122bool cpu_is_u8500v20(void) 123{ 124 return (db8500_id.revision == U8500_ASIC_REV_V20); 125} 126 127void __init u8500_map_io(void) 128{ 129 ux500_map_io(); 130 131 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 132 133 if (cpu_is_u8500ed()) 134 iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc)); 135 else if (cpu_is_u8500v1()) 136 iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc)); 137 else if (cpu_is_u8500v2()) 138 iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc)); 139 140 /* Read out the ASIC ID as early as we can */ 141 get_db8500_asic_id(); 142} 143 144/* 145 * This function is called from the board init 146 */ 147void __init u8500_init_devices(void) 148{ 149 /* Display some ASIC boilerplate */ 150 pr_info("DB8500: process: %02x, revision ID: 0x%02x\n", 151 db8500_id.process, db8500_id.revision); 152 if (cpu_is_u8500ed()) 153 pr_info("DB8500: Early Drop (ED)\n"); 154 else if (cpu_is_u8500v10()) 155 pr_info("DB8500: version 1.0\n"); 156 else if (cpu_is_u8500v11()) 157 pr_info("DB8500: version 1.1\n"); 158 else if (cpu_is_u8500v20()) 159 pr_info("DB8500: version 2.0\n"); 160 else 161 pr_warning("ASIC: UNKNOWN SILICON VERSION!\n"); 162 163 if (cpu_is_u8500ed()) 164 dma40_u8500ed_fixup(); 165 166 db8500_add_rtc(); 167 168 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 169 170 return ; 171} 172