196f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz/* 296f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * Copyright 2007-2009 Analog Devices Inc. 396f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * 496f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * Licensed under the GPL-2 or later 596f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz */ 696f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz 7590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#ifndef _MACH_PORTMUX_H_ 8590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define _MACH_PORTMUX_H_ 9590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 10812ae98f0849fbceb32c6d21bcdda42b40264c82Mike Frysinger#define MAX_RESOURCES MAX_BLACKFIN_GPIOS 11fac3cf432ef9b6bfd64b35b95afe0b7e0079da74Michael Hennerich 12590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0)) 13590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0)) 14590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0)) 15590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D3 (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(0)) 16590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D4 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(0)) 17590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D5 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(0)) 18590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D6 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(0)) 19590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D7 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(0)) 20590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D8 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0)) 21590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D9 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0)) 22590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D10 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(0)) 23590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D11 (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0)) 24590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D12 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0)) 25590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0)) 26590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0)) 27590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0)) 28590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 29590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#if defined(CONFIG_BF527_SPORT0_PORTF) 30590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1)) 31590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_RFS (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1)) 32590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1)) 33590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1)) 34590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_TFS (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1)) 35590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1)) 36590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DTSEC (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1)) 37590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DRSEC (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1)) 38590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#elif defined(CONFIG_BF527_SPORT0_PORTG) 39590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0)) 40590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DRSEC (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1)) 41590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DTSEC (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1)) 42590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1)) 43590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_RFS (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(1)) 44590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(1)) 45590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#if defined(CONFIG_BF527_SPORT0_TSCLK_PG10) 46590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(1)) 47590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#elif defined(CONFIG_BF527_SPORT0_TSCLK_PG14) 48590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0)) 49590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#endif 50590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT0_TFS (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0)) 51590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#endif 52590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 53590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_DRPRI (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1)) 54590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_RSCLK (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) 55590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_RFS (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1)) 56590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_TFS (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1)) 57590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_DTPRI (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1)) 58590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_TSCLK (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1)) 59590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_DTSEC (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) 60590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPORT1_DRSEC (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) 61590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 62590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL6 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(2)) 63590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(2)) 64590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 65590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2)) 66590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2)) 67590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 68590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#if defined(CONFIG_BF527_UART1_PORTF) 69590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2)) 70590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2)) 71590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#elif defined(CONFIG_BF527_UART1_PORTG) 72590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1)) 73590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1)) 74590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#endif 75590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 76aca5e4aac88a0ee84e9dc63e3d4189adbaef24caMichael Hennerich#define P_CNT_CZM (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(3)) 77aca5e4aac88a0ee84e9dc63e3d4189adbaef24caMichael Hennerich#define P_CNT_CDG (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(3)) 78aca5e4aac88a0ee84e9dc63e3d4189adbaef24caMichael Hennerich#define P_CNT_CUD (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(3)) 79aca5e4aac88a0ee84e9dc63e3d4189adbaef24caMichael Hennerich 80590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HWAIT (P_DONTCARE) 81590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 82306208f40cde5f835e891976031571b81815b9dfMike Frysinger#define GPIO_DEFAULT_BOOT_SPI_CS GPIO_PG1 83b52dae3139066765a7d96563e9cd33d9e60efe33Sonic Zhang#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 84b52dae3139066765a7d96563e9cd33d9e60efe33Sonic Zhang 85590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) 86590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2)) 87590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2)) 88590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(2)) 89590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(2)) 90590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0)) 91590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0)) 92590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0)) 93590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0)) 94590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR5 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0)) 95590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR6 (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0)) 96590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich/* #define P_TMR7 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0)) */ 97590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_DMAR1 (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0)) 98590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_DMAR0 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0)) 99590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1)) 100590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR7 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1)) 101590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MDC (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1)) 102590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_RMII0_MDINT (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1)) 103590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_PHYINT (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1)) 104590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 105590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2)) 106590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(2)) 107590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(2)) 108590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 109590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_WR (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) 110590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_ACK (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(2)) 111590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_ADDR (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(2)) 112590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_RD (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(2)) 113590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_CE (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(2)) 114590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 115590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#if defined(CONFIG_BF527_NAND_D_PORTF) 116590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(2)) 117590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2)) 118590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2)) 119590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D3 (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2)) 120590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D4 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2)) 121590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D5 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2)) 122590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D6 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2)) 123590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D7 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2)) 124590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#elif defined(CONFIG_BF527_NAND_D_PORTH) 125590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D0 (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(0)) 126590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D1 (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(0)) 127590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D2 (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(0)) 128590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D3 (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(0)) 129590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D4 (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(0)) 130590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D5 (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(0)) 131590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D6 (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(0)) 132590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_D7 (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(0)) 133590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#endif 134590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 135590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(0)) 136590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_SPI0_SSEL5 (P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(0)) 137590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_CE (P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(0)) 138590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_WE (P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(0)) 139590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_RE (P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(0)) 140590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_RB (P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(0)) 141590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_CLE (P_DEFINED | P_IDENT(GPIO_PH14) | P_FUNCT(0)) 142590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_NAND_ALE (P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(0)) 143590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 144590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D0 (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(2)) 145590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D1 (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(2)) 146590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D2 (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(2)) 147590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D3 (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(2)) 148590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D4 (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(2)) 149590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D5 (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(2)) 150590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D6 (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(2)) 151590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D7 (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(2)) 152590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D8 (P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(2)) 153590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D9 (P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(2)) 154590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D10 (P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(2)) 155590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D11 (P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(2)) 156590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D12 (P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(2)) 157590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D13 (P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(2)) 158590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D14 (P_DEFINED | P_IDENT(GPIO_PH14) | P_FUNCT(2)) 159590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_HOST_D15 (P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(2)) 160590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 161590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ETxD0 (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(1)) 162590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ETxD1 (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(1)) 163590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ETxD2 (P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(1)) 164590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ETxD3 (P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(1)) 165590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ETxEN (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(1)) 166590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_TxCLK (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(1)) 167590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_COL (P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(1)) 168590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxD0 (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(1)) 169590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxD1 (P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(1)) 170590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxD2 (P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(1)) 171590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxD3 (P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(1)) 172590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxDV (P_DEFINED | P_IDENT(GPIO_PH14) | P_FUNCT(1)) 173590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxCLK (P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(1)) 174590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_ERxER (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(1)) 175590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0_CRS (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(1)) 176590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_RMII0_REF_CLK (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(1)) 177590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_RMII0_CRS_DV (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(1)) 178590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MDIO (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(1)) 179590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 180590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TWI0_SCL (P_DONTCARE) 181590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TWI0_SDA (P_DONTCARE) 182590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_FS1 (P_DONTCARE) 183590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMR0 (P_DONTCARE) 184590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_TMRCLK (P_DONTCARE) 185590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_PPI0_CLK (P_DONTCARE) 186590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 187590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_MII0 {\ 188590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxD0, \ 189590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxD1, \ 190590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxD2, \ 191590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxD3, \ 192590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxEN, \ 193590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_TxCLK, \ 194590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_PHYINT, \ 195590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_COL, \ 196590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxD0, \ 197590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxD1, \ 198590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxD2, \ 199590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxD3, \ 200590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxDV, \ 201590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxCLK, \ 202590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxER, \ 203590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_CRS, \ 204590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MDC, \ 205590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MDIO, 0} 206590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 207590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#define P_RMII0 {\ 208590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxD0, \ 209590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxD1, \ 210590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ETxEN, \ 211590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxD0, \ 212590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxD1, \ 213590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MII0_ERxER, \ 214590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_RMII0_REF_CLK, \ 215590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_RMII0_MDINT, \ 216590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_RMII0_CRS_DV, \ 217590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MDC, \ 218590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich P_MDIO, 0} 219590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich 220590031450a52c373bf72f5fb156fbcc0c78c6f2cMichael Hennerich#endif /* _MACH_PORTMUX_H_ */ 221