151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef __iop_scrc_out_defs_asm_h
251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define __iop_scrc_out_defs_asm_h
351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/*
551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik * This file is autogenerated from
651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *   file:           ../../inst/io_proc/rtl/iop_scrc_out.r
751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *     id:           iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *     last modfied: Mon Apr 11 16:08:46 2005
951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *
1051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_out_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_out.r
1151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *      id: $Id: iop_scrc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
1251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik * Any changes here will be lost.
1351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik *
1451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik * -*- buffer-read-only: t -*-
1551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik */
1651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
1751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_FIELD
1851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_FIELD( scope, reg, field, value ) \
1951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
2051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_FIELD_X_( value, shift ) ((value) << shift)
2151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
2251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
2351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_STATE
2451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_STATE( scope, reg, field, symbolic_value ) \
2551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
2651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_STATE_X_( k, shift ) (k << shift)
2751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
2851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
2951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_MASK
3051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_MASK( scope, reg, field ) \
3151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
3251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
3351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
3451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
3551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_LSB
3651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
3751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
3851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
3951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_BIT
4051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
4151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
4251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
4351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_ADDR
4451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
4551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
4651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
4751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
4851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#ifndef REG_ADDR_VECT
4951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_ADDR_VECT( scope, inst, reg, index ) \
5051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik         REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
5151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik			 STRIDE_##scope##_##reg )
5251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
5351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik                          ((inst) + offs + (index) * stride)
5451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif
5551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
5651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Register rw_cfg, scope iop_scrc_out, type rw */
5751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_cfg___trig___lsb 0
5851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_cfg___trig___width 2
5951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_cfg___inv_crc___lsb 2
6051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_cfg___inv_crc___width 1
6151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_cfg___inv_crc___bit 2
6251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_cfg_offset 0
6351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
6451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Register rw_ctrl, scope iop_scrc_out, type rw */
6551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl___strb_src___lsb 0
6651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl___strb_src___width 1
6751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl___strb_src___bit 0
6851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl___out_src___lsb 1
6951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl___out_src___width 1
7051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl___out_src___bit 1
7151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_ctrl_offset 4
7251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
7351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Register rw_init_crc, scope iop_scrc_out, type rw */
7451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_init_crc_offset 8
7551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
7651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Register rw_crc, scope iop_scrc_out, type rw */
7751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_crc_offset 12
7851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
7951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Register rw_data, scope iop_scrc_out, type rw */
8051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_data___val___lsb 0
8151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_data___val___width 1
8251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_data___val___bit 0
8351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_rw_data_offset 16
8451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
8551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Register r_computed_crc, scope iop_scrc_out, type r */
8651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define reg_iop_scrc_out_r_computed_crc_offset 20
8751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
8851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik
8951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik/* Constants */
9051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_crc                     0x00000001
9151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_data                    0x00000000
9251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_dif                     0x00000001
9351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_hi                      0x00000000
9451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_neg                     0x00000002
9551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_no                      0x00000000
9651533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_pos                     0x00000001
9751533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_pos_neg                 0x00000003
9851533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_reg                     0x00000000
9951533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_rw_cfg_default          0x00000000
10051533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_rw_crc_default          0x00000000
10151533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_rw_ctrl_default         0x00000000
10251533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_rw_data_default         0x00000000
10351533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_rw_init_crc_default     0x00000000
10451533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#define regk_iop_scrc_out_yes                     0x00000001
10551533b615e605d86154ec1b4e585c8ca1b0b15b7Mikael Starvik#endif /* __iop_scrc_out_defs_asm_h */
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