158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef __timer_defs_asm_h 258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define __timer_defs_asm_h 358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* 558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * This file is autogenerated from 658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * file: ../../inst/timer/rtl/timer_regs.r 758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp 858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * last modfied: Mon Apr 11 16:09:53 2005 958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * 1058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/timer_defs_asm.h ../../inst/timer/rtl/timer_regs.r 1158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * id: $Id: timer_defs_asm.h,v 1.1 2007/04/11 13:51:01 ricardw Exp $ 1258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * Any changes here will be lost. 1358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * 1458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson * -*- buffer-read-only: t -*- 1558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson */ 1658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 1758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_FIELD 1858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_FIELD( scope, reg, field, value ) \ 1958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb ) 2058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_FIELD_X_( value, shift ) ((value) << shift) 2158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 2258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 2358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_STATE 2458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_STATE( scope, reg, field, symbolic_value ) \ 2558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb ) 2658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_STATE_X_( k, shift ) (k << shift) 2758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 2858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 2958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_MASK 3058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_MASK( scope, reg, field ) \ 3158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb ) 3258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb) 3358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 3458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 3558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_LSB 3658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb 3758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 3858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 3958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_BIT 4058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit 4158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 4258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 4358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_ADDR 4458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) 4558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_ADDR_X_( inst, offs ) ((inst) + offs) 4658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 4758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 4858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#ifndef REG_ADDR_VECT 4958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_ADDR_VECT( scope, inst, reg, index ) \ 5058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \ 5158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson STRIDE_##scope##_##reg ) 5258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ 5358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson ((inst) + offs + (index) * stride) 5458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif 5558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 5658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_tmr0_div, scope timer, type rw */ 5758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr0_div_offset 0 5858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 5958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_tmr0_data, scope timer, type r */ 6058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_tmr0_data_offset 4 6158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 6258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_tmr0_ctrl, scope timer, type rw */ 6358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr0_ctrl___op___lsb 0 6458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr0_ctrl___op___width 2 6558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr0_ctrl___freq___lsb 2 6658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr0_ctrl___freq___width 3 6758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr0_ctrl_offset 8 6858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 6958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_tmr1_div, scope timer, type rw */ 7058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr1_div_offset 16 7158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 7258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_tmr1_data, scope timer, type r */ 7358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_tmr1_data_offset 20 7458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 7558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_tmr1_ctrl, scope timer, type rw */ 7658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr1_ctrl___op___lsb 0 7758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr1_ctrl___op___width 2 7858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr1_ctrl___freq___lsb 2 7958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr1_ctrl___freq___width 3 8058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_tmr1_ctrl_offset 24 8158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 8258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rs_cnt_data, scope timer, type rs */ 8358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rs_cnt_data___tmr___lsb 0 8458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rs_cnt_data___tmr___width 24 8558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rs_cnt_data___cnt___lsb 24 8658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rs_cnt_data___cnt___width 8 8758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rs_cnt_data_offset 32 8858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 8958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_cnt_data, scope timer, type r */ 9058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_cnt_data___tmr___lsb 0 9158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_cnt_data___tmr___width 24 9258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_cnt_data___cnt___lsb 24 9358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_cnt_data___cnt___width 8 9458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_cnt_data_offset 36 9558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 9658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_cnt_cfg, scope timer, type rw */ 9758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_cnt_cfg___clk___lsb 0 9858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_cnt_cfg___clk___width 2 9958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_cnt_cfg_offset 40 10058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 10158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_trig, scope timer, type rw */ 10258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_trig_offset 48 10358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 10458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_trig_cfg, scope timer, type rw */ 10558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_trig_cfg___tmr___lsb 0 10658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_trig_cfg___tmr___width 2 10758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_trig_cfg_offset 52 10858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 10958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_time, scope timer, type r */ 11058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_time_offset 56 11158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 11258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_out, scope timer, type rw */ 11358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_out___tmr___lsb 0 11458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_out___tmr___width 2 11558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_out_offset 60 11658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 11758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_wd_ctrl, scope timer, type rw */ 11858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___cnt___lsb 0 11958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___cnt___width 8 12058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___cmd___lsb 8 12158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___cmd___width 1 12258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___cmd___bit 8 12358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___key___lsb 9 12458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl___key___width 7 12558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_wd_ctrl_offset 64 12658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 12758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_wd_stat, scope timer, type r */ 12858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_wd_stat___cnt___lsb 0 12958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_wd_stat___cnt___width 8 13058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_wd_stat___cmd___lsb 8 13158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_wd_stat___cmd___width 1 13258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_wd_stat___cmd___bit 8 13358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_wd_stat_offset 68 13458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 13558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_intr_mask, scope timer, type rw */ 13658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___tmr0___lsb 0 13758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___tmr0___width 1 13858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___tmr0___bit 0 13958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___tmr1___lsb 1 14058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___tmr1___width 1 14158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___tmr1___bit 1 14258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___cnt___lsb 2 14358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___cnt___width 1 14458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___cnt___bit 2 14558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___trig___lsb 3 14658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___trig___width 1 14758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask___trig___bit 3 14858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_intr_mask_offset 72 14958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 15058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_ack_intr, scope timer, type rw */ 15158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___tmr0___lsb 0 15258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___tmr0___width 1 15358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___tmr0___bit 0 15458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___tmr1___lsb 1 15558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___tmr1___width 1 15658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___tmr1___bit 1 15758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___cnt___lsb 2 15858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___cnt___width 1 15958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___cnt___bit 2 16058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___trig___lsb 3 16158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___trig___width 1 16258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr___trig___bit 3 16358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_ack_intr_offset 76 16458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 16558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_intr, scope timer, type r */ 16658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___tmr0___lsb 0 16758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___tmr0___width 1 16858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___tmr0___bit 0 16958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___tmr1___lsb 1 17058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___tmr1___width 1 17158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___tmr1___bit 1 17258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___cnt___lsb 2 17358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___cnt___width 1 17458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___cnt___bit 2 17558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___trig___lsb 3 17658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___trig___width 1 17758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr___trig___bit 3 17858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_intr_offset 80 17958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 18058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register r_masked_intr, scope timer, type r */ 18158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___tmr0___lsb 0 18258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___tmr0___width 1 18358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___tmr0___bit 0 18458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___tmr1___lsb 1 18558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___tmr1___width 1 18658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___tmr1___bit 1 18758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___cnt___lsb 2 18858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___cnt___width 1 18958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___cnt___bit 2 19058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___trig___lsb 3 19158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___trig___width 1 19258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr___trig___bit 3 19358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_r_masked_intr_offset 84 19458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 19558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Register rw_test, scope timer, type rw */ 19658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test___dis___lsb 0 19758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test___dis___width 1 19858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test___dis___bit 0 19958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test___en___lsb 1 20058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test___en___width 1 20158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test___en___bit 1 20258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define reg_timer_rw_test_offset 88 20358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 20458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson 20558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson/* Constants */ 20658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_ext 0x00000001 20758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_f100 0x00000007 20858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_f29_493 0x00000004 20958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_f32 0x00000005 21058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_f32_768 0x00000006 21158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_hold 0x00000001 21258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_ld 0x00000000 21358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_no 0x00000000 21458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_off 0x00000000 21558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_run 0x00000002 21658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_cnt_cfg_default 0x00000000 21758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_intr_mask_default 0x00000000 21858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_out_default 0x00000000 21958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_test_default 0x00000000 22058d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_tmr0_ctrl_default 0x00000000 22158d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_tmr1_ctrl_default 0x00000000 22258d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_rw_trig_cfg_default 0x00000000 22358d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_start 0x00000001 22458d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_stop 0x00000000 22558d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_time 0x00000001 22658d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_tmr0 0x00000002 22758d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_tmr1 0x00000003 22858d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#define regk_timer_yes 0x00000001 22958d083192825c5fbd46fa0b1ff4d1ecc9118b692Jesper Nilsson#endif /* __timer_defs_asm_h */ 230