11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* head-uc-fr401.S: FR401/3/5 uc-linux specific bits of initialisation 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Written by David Howells (dhowells@redhat.com) 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This program is free software; you can redistribute it and/or 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * modify it under the terms of the GNU General Public License 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * as published by the Free Software Foundation; either version 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2 of the License, or (at your option) any later version. 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12df1f6d200c1e20788184251c49f349b38d90889cTim Abbott#include <linux/init.h> 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/threads.h> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/linkage.h> 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/ptrace.h> 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/page.h> 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/spr-regs.h> 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/mb86943a.h> 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "head.inc" 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DBR0 0xfe000e00 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DBR1 0xfe000e08 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DBR2 0xfe000e10 /* not on FR401 */ 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DBR3 0xfe000e18 /* not on FR401 */ 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DAM0 0xfe000f00 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DAM1 0xfe000f08 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DAM2 0xfe000f10 /* not on FR401 */ 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_DAM3 0xfe000f18 /* not on FR401 */ 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_LGCR 0xfe000010 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_LCR 0xfe000100 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __400_LSBR 0xfe000c00 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 34df1f6d200c1e20788184251c49f349b38d90889cTim Abbott __INIT 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .balign 4 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# describe the position and layout of the SDRAM controller registers 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# ENTRY: EXIT: 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR5 - cacheline size 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR11 - displacement of 2nd SDRAM addr reg from GR14 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR12 - displacement of 3rd SDRAM addr reg from GR14 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR13 - displacement of 4th SDRAM addr reg from GR14 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR14 - address of 1st SDRAM addr reg 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR15 - amount to shift address by to match SDRAM addr reg 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR26 &__head_reference [saved] 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR30 LED address [saved] 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# CC0 - T if DBR0 is present 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# CC1 - T if DBR1 is present 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# CC2 - T if DBR2 is present (not FR401/FR401A) 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# CC3 - T if DBR3 is present (not FR401/FR401A) 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .globl __head_fr401_describe_sdram 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_fr401_describe_sdram: 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__400_DBR0),gr14 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__400_DBR0),gr14 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos.p #__400_DBR1-__400_DBR0,gr11 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos #__400_DBR2-__400_DBR0,gr12 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos.p #__400_DBR3-__400_DBR0,gr13 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos #32,gr5 ; cacheline size 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos.p #0,gr15 ; amount to shift addr reg by 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # specify which DBR regs are present 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos #0x00ff,gr4 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,cccr 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movsg psr,gr3 ; check for FR401/FR401A 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds srli gr3,#25,gr3 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds subicc gr3,#0x20>>1,gr0,icc0 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bnelr icc0,#1 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos #0x000f,gr4 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,cccr 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bralr 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# rearrange the bus controller registers 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# ENTRY: EXIT: 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR26 &__head_reference [saved] 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR30 LED address revised LED address 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .globl __head_fr401_set_busctl 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_fr401_set_busctl: 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__400_LGCR),gr4 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__400_LGCR),gr4 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__400_LSBR),gr10 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__400_LSBR),gr10 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__400_LCR),gr11 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__400_LCR),gr11 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # set the bus controller 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr4,#0),gr5 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ori gr5,#0xff,gr5 ; make sure all chip-selects are enabled 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr4,#0) 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS1),gr4 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS1),gr4 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS1_M),gr5 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS1_M),gr5 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS1_C),gr6 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS1_C),gr6 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#1*0x08) 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#1*0x08+0x100) 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#1*0x08) 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS2),gr4 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS2),gr4 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS2_M),gr5 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS2_M),gr5 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS2_C),gr6 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS2_C),gr6 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#2*0x08) 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#2*0x08+0x100) 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#2*0x08) 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS3),gr4 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS3),gr4 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS3_M),gr5 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS3_M),gr5 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS3_C),gr6 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS3_C),gr6 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#3*0x08) 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#3*0x08+0x100) 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#3*0x08) 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS4),gr4 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS4),gr4 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS4_M),gr5 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS4_M),gr5 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS4_C),gr6 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS4_C),gr6 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#4*0x08) 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#4*0x08+0x100) 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#4*0x08) 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS5),gr4 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS5),gr4 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS5_M),gr5 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS5_M),gr5 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS5_C),gr6 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS5_C),gr6 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#5*0x08) 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#5*0x08+0x100) 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#5*0x08) 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS6),gr4 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS6),gr4 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS6_M),gr5 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS6_M),gr5 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS6_C),gr6 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS6_C),gr6 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#6*0x08) 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#6*0x08+0x100) 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#6*0x08) 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS7),gr4 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS7),gr4 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS7_M),gr5 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS7_M),gr5 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS7_C),gr6 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS7_C),gr6 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr4,@(gr10,#7*0x08) 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr5,@(gr10,#7*0x08+0x100) 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sti gr6,@(gr11,#7*0x08) 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds membar 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bar 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # adjust LED bank address 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bralr 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# determine the total SDRAM size 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# ENTRY: EXIT: 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR25 - SDRAM size 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR26 &__head_reference [saved] 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR30 LED address [saved] 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .globl __head_fr401_survey_sdram 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_fr401_survey_sdram: 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__400_DAM0),gr11 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__400_DAM0),gr11 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__400_DBR0),gr12 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__400_DBR0),gr12 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(0xfe000000),gr17 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlos #0,gr25 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr12,#0x00),gr4 ; DAR0 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds subcc gr4,gr17,gr0,icc0 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds beq icc0,#0,__head_no_DCS0 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20 match addr 31:20 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add gr25,gr6,gr25 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds addi gr25,#1,gr25 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_no_DCS0: 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr12,#0x08),gr4 ; DAR1 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds subcc gr4,gr17,gr0,icc0 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds beq icc0,#0,__head_no_DCS1 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20 match addr 31:20 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add gr25,gr6,gr25 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds addi gr25,#1,gr25 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_no_DCS1: 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # FR401/FR401A does not have DCS2/3 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movsg psr,gr3 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds srli gr3,#25,gr3 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds subicc gr3,#0x20>>1,gr0,icc0 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds beq icc0,#0,__head_no_DCS3 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr12,#0x10),gr4 ; DAR2 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds subcc gr4,gr17,gr0,icc0 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds beq icc0,#0,__head_no_DCS2 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20 match addr 31:20 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add gr25,gr6,gr25 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds addi gr25,#1,gr25 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_no_DCS2: 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr12,#0x18),gr4 ; DAR3 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds subcc gr4,gr17,gr0,icc0 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds beq icc0,#0,__head_no_DCS3 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20 match addr 31:20 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add gr25,gr6,gr25 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds addi gr25,#1,gr25 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_no_DCS3: 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bralr 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# set the protection map with the I/DAMPR registers 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# ENTRY: EXIT: 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR25 SDRAM size [saved] 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR26 &__head_reference [saved] 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# GR30 LED address [saved] 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds############################################################################### 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .globl __head_fr401_set_protection 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__head_fr401_set_protection: 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movsg lr,gr27 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # set the I/O region protection registers for FR401/3/5 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_IO),gr5 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_IO),gr5 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr0,iampr7 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr7 ; General I/O tile 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # - start with the highest numbered registers 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__kernel_image_end),gr8 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__kernel_image_end),gr8 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(32768),gr4 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add gr8,gr4,gr8 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(1024*2048-1),gr4 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add.p gr8,gr4,gr8 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds not gr4,gr4 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds and gr8,gr4,gr8 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__page_offset),gr9 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__page_offset),gr9 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add gr9,gr25,gr9 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # GR8 = base of uncovered RAM 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # GR9 = top of uncovered RAM 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_MB93093_PDK 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__region_CS2),gr4 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__region_CS2),gr4 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ori gr4,#xAMPRx_SS_1Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr4 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,dampr6 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr0,iampr6 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr6 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr6 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr5 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr5 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr4 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr4 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr3 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr3 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr2 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr2 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr1 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr1 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds # cover kernel core image with kernel-only segment 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sethi.p %hi(__page_offset),gr8 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setlo %lo(__page_offset),gr8 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds call __head_split_region 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_PROTECT_KERNEL 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ori.p gr4,#xAMPRx_S_KERNEL,gr4 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ori gr5,#xAMPRx_S_KERNEL,gr5 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr4,iampr0 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds movgs gr5,dampr0 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds jmpl @(gr27,gr0) 312