11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _ASM_IA64_FPU_H
21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _ASM_IA64_FPU_H
31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*
51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co
61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *	David Mosberger-Tang <davidm@hpl.hp.com>
71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */
81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
918282b36d742347abd9a4bc74fe9fd2432a8335bAurelien Jarno#include <linux/types.h>
1018282b36d742347abd9a4bc74fe9fd2432a8335bAurelien Jarno
111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* floating point status register: */
121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_TRAP_VD	(1 << 0)	/* invalid op trap disabled */
131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_TRAP_DD	(1 << 1)	/* denormal trap disabled */
141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_TRAP_ZD	(1 << 2)	/* zero-divide trap disabled */
151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_TRAP_OD	(1 << 3)	/* overflow trap disabled */
161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_TRAP_UD	(1 << 4)	/* underflow trap disabled */
171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_TRAP_ID	(1 << 5)	/* inexact trap disabled */
181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_S0(x)	((x) <<  6)
191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_S1(x)	((x) << 19)
201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_S2(x)	(__IA64_UL(x) << 32)
211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_S3(x)	(__IA64_UL(x) << 45)
221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* floating-point status field controls: */
241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_FTZ	(1 << 0)		/* flush-to-zero */
251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_WRE	(1 << 1)		/* widest-range exponent */
261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_PC(x)	(((x) & 0x3) << 2)	/* precision control */
271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_RC(x)	(((x) & 0x3) << 4)	/* rounding control */
281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_TD		(1 << 6)		/* trap disabled */
291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* floating-point status field flags: */
311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_V		(1 <<  7)		/* invalid operation flag */
321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_D		(1 <<  8)		/* denormal/unnormal operand flag */
331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_Z		(1 <<  9)		/* zero divide (IEEE) flag */
341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_O		(1 << 10)		/* overflow (IEEE) flag */
351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_U		(1 << 11)		/* underflow (IEEE) flag */
361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_I		(1 << 12)		/* inexact (IEEE) flag) */
371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* floating-point rounding control: */
391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPRC_NEAREST	0x0
401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPRC_NEGINF	0x1
411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPRC_POSINF	0x2
421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPRC_TRUNC	0x3
431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSF_DEFAULT	(FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST))
451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* This default value is the same as HP-UX uses.  Don't change it
471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds   without a very good reason.  */
481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPSR_DEFAULT	(FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD	\
491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds			 | FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID	\
501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds			 | FPSR_S0 (FPSF_DEFAULT)			\
511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds			 | FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE)	\
521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds			 | FPSR_S2 (FPSF_DEFAULT | FPSF_TD)		\
531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds			 | FPSR_S3 (FPSF_DEFAULT | FPSF_TD))
541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# ifndef __ASSEMBLY__
561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct ia64_fpreg {
581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	union {
591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds		unsigned long bits[2];
601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds		long double __dummy;	/* force 16-byte alignment */
611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	} u;
621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds};
631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# endif /* __ASSEMBLY__ */
651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _ASM_IA64_FPU_H */
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