io.h revision 49c426ba445f83d304a5eab3d49efa123329cf2b
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * License. See the file "COPYING" in the main directory of this archive 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * for more details. 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1994, 1995 Waldorf GmbH 7966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * Copyright (C) 1994 - 2000, 06 Ralf Baechle 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved. 107034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle * Author: Maciej W. Rozycki <macro@mips.com> 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _ASM_IO_H 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _ASM_IO_H 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/compiler.h> 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/kernel.h> 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/types.h> 1892d11594f688c8b55b51e80f2eac4417396237a4Jim Quinlan#include <linux/irqflags.h> 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/addrspace.h> 21893a0574de0c90a4e52c8f7070023b2eb58cd220Yoichi Yuasa#include <asm/bug.h> 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/byteorder.h> 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/cpu.h> 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/cpu-features.h> 25140c1729a221dc6eacfcbf2a073dbf00fad13e43Ralf Baechle#include <asm-generic/iomap.h> 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/page.h> 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/pgtable-bits.h> 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/processor.h> 29fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle#include <asm/string.h> 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 31c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki#include <ioremap.h> 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <mangle-port.h> 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Slowdown I/O port space accesses for antique hardware. 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#undef CONF_SLOWDOWN_IO 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 404912ba72d6e27d0f19ec062ffd00a8c0165a2f67Maciej W. Rozycki * Raw operations are never swapped in software. OTOH values that raw 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * operations are working on may or may not have been swapped by the bus 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * hardware. An example use would be for flash memory that's used for 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * execute in place. 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4521a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle# define __raw_ioswabb(a, x) (x) 4621a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle# define __raw_ioswabw(a, x) (x) 4721a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle# define __raw_ioswabl(a, x) (x) 4821a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle# define __raw_ioswabq(a, x) (x) 4921a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle# define ____raw_ioswabq(a, x) (x) 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 51a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IO_SPACE_LIMIT 0xffff 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * On MIPS I/O ports are memory mapped, so we access them using normal 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * load/store instructions. mips_io_port_base is the virtual address to 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * which all ports are being mapped. For sake of efficiency some code 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * assumes that this is an address that can be loaded with a single lui 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * instruction, so the lower 16 bits must be zero. Should be true on 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * on any sane architecture; generic code does not use this assumption. 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern const unsigned long mips_io_port_base; 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 65966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle/* 66966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * Gcc will generate code to load the value of mips_io_port_base after each 67966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * function call which may be fairly wasteful in some cases. So we don't 68966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * play quite by the book. We tell gcc mips_io_port_base is a long variable 69966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * which solves the code generation issue. Now we need to violate the 70966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * aliasing rules a little to make initialization possible and finally we 71966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * will need the barrier() to fight side effects of the aliasing chat. 72966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * This trickery will eventually collapse under gcc's optimizer. Oh well. 73966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle */ 74966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechlestatic inline void set_io_port_base(unsigned long base) 75966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle{ 76966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle * (unsigned long *) &mips_io_port_base = base; 77966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle barrier(); 78966f4406d903a4214fdc74bec54710c6232a95b8Ralf Baechle} 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Thanks to James van Artsdalen for a better timing-fix than 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the two short jumps: using outb's to a nonexistent port seems 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to guarantee better timings even on fast machines. 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * On the other hand, I'd like to be sure of a non-existent port: 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * I feel a bit unsafe about using 0x80 (should be safe, though) 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Linus 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __SLOW_DOWN_IO \ 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __asm__ __volatile__( \ 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "sb\t$0,0x80(%0)" \ 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : : "r" (mips_io_port_base)); 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONF_SLOWDOWN_IO 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef REALLY_SLOW_IO 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; } 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SLOW_DOWN_IO __SLOW_DOWN_IO 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SLOW_DOWN_IO 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * virt_to_phys - map virtual addresses to physical 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @address: address to remap 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The returned physical address is the physical (CPU) mapping for 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the memory address given. It is only valid to use this function on 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * addresses directly mapped or allocated via kmalloc. 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This function does not give bus mappings for DMA transfers. In 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * almost all conceivable cases a device driver should not be using 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * this function 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11999e3b942c62f42c8d5added63305e12372b06dafFranck Bui-Huustatic inline unsigned long virt_to_phys(volatile const void *address) 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12149c426ba445f83d304a5eab3d49efa123329cf2bDavid Daney return __pa(address); 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * phys_to_virt - map physical address to virtual 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @address: address to remap 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The returned virtual address is a current CPU mapping for 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the memory address given. It is only valid to use this function on 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * addresses that have a kernel mapping 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This function does not handle bus mappings for DMA transfers. In 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * almost all conceivable cases a device driver should not be using 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * this function 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void * phys_to_virt(unsigned long address) 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1386f284a2ce7b8bc49cb8455b1763357897a899abbFranck Bui-Huu return (void *)(address + PAGE_OFFSET - PHYS_OFFSET); 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ISA I/O bus memory addresses are 1:1 with the physical address. 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned long isa_virt_to_bus(volatile void * address) 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return (unsigned long)address - PAGE_OFFSET; 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void * isa_bus_to_virt(unsigned long address) 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return (void *)(address + PAGE_OFFSET); 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define isa_page_to_bus page_to_phys 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * However PCI ones are not necessarily 1:1 and therefore these interfaces 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * are forbidden in portable PCI drivers. 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Allow them for x86 for legacy drivers, though. 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define virt_to_bus virt_to_phys 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define bus_to_virt phys_to_virt 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Change "struct page" to physical address. 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1700f04afb59565c3029563b9a79b3513c9f3327a27Ralf Baechleextern void __iomem * __ioremap(phys_t offset, phys_t size, unsigned long flags); 171d89e36d8df547fde2beaea82211954868da2282dRalf Baechleextern void __iounmap(const volatile void __iomem *addr); 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1730f04afb59565c3029563b9a79b3513c9f3327a27Ralf Baechlestatic inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags) 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1765ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto void __iomem *addr = plat_ioremap(offset, size, flags); 1775ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto 1785ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto if (addr) 1795ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto return addr; 1805ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto 181c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) 182c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cpu_has_64bit_addresses) { 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u64 base = UNCAC_BASE; 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * R10000 supports a 2 bit uncached attribute therefore 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UNCAC_BASE may not equal IO_BASE. 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (flags == _CACHE_UNCACHED) 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds base = (u64) IO_BASE; 192fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle return (void __iomem *) (unsigned long) (base + offset); 193c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki } else if (__builtin_constant_p(offset) && 194c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki __builtin_constant_p(size) && __builtin_constant_p(flags)) { 195c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki phys_t phys_addr, last_addr; 196c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki 197c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki phys_addr = fixup_bigphys_addr(offset, size); 198c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki 199c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki /* Don't allow wraparound or zero size. */ 200c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki last_addr = phys_addr + size - 1; 201c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki if (!size || last_addr < phys_addr) 202c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki return NULL; 203c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki 204c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki /* 205c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki * Map uncached objects in the low 512MB of address 206c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki * space using KSEG1. 207c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki */ 208c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) && 209c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki flags == _CACHE_UNCACHED) 210c0cf500145b4154adcbc55afc1a63db24cee84a2Atsushi Nemoto return (void __iomem *) 211c0cf500145b4154adcbc55afc1a63db24cee84a2Atsushi Nemoto (unsigned long)CKSEG1ADDR(phys_addr); 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return __ioremap(offset, size, flags); 215c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki 216c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki#undef __IS_LOW512 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ioremap - map bus memory into CPU space 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @offset: bus address of the memory 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @size: size of the resource to map 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ioremap performs a platform specific sequence of operations to 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * make bus memory CPU accessible via the readb/readw/readl/writeb/ 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * writew/writel functions and the other mmio helpers. The returned 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * address is not guaranteed to be usable directly as a virtual 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * address. 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ioremap(offset, size) \ 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __ioremap_mode((offset), (size), _CACHE_UNCACHED) 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ioremap_nocache - map bus memory into CPU space 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @offset: bus address of the memory 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @size: size of the resource to map 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ioremap_nocache performs a platform specific sequence of operations to 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * make bus memory CPU accessible via the readb/readw/readl/writeb/ 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * writew/writel functions and the other mmio helpers. The returned 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * address is not guaranteed to be usable directly as a virtual 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * address. 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This version of ioremap ensures that the memory is marked uncachable 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * on the CPU as well as honouring existing caching rules from things like 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the PCI bus. Note that there are other caches and buffers on many 24725985edcedea6396277003854657b5f3cb31a628Lucas De Marchi * busses. In particular driver authors should read up on PCI writes 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * It's useful if some control registers are in such an area and 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * write combining or read caching is not desirable: 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ioremap_nocache(offset, size) \ 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __ioremap_mode((offset), (size), _CACHE_UNCACHED) 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2567034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle * ioremap_cachable - map bus memory into CPU space 2577034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle * @offset: bus address of the memory 2587034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle * @size: size of the resource to map 259778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * 260778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * ioremap_nocache performs a platform specific sequence of operations to 261778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * make bus memory CPU accessible via the readb/readw/readl/writeb/ 262778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * writew/writel functions and the other mmio helpers. The returned 263778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * address is not guaranteed to be usable directly as a virtual 264778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * address. 265778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * 266778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * This version of ioremap ensures that the memory is marked cachable by 2677034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle * the CPU. Also enables full write-combining. Useful for some 268778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle * memory-like regions on I/O busses. 269778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle */ 270778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle#define ioremap_cachable(offset, size) \ 271351336929ccf222ae38ff0cb7a8dd5fd5c6236a0Chris Dearman __ioremap_mode((offset), (size), _page_cachable_default) 272778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle 273778e2ac5970e445f8c6b7d8aa597ac162afe270aRalf Baechle/* 2747034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle * These two are MIPS specific ioremap variant. ioremap_cacheable_cow 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * requests a cachable mapping, ioremap_uncached_accelerated requests a 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * mapping using the uncached accelerated mode which isn't supported on 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * all processors. 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ioremap_cacheable_cow(offset, size) \ 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __ioremap_mode((offset), (size), _CACHE_CACHABLE_COW) 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ioremap_uncached_accelerated(offset, size) \ 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __ioremap_mode((offset), (size), _CACHE_UNCACHED_ACCELERATED) 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 284d89e36d8df547fde2beaea82211954868da2282dRalf Baechlestatic inline void iounmap(const volatile void __iomem *addr) 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2865ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto if (plat_iounmap(addr)) 2875ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto return; 2885ddcb3c35be995517a32799796e2acda90a784e0Atsushi Nemoto 289c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) 290c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki 291c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki if (cpu_has_64bit_addresses || 292c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki (__builtin_constant_p(addr) && __IS_KSEG1(addr))) 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __iounmap(addr); 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 297c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki#undef __IS_KSEG1 298c3455b0efc2b5b1bdc755602f77ce7f43725bf61Maciej W. Rozycki} 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3008faca49a6731299c32b333fd6535db8d21557ce3David Daney#ifdef CONFIG_CPU_CAVIUM_OCTEON 3017034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define war_octeon_io_reorder_wmb() wmb() 3028faca49a6731299c32b333fd6535db8d21557ce3David Daney#else 3038faca49a6731299c32b333fd6535db8d21557ce3David Daney#define war_octeon_io_reorder_wmb() do { } while (0) 3048faca49a6731299c32b333fd6535db8d21557ce3David Daney#endif 3058faca49a6731299c32b333fd6535db8d21557ce3David Daney 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void pfx##write##bwlq(type val, \ 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile void __iomem *mem) \ 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile type *__mem; \ 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds type __val; \ 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3148faca49a6731299c32b333fd6535db8d21557ce3David Daney war_octeon_io_reorder_wmb(); \ 3158faca49a6731299c32b333fd6535db8d21557ce3David Daney \ 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 318a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto __val = pfx##ioswab##bwlq(__mem, val); \ 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3207034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *__mem = __val; \ 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cpu_has_64bits) { \ 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long __flags; \ 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds type __tmp; \ 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (irq) \ 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(__flags); \ 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __asm__ __volatile__( \ 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ".set mips3" "\t\t# __writeq""\n\t" \ 3307034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle "dsll32 %L0, %L0, 0" "\n\t" \ 3317034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle "dsrl32 %L0, %L0, 0" "\n\t" \ 3327034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle "dsll32 %M0, %M0, 0" "\n\t" \ 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "or %L0, %L0, %M0" "\n\t" \ 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "sd %L0, %2" "\n\t" \ 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ".set mips0" "\n" \ 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "=r" (__tmp) \ 337b77bb37a2ad7689d9ef8048df9cc30ee770f5a94Ralf Baechle : "0" (__val), "m" (*__mem)); \ 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (irq) \ 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(__flags); \ 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else \ 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG(); \ 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} \ 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 344b887d3f2c63543dce1a0825e41be3a8d3ebef78dAtsushi Nemotostatic inline type pfx##read##bwlq(const volatile void __iomem *mem) \ 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile type *__mem; \ 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds type __val; \ 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3517034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __val = *__mem; \ 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cpu_has_64bits) { \ 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long __flags; \ 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 356049b13c358f0187cf3c5003d5fb9848dbcb28bc3Thiemo Seufer if (irq) \ 357049b13c358f0187cf3c5003d5fb9848dbcb28bc3Thiemo Seufer local_irq_save(__flags); \ 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __asm__ __volatile__( \ 3597034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle ".set mips3" "\t\t# __readq" "\n\t" \ 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "ld %L0, %1" "\n\t" \ 3617034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle "dsra32 %M0, %L0, 0" "\n\t" \ 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "sll %L0, %L0, 0" "\n\t" \ 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ".set mips0" "\n" \ 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "=r" (__val) \ 365b77bb37a2ad7689d9ef8048df9cc30ee770f5a94Ralf Baechle : "m" (*__mem)); \ 366049b13c358f0187cf3c5003d5fb9848dbcb28bc3Thiemo Seufer if (irq) \ 367049b13c358f0187cf3c5003d5fb9848dbcb28bc3Thiemo Seufer local_irq_restore(__flags); \ 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else { \ 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __val = 0; \ 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG(); \ 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } \ 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 373a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto return pfx##ioswab##bwlq(__mem, __val); \ 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void pfx##out##bwlq##p(type val, unsigned long port) \ 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile type *__addr; \ 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds type __val; \ 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3838faca49a6731299c32b333fd6535db8d21557ce3David Daney war_octeon_io_reorder_wmb(); \ 3848faca49a6731299c32b333fd6535db8d21557ce3David Daney \ 385a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 387a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto __val = pfx##ioswab##bwlq(__addr, val); \ 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3899d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle /* Really, we want this to be atomic */ \ 3909d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ 3919d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle \ 3929d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle *__addr = __val; \ 3939d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle slow; \ 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} \ 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline type pfx##in##bwlq##p(unsigned long port) \ 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile type *__addr; \ 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds type __val; \ 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 401a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4039d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ 4049d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle \ 4059d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle __val = *__addr; \ 4069d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle slow; \ 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 408a8433137ea9143bb3a2bc18a3407b5a130fdb868Atsushi Nemoto return pfx##ioswab##bwlq(__addr, __val); \ 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __BUILD_MEMORY_PFX(bus, bwlq, type) \ 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__BUILD_MEMORY_SINGLE(bus, bwlq, type, 1) 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4159d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#define BUILDIO_MEM(bwlq, type) \ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__BUILD_MEMORY_PFX(__raw_, bwlq, type) \ 4184912ba72d6e27d0f19ec062ffd00a8c0165a2f67Maciej W. Rozycki__BUILD_MEMORY_PFX(, bwlq, type) \ 419290f10ae4230ef06b71e57673101b7e70c1b29a6Al Viro__BUILD_MEMORY_PFX(__mem_, bwlq, type) \ 4209d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle 4219d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_MEM(b, u8) 4229d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_MEM(w, u16) 4239d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_MEM(l, u32) 4249d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_MEM(q, u64) 4259d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle 4269d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ 4279d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ 4289d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) 4299d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle 4309d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#define BUILDIO_IOPORT(bwlq, type) \ 4319d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle __BUILD_IOPORT_PFX(, bwlq, type) \ 432290f10ae4230ef06b71e57673101b7e70c1b29a6Al Viro __BUILD_IOPORT_PFX(__mem_, bwlq, type) 4339d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle 4349d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_IOPORT(b, u8) 4359d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_IOPORT(w, u16) 4369d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_IOPORT(l, u32) 4379d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#ifdef CONFIG_64BIT 4389d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf BaechleBUILDIO_IOPORT(q, u64) 4399d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#endif 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __BUILDIO(bwlq, type) \ 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4434912ba72d6e27d0f19ec062ffd00a8c0165a2f67Maciej W. Rozycki__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__BUILDIO(q, u64) 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define readb_relaxed readb 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define readw_relaxed readw 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define readl_relaxed readl 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define readq_relaxed readq 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 452f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define readb_be(addr) \ 453f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli __raw_readb((__force unsigned *)(addr)) 454f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define readw_be(addr) \ 455f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli be16_to_cpu(__raw_readw((__force unsigned *)(addr))) 456f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define readl_be(addr) \ 457f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli be32_to_cpu(__raw_readl((__force unsigned *)(addr))) 458f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define readq_be(addr) \ 459f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli be64_to_cpu(__raw_readq((__force unsigned *)(addr))) 460f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli 461f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define writeb_be(val, addr) \ 462f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli __raw_writeb((val), (__force unsigned *)(addr)) 463f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define writew_be(val, addr) \ 464f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr)) 465f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define writel_be(val, addr) \ 466f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr)) 467f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli#define writeq_be(val, addr) \ 468f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr)) 469f868ba29723be46e0981226d7455090d515b08efFlorian Fainelli 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Some code tests for these symbols 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define readq readq 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define writeq writeq 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __BUILD_MEMORY_STRING(bwlq, type) \ 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 47899289a4e8a9cb3fa6caa8fc4ebf57a33db497340Arnaud Gierschstatic inline void writes##bwlq(volatile void __iomem *mem, \ 47999289a4e8a9cb3fa6caa8fc4ebf57a33db497340Arnaud Giersch const void *addr, unsigned int count) \ 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 48199289a4e8a9cb3fa6caa8fc4ebf57a33db497340Arnaud Giersch const volatile type *__addr = addr; \ 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count--) { \ 484290f10ae4230ef06b71e57673101b7e70c1b29a6Al Viro __mem_write##bwlq(*__addr, mem); \ 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __addr++; \ 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } \ 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} \ 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int count) \ 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile type *__addr = addr; \ 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count--) { \ 495290f10ae4230ef06b71e57673101b7e70c1b29a6Al Viro *__addr = __mem_read##bwlq(mem); \ 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __addr++; \ 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } \ 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __BUILD_IOPORT_STRING(bwlq, type) \ 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 502ecba36dad8b635174bcbc32998a019b6d1e6f12fRalf Baechlestatic inline void outs##bwlq(unsigned long port, const void *addr, \ 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int count) \ 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 505ecba36dad8b635174bcbc32998a019b6d1e6f12fRalf Baechle const volatile type *__addr = addr; \ 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count--) { \ 508290f10ae4230ef06b71e57673101b7e70c1b29a6Al Viro __mem_out##bwlq(*__addr, port); \ 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __addr++; \ 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } \ 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} \ 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void ins##bwlq(unsigned long port, void *addr, \ 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int count) \ 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ \ 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile type *__addr = addr; \ 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count--) { \ 519290f10ae4230ef06b71e57673101b7e70c1b29a6Al Viro *__addr = __mem_in##bwlq(port); \ 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __addr++; \ 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } \ 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BUILDSTRING(bwlq, type) \ 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds \ 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__BUILD_MEMORY_STRING(bwlq, type) \ 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds__BUILD_IOPORT_STRING(bwlq, type) 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsBUILDSTRING(b, u8) 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsBUILDSTRING(w, u16) 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsBUILDSTRING(l, u32) 5329d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#ifdef CONFIG_64BIT 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsBUILDSTRING(q, u64) 5349d58f302ca370c720fa47cb419f0b33eaa1a1132Ralf Baechle#endif 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5378faca49a6731299c32b333fd6535db8d21557ce3David Daney#ifdef CONFIG_CPU_CAVIUM_OCTEON 5388faca49a6731299c32b333fd6535db8d21557ce3David Daney#define mmiowb() wmb() 5398faca49a6731299c32b333fd6535db8d21557ce3David Daney#else 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Depends on MIPS II instruction set */ 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mmiowb() asm volatile ("sync" ::: "memory") 5428faca49a6731299c32b333fd6535db8d21557ce3David Daney#endif 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 544fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechlestatic inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) 545fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle{ 546fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle memset((void __force *) addr, val, count); 547fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle} 548fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechlestatic inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) 549fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle{ 550fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle memcpy(dst, (void __force *) src, count); 551fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle} 552fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechlestatic inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) 553fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle{ 554fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle memcpy((void __force *) dst, src, count); 555fe00f943e0ef98b4057abcc2940d631a975b43cdRalf Baechle} 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The caches on some architectures aren't dma-coherent and have need to 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * handle this in software. There are three types of operations that 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * can be applied to dma buffers. 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * - dma_cache_wback_inv(start, size) makes caches and coherent by 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * writing the content of the caches back to memory, if necessary. 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The function also invalidates the affected part of the caches as 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * necessary before DMA transfers from outside to memory. 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * - dma_cache_wback(start, size) makes caches and coherent by 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * writing the content of the caches back to memory, if necessary. 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The function also invalidates the affected part of the caches as 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * necessary before DMA transfers from outside to memory. 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * - dma_cache_inv(start, size) invalidates the affected parts of the 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * caches. Dirty lines of the caches may be written back or simply 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * be discarded. This operation is necessary before dma operations 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to the memory. 574622a9edd919de98ef59571ae6c40c7458244e3f2Ralf Baechle * 575622a9edd919de98ef59571ae6c40c7458244e3f2Ralf Baechle * This API used to be exported; it now is for arch code internal use only. 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_DMA_NONCOHERENT 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size); 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void (*_dma_cache_wback)(unsigned long start, unsigned long size); 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void (*_dma_cache_inv)(unsigned long start, unsigned long size); 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 58321a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle#define dma_cache_wback_inv(start, size) _dma_cache_wback_inv(start, size) 58421a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle#define dma_cache_wback(start, size) _dma_cache_wback(start, size) 58521a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle#define dma_cache_inv(start, size) _dma_cache_inv(start, size) 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else /* Sane hardware */ 5881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5897034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define dma_cache_wback_inv(start,size) \ 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do { (void) (start); (void) (size); } while (0) 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define dma_cache_wback(start,size) \ 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do { (void) (start); (void) (size); } while (0) 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define dma_cache_inv(start,size) \ 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do { (void) (start); (void) (size); } while (0) 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CONFIG_DMA_NONCOHERENT */ 5971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Read a 32-bit register that requires a 64-bit read cycle on the bus. 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Avoid interrupt mucking, just adjust the address for 4-byte access. 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Assume the addresses are 8-byte aligned. 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef __MIPSEB__ 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __CSR_32_ADJUST 4 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __CSR_32_ADJUST 0 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 60921a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle#define csr_out32(v, a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v)) 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST)) 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Convert a physical pointer to a virtual kernel pointer for /dev/mem 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * access 6151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define xlate_dev_mem_ptr(p) __va(p) 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Convert a virtual cached pointer to an uncached pointer 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define xlate_dev_kmem_ptr(p) p 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _ASM_IO_H */ 624