118280edafef1b8ffc920743eddaf6cf6612b1509David Daney/* 218280edafef1b8ffc920743eddaf6cf6612b1509David Daney * This file is subject to the terms and conditions of the GNU General Public 318280edafef1b8ffc920743eddaf6cf6612b1509David Daney * License. See the file "COPYING" in the main directory of this archive 418280edafef1b8ffc920743eddaf6cf6612b1509David Daney * for more details. 518280edafef1b8ffc920743eddaf6cf6612b1509David Daney * 618280edafef1b8ffc920743eddaf6cf6612b1509David Daney * Copyright (C) 2013 Cavium, Inc 718280edafef1b8ffc920743eddaf6cf6612b1509David Daney */ 818280edafef1b8ffc920743eddaf6cf6612b1509David Daney#ifndef __ASM_MACH_PARAVIRT_KERNEL_ENTRY_H 918280edafef1b8ffc920743eddaf6cf6612b1509David Daney#define __ASM_MACH_PARAVIRT_KERNEL_ENTRY_H 1018280edafef1b8ffc920743eddaf6cf6612b1509David Daney 1118280edafef1b8ffc920743eddaf6cf6612b1509David Daney#define CP0_EBASE $15, 1 1218280edafef1b8ffc920743eddaf6cf6612b1509David Daney 1318280edafef1b8ffc920743eddaf6cf6612b1509David Daney .macro kernel_entry_setup 1418280edafef1b8ffc920743eddaf6cf6612b1509David Daney mfc0 t0, CP0_EBASE 1518280edafef1b8ffc920743eddaf6cf6612b1509David Daney andi t0, t0, 0x3ff # CPUNum 1618280edafef1b8ffc920743eddaf6cf6612b1509David Daney beqz t0, 1f 1718280edafef1b8ffc920743eddaf6cf6612b1509David Daney # CPUs other than zero goto smp_bootstrap 1818280edafef1b8ffc920743eddaf6cf6612b1509David Daney j smp_bootstrap 1918280edafef1b8ffc920743eddaf6cf6612b1509David Daney 2018280edafef1b8ffc920743eddaf6cf6612b1509David Daney1: 2118280edafef1b8ffc920743eddaf6cf6612b1509David Daney .endm 2218280edafef1b8ffc920743eddaf6cf6612b1509David Daney 2318280edafef1b8ffc920743eddaf6cf6612b1509David Daney/* 2418280edafef1b8ffc920743eddaf6cf6612b1509David Daney * Do SMP slave processor setup necessary before we can safely execute 2518280edafef1b8ffc920743eddaf6cf6612b1509David Daney * C code. 2618280edafef1b8ffc920743eddaf6cf6612b1509David Daney */ 2718280edafef1b8ffc920743eddaf6cf6612b1509David Daney .macro smp_slave_setup 2818280edafef1b8ffc920743eddaf6cf6612b1509David Daney mfc0 t0, CP0_EBASE 2918280edafef1b8ffc920743eddaf6cf6612b1509David Daney andi t0, t0, 0x3ff # CPUNum 3018280edafef1b8ffc920743eddaf6cf6612b1509David Daney slti t1, t0, NR_CPUS 3118280edafef1b8ffc920743eddaf6cf6612b1509David Daney bnez t1, 1f 3218280edafef1b8ffc920743eddaf6cf6612b1509David Daney2: 3318280edafef1b8ffc920743eddaf6cf6612b1509David Daney di 3418280edafef1b8ffc920743eddaf6cf6612b1509David Daney wait 3518280edafef1b8ffc920743eddaf6cf6612b1509David Daney b 2b # Unknown CPU, loop forever. 3618280edafef1b8ffc920743eddaf6cf6612b1509David Daney1: 3718280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_LA t1, paravirt_smp_sp 3818280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_SLL t0, PTR_SCALESHIFT 3918280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_ADDU t1, t1, t0 4018280edafef1b8ffc920743eddaf6cf6612b1509David Daney3: 4118280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_L sp, 0(t1) 4218280edafef1b8ffc920743eddaf6cf6612b1509David Daney beqz sp, 3b # Spin until told to proceed. 4318280edafef1b8ffc920743eddaf6cf6612b1509David Daney 4418280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_LA t1, paravirt_smp_gp 4518280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_ADDU t1, t1, t0 4618280edafef1b8ffc920743eddaf6cf6612b1509David Daney sync 4718280edafef1b8ffc920743eddaf6cf6612b1509David Daney PTR_L gp, 0(t1) 4818280edafef1b8ffc920743eddaf6cf6612b1509David Daney .endm 4918280edafef1b8ffc920743eddaf6cf6612b1509David Daney 5018280edafef1b8ffc920743eddaf6cf6612b1509David Daney#endif /* __ASM_MACH_PARAVIRT_KERNEL_ENTRY_H */ 51