11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * License. See the file "COPYING" in the main directory of this archive 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * for more details. 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _ASM_PGTABLE_32_H 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _ASM_PGTABLE_32_H 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/addrspace.h> 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/page.h> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/linkage.h> 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/cachectl.h> 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/fixmap.h> 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19c6e8b587718c486b55c2ebecc6de231a30beba35Ralf Baechle#include <asm-generic/pgtable-nopmd.h> 20c6e8b587718c486b55c2ebecc6de231a30beba35Ralf Baechle 216ee1d93455384cef8a0426effe85da241b525b63Rafał Miłeckiextern int temp_tlb_entry __cpuinitdata; 226ee1d93455384cef8a0426effe85da241b525b63Rafał Miłecki 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 24d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki * - add_temporary_entry() add a temporary TLB entry. We use TLB entries 25d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki * starting at the top and working down. This is for populating the 26d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki * TLB before trap_init() puts the TLB miss handler in place. It 27d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki * should be used only for entries matching the actual page tables, 28d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki * to prevent inconsistencies. 29d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki */ 30d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłeckiextern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, 31d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki unsigned long entryhi, unsigned long pagemask); 32d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki 33d377732c8c9aac14ccb900b65678558b0fb8f0f3Rafał Miłecki/* 3439b741431af7f6f46b2e0e7f7f13ea2351fb4a5fRalf Baechle * Basically we have the same two-level (which is the logical three level 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Linux page table layout folded) page tables as the i386. Some day 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * when we have proper page coloring support we can have a 1% quicker 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * tlb refill handling mechanism, but for now it is a bit slower but 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * works even with the cache aliasing problem the R4k and above have. 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* PGDIR_SHIFT determines what a third-level page table entry can map */ 424c8081e4696c7afc61930e4a49a6fa55c545b7e0Ralf Baechle#define PGDIR_SHIFT (2 * PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2) 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGDIR_MASK (~(PGDIR_SIZE-1)) 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Entries per page directory level: we use two-level, so 48c6e8b587718c486b55c2ebecc6de231a30beba35Ralf Baechle * we don't really have any PUD/PMD directory physically. 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5099e480d81ca98c25918c460fdb5ca876d7df6178Ralf Baechle#define __PGD_ORDER (32 - 3 * PAGE_SHIFT + PGD_T_LOG2 + PTE_T_LOG2) 5199e480d81ca98c25918c460fdb5ca876d7df6178Ralf Baechle#define PGD_ORDER (__PGD_ORDER >= 0 ? __PGD_ORDER : 0) 52c6e8b587718c486b55c2ebecc6de231a30beba35Ralf Baechle#define PUD_ORDER aieeee_attempt_to_allocate_pud 53c6e8b587718c486b55c2ebecc6de231a30beba35Ralf Baechle#define PMD_ORDER 1 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PTE_ORDER 0 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 565291925a9a65ea334f6e887d0f01dd119b8e2b2eJack Tan#define PTRS_PER_PGD (USER_PTRS_PER_PGD * 2) 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) 60d455a3696c72283923e6870e9e4fe1daa861d7cdHugh Dickins#define FIRST_USER_ADDRESS 0 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 627034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define VMALLOC_START MAP_BASE 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 642ac7401d11370b7a8e3a1c74aac03a021fd61048Ralf Baechle#define PKMAP_BASE (0xfe000000UL) 652ac7401d11370b7a8e3a1c74aac03a021fd61048Ralf Baechle 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_HIGHMEM 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE) 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds# define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_64BIT_PHYS_ADDR 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_ERROR(e) \ 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_ERROR(e) \ 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pgd_ERROR(e) \ 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void load_pgd(unsigned long pg_dir); 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)]; 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Empty pgd/pmd entries point to the invalid_pte_table. 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline int pmd_none(pmd_t pmd) 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return pmd_val(pmd) == (unsigned long) invalid_pte_table; 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK) 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline int pmd_present(pmd_t pmd) 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return pmd_val(pmd) != (unsigned long) invalid_pte_table; 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void pmd_clear(pmd_t *pmdp) 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 106962f480e0f9024ecdcfe2ba1d216c038ee328cedChris Dearman#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_page(x) pfn_to_page(pte_pfn(x)) 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline pte_t 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldspfn_pte(unsigned long pfn, pgprot_t prot) 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pte_t pte; 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pte.pte_high = (pfn << 6) | (pgprot_val(prot) & 0x3f); 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pte.pte_low = pgprot_val(prot); 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return pte; 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_page(x) pfn_to_page(pte_pfn(x)) 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_CPU_VR41XX 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2))) 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot)) 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 1266dd9344cfc41bcc60a01cdc828cb278be7a10e01David Daney#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) 1276dd9344cfc41bcc60a01cdc828cb278be7a10e01David Daney#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << _PFN_SHIFT) | pgprot_val(prot)) 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 129962f480e0f9024ecdcfe2ba1d216c038ee328cedChris Dearman#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __pgd_offset(address) pgd_index(address) 132f29244a59460a62f20885e1e3b55a845fb5a8fdbThiemo Seufer#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* to find an entry in a kernel page-table-directory */ 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pgd_offset_k(address) pgd_offset(&init_mm, address) 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 138f29244a59460a62f20885e1e3b55a845fb5a8fdbThiemo Seufer#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* to find an entry in a page-table-directory */ 14121a151d8ca3aa74ee79f9791a9d4dc370d3e0636Ralf Baechle#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr)) 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Find an entry in the third-level page table.. */ 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __pte_offset(address) \ 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_offset(dir, address) \ 1475b70a31708c958cb259e9c6cbecf7190521c856eFranck Bui-Huu ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) 1485b70a31708c958cb259e9c6cbecf7190521c856eFranck Bui-Huu#define pte_offset_kernel(dir, address) \ 1495b70a31708c958cb259e9c6cbecf7190521c856eFranck Bui-Huu ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1517034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define pte_offset_map(dir, address) \ 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define pte_unmap(pte) ((void)(pte)) 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Swap entries must have VALID bit cleared. */ 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __swp_type(x) (((x).val >> 10) & 0x1f) 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __swp_offset(x) ((x).val >> 15) 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __swp_entry(type,offset) \ 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ((swp_entry_t) { ((type) << 10) | ((offset) << 15) }) 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1647cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov * Bits 0, 4, 8, and 9 are taken, split up 28 bits of offset into this range: 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1667cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define PTE_FILE_MAX_BITS 28 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1687cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define pte_to_pgoff(_pte) ((((_pte).pte >> 1 ) & 0x07) | \ 1697cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov (((_pte).pte >> 2 ) & 0x38) | \ 1707034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle (((_pte).pte >> 10) << 6 )) 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1727cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x07) << 1 ) | \ 1737cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov (((off) & 0x38) << 2 ) | \ 1747cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov (((off) >> 6 ) << 10) | \ 1757cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov _PAGE_FILE }) 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Swap entries must have VALID and GLOBAL bits cleared. */ 1806ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 1816ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#define __swp_type(x) (((x).val >> 2) & 0x1f) 1827034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define __swp_offset(x) ((x).val >> 7) 1836ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#define __swp_entry(type,offset) \ 1847034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle ((swp_entry_t) { ((type) << 2) | ((offset) << 7) }) 1856ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#else 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __swp_type(x) (((x).val >> 8) & 0x1f) 1877034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define __swp_offset(x) ((x).val >> 13) 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __swp_entry(type,offset) \ 1897034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle ((swp_entry_t) { ((type) << 8) | ((offset) << 13) }) 1906ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1927cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1947cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov * Bits 0 and 1 of pte_high are taken, use the rest for the page offset... 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1967cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define PTE_FILE_MAX_BITS 30 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1987cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define pte_to_pgoff(_pte) ((_pte).pte_high >> 2) 1997034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) << 2 }) 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 2027cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov/* 2037cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov * Bits 0, 4, 6, and 7 are taken, split up 28 bits of offset into this range: 2047cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov */ 2057cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define PTE_FILE_MAX_BITS 28 2067cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov 2077cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define pte_to_pgoff(_pte) ((((_pte).pte >> 1) & 0x7) | \ 2087cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov (((_pte).pte >> 2) & 0x8) | \ 2097034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle (((_pte).pte >> 8) << 4)) 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2117cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7) << 1) | \ 2127cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov (((off) & 0x8) << 2) | \ 2137cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov (((off) >> 4) << 8) | \ 2147cb710c9a617384cd0ed30638f3acc00125690fcSergei Shtylyov _PAGE_FILE }) 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2196ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 2206ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_high }) 2216ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val }) 2226ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#else 2237034228792cc561e79ff8600f02884bd4c80e287Ralf Baechle#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 2256ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419Sergei Shtylyov#endif 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _ASM_PGTABLE_32_H */ 228