dma.h revision 0779bf2d2ecc4d9b1e9437ae659f50e6776a7666
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $ 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * linux/include/asm/dma.h: Defines for using and allocating dma channels. 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Written by Hennus Bergman, 1992. 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * High DMA channel support & info by Hannu Savolainen 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * and John Boyd, Nov. 1992. 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (c) Copyright 2000, Grant Grundler 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _ASM_DMA_H 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _ASM_DMA_H 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/io.h> /* need byte IO */ 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/system.h> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define dma_outb outb 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define dma_inb inb 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up 200779bf2d2ecc4d9b1e9437ae659f50e6776a7666Matt LaPlante** (or rather not merge) DMAs into manageable chunks. 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** On parisc, this is more of the software/tuning constraint 220779bf2d2ecc4d9b1e9437ae659f50e6776a7666Matt LaPlante** rather than the HW. I/O MMU allocation algorithms can be 230779bf2d2ecc4d9b1e9437ae659f50e6776a7666Matt LaPlante** faster with smaller sizes (to some degree). 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE) 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* The maximum address that we can perform a DMA transfer to on this platform 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** New dynamic DMA interfaces should obsolete this.... 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_DMA_ADDRESS (~0UL) 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** We don't have DMA channels... well V-class does but the 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** Dynamic DMA Mapping interface will support them... right? :^) 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** Note: this is not relevant right now for PA-RISC, but we cannot 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** leave this as undefined because some things (e.g. sound) 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds** won't compile :-( 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_DMA_CHANNELS 8 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_AUTOINIT 0x10 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8237 DMA controllers */ 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* DMA controller registers */ 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_CMD_REG 0x08 /* command register (w) */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_STAT_REG 0x08 /* status register (r) */ 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_REQ_REG 0x09 /* request register (w) */ 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_MODE_REG 0x0B /* mode register (w) */ 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_RESET_REG 0x0D /* Master Clear (w) */ 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA1_EXT_MODE_REG (0x400 | DMA1_MODE_REG) 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_CMD_REG 0xD0 /* command register (w) */ 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_STAT_REG 0xD0 /* status register (r) */ 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_REQ_REG 0xD2 /* request register (w) */ 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_MODE_REG 0xD6 /* mode register (w) */ 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_RESET_REG 0xDA /* Master Clear (w) */ 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA2_EXT_MODE_REG (0x400 | DMA2_MODE_REG) 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ unsigned long claim_dma_lock(void) 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7799b6e9be71b9ad2c50c0d160b5af18848fee466dMatthew Wilcox return 0; 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void release_dma_lock(unsigned long flags) 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Get DMA residue count. After a DMA transfer, this 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * should return zero. Reading this while a DMA transfer is 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * still in progress will return unpredictable results. 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * If called before the channel has been used, it may return 1. 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Otherwise, it returns the number of _bytes_ left to transfer. 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Assumes DMA flip-flop is clear. 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ int get_dma_residue(unsigned int dmanr) 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* using short to get 16-bit wrap around */ 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned short count; 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count = 1 + dma_inb(io_port); 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count += dma_inb(io_port) << 8; 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return (dmanr<=3)? count : (count<<1); 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* enable/disable a specific DMA channel */ 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void enable_dma(unsigned int dmanr) 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_SUPERIO 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (dmanr<=3) 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_outb(dmanr, DMA1_MASK_REG); 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_outb(dmanr & 3, DMA2_MASK_REG); 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void disable_dma(unsigned int dmanr) 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_SUPERIO 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (dmanr<=3) 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_outb(dmanr | 4, DMA1_MASK_REG); 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* reserve a DMA channel */ 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define request_dma(dmanr, device_id) (0) 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Clear the 'DMA Pointer Flip Flop'. 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Write 0 for LSB/MSB, 1 for MSB/LSB access. 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Use this once to initialize the FF to a known state. 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * After that, keep track of it. :-) 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * --- In order to do that, the DMA routines below should --- 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * --- only be used while holding the DMA lock ! --- 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void clear_dma_ff(unsigned int dmanr) 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* set mode (above) for a specific DMA channel */ 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode) 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Set only the page register bits of the transfer address. 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This is used for successive transfers when we know the contents of 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the lower 16 bits of the DMA current address register, but a 64k boundary 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * may have been crossed. 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void set_dma_page(unsigned int dmanr, char pagenr) 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Set transfer address & page bits for specific DMA channel. 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Assumes dma flipflop is clear. 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * a specific DMA channel. 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * You must ensure the parameters are valid. 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NOTE: from a manual: "the number of transfers is one more 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * than the initial word count"! This is taken into account. 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Assumes dma flip-flop is clear. 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define free_dma(dmanr) 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_PCI 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int isa_dma_bridge_buggy; 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define isa_dma_bridge_buggy (0) 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _ASM_DMA_H */ 187