19f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifndef _ASM_POWERPC_PROCESSOR_H 29f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define _ASM_POWERPC_PROCESSOR_H 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 59f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * Copyright (C) 2001 PPC 64 Team, IBM Corp 69f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * 79f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * This program is free software; you can redistribute it and/or 89f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * modify it under the terms of the GNU General Public License 99f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * as published by the Free Software Foundation; either version 109f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * 2 of the License, or (at your option) any later version. 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 139f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#include <asm/reg.h> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling#ifdef CONFIG_VSX 16c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling#define TS_FPRWIDTH 2 17e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard 18e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#ifdef __BIG_ENDIAN__ 19e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#define TS_FPROFFSET 0 20e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#define TS_VSRLOWOFFSET 1 21e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#else 22e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#define TS_FPROFFSET 1 23e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#define TS_VSRLOWOFFSET 0 24e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#endif 25e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard 26c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling#else 279c75a31c3525a127f70b919856e32be3d8b03755Michael Neuling#define TS_FPRWIDTH 1 28e156bd8ad76939a9bcd66d85cf06f8cde1fb8030Anton Blanchard#define TS_FPROFFSET 0 29c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling#endif 309c75a31c3525a127f70b919856e32be3d8b03755Michael Neuling 3192779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#ifdef CONFIG_PPC64 3292779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni/* Default SMT priority is set to 3. Use 11- 13bits to save priority. */ 3392779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#define PPR_PRIORITY 3 3492779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#ifdef __ASSEMBLY__ 3592779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#define INIT_PPR (PPR_PRIORITY << 50) 3692779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#else 3792779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#define INIT_PPR ((u64)PPR_PRIORITY << 50) 3892779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#endif /* __ASSEMBLY__ */ 3992779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni#endif /* CONFIG_PPC64 */ 4092779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni 419f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifndef __ASSEMBLY__ 429f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#include <linux/compiler.h> 431325a684b553d4b5c41ae0482f8991b43f945746Ashish Kalra#include <linux/cache.h> 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/ptrace.h> 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/types.h> 469422de3e953d0e60eb95f5430a9dd803eec1c6d7Michael Neuling#include <asm/hw_breakpoint.h> 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 48799d6046d3fb557006e6d7c9767fdb96479b0e0aPaul Mackerras/* We do _not_ want to define new machine types at all, those must die 49799d6046d3fb557006e6d7c9767fdb96479b0e0aPaul Mackerras * in favor of using the device-tree 50799d6046d3fb557006e6d7c9767fdb96479b0e0aPaul Mackerras * -- BenH. 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 53933ee7119fb14156f46dc8bce8218f62db13c568Paul Bolle/* PREP sub-platform types. Unused */ 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _PREP_Motorola 0x01 /* motorola prep */ 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _PREP_Firm 0x02 /* firmworks prep */ 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _PREP_IBM 0x00 /* ibm prep */ 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _PREP_Bull 0x03 /* bull prep */ 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 59799d6046d3fb557006e6d7c9767fdb96479b0e0aPaul Mackerras/* CHRP sub-platform types. These are arbitrary */ 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ 6326c5032eaa64090b2a01973b0c6ea9e7f6a80fa7Benjamin Herrenschmidt#define _CHRP_briq 0x07 /* TotalImpact's briQ */ 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 65e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt#if defined(__KERNEL__) && defined(CONFIG_PPC32) 66e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt 67e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidtextern int _chrp_type; 68799d6046d3fb557006e6d7c9767fdb96479b0e0aPaul Mackerras 69e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt#endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */ 70e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt 719f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras/* 729f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * Default implementation of macro that returns current 739f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * instruction pointer ("program counter"). 749f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras */ 759f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define current_text_addr() ({ __label__ _l; _l: &&_l;}) 769f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 779f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras/* Macros for adjusting thread priority (hardware multi-threading) */ 789f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HMT_very_low() asm volatile("or 31,31,31 # very low priority") 799f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HMT_low() asm volatile("or 1,1,1 # low priority") 809f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority") 819f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HMT_medium() asm volatile("or 2,2,2 # medium priority") 829f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority") 839f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HMT_high() asm volatile("or 3,3,3 # high priority") 849f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 859f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifdef __KERNEL__ 869f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct task_struct; 889f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerrasvoid start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp); 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid release_thread(struct task_struct *); 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Lazy FPU handling on uni-processor */ 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern struct task_struct *last_task_used_math; 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern struct task_struct *last_task_used_altivec; 94c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neulingextern struct task_struct *last_task_used_vsx; 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern struct task_struct *last_task_used_spe; 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 979f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifdef CONFIG_PPC32 987c4f10b9003dc8423df07574ba197bbbe3bc382bRune Torgersen 997c4f10b9003dc8423df07574ba197bbbe3bc382bRune Torgersen#if CONFIG_TASK_SIZE > CONFIG_KERNEL_START 1007c4f10b9003dc8423df07574ba197bbbe3bc382bRune Torgersen#error User TASK_SIZE overlaps with KERNEL_START address 1017c4f10b9003dc8423df07574ba197bbbe3bc382bRune Torgersen#endif 1029f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define TASK_SIZE (CONFIG_TASK_SIZE) 1039f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* This decides where the kernel will search for a free chunk of vm 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * space during mmap's. 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) 1089f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif 1099f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 1109f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifdef CONFIG_PPC64 111048ee0993ec8360abb0b51bdf8f8721e9ed62ec4Aneesh Kumar K.V/* 64-bit user address space is 46-bits (64TB user VM) */ 112048ee0993ec8360abb0b51bdf8f8721e9ed62ec4Aneesh Kumar K.V#define TASK_SIZE_USER64 (0x0000400000000000UL) 1139f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 1149f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras/* 1159f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * 32-bit user address space is 4GB - 1 page 1169f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT 1179f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras */ 1189f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE)) 1199f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 120824552574162ac00ae636fa41386b1072379ea4aDave Hansen#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ 1219f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras TASK_SIZE_USER32 : TASK_SIZE_USER64) 122824552574162ac00ae636fa41386b1072379ea4aDave Hansen#define TASK_SIZE TASK_SIZE_OF(current) 1239f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 1249f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras/* This decides where the kernel will search for a free chunk of vm 1259f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras * space during mmap's. 1269f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras */ 1279f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) 1289f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4)) 1299f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 130cab175f9fa2973f0deb1580fca3c966fe1d3981eDenis Kirjanov#define TASK_UNMAPPED_BASE ((is_32bit_task()) ? \ 1319f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) 1329f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 134922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#ifdef __powerpc64__ 135922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 136922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#define STACK_TOP_USER64 TASK_SIZE_USER64 137922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#define STACK_TOP_USER32 TASK_SIZE_USER32 138922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 139cab175f9fa2973f0deb1580fca3c966fe1d3981eDenis Kirjanov#define STACK_TOP (is_32bit_task() ? \ 140922a70d327bd4b11342c2afd08e20d35f52064c3David Howells STACK_TOP_USER32 : STACK_TOP_USER64) 141922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 142922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#define STACK_TOP_MAX STACK_TOP_USER64 143922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 144922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#else /* __powerpc64__ */ 145922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 146922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#define STACK_TOP TASK_SIZE 147922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#define STACK_TOP_MAX STACK_TOP 148922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 149922a70d327bd4b11342c2afd08e20d35f52064c3David Howells#endif /* __powerpc64__ */ 150922a70d327bd4b11342c2afd08e20d35f52064c3David Howells 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct { 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long seg; 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} mm_segment_t; 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 155de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras#define TS_FPR(i) fp_state.fpr[i][TS_FPROFFSET] 156de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras#define TS_TRANS_FPR(i) transact_fp.fpr[i][TS_FPROFFSET] 157de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras 158de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras/* FP and VSX 0-31 register set */ 159de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerrasstruct thread_fp_state { 160de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras u64 fpr[32][TS_FPRWIDTH] __attribute__((aligned(16))); 161de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras u64 fpscr; /* Floating point status */ 162de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras}; 163de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras 164de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras/* Complete AltiVec register set including VSCR */ 165de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerrasstruct thread_vr_state { 166de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras vector128 vr[32] __attribute__((aligned(16))); 167de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras vector128 vscr __attribute__((aligned(16))); 168de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras}; 1699c75a31c3525a127f70b919856e32be3d8b03755Michael Neuling 17051ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushanstruct debug_reg { 17199396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#ifdef CONFIG_PPC_ADV_DEBUG_REGS 17299396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp /* 17399396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * The following help to manage the use of Debug Control Registers 17499396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * om the BookE platforms. 17599396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp */ 176d8899bb2be91b3a19ebf82b138232919ffcf833aBharat Bhushan uint32_t dbcr0; 177d8899bb2be91b3a19ebf82b138232919ffcf833aBharat Bhushan uint32_t dbcr1; 17899396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#ifdef CONFIG_BOOKE 179d8899bb2be91b3a19ebf82b138232919ffcf833aBharat Bhushan uint32_t dbcr2; 18099396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#endif 18199396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp /* 18299396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * The stored value of the DBSR register will be the value at the 18399396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * last debug interrupt. This register can only be read from the 18499396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * user (will never be written to) and has value while helping to 18599396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * describe the reason for the last debug trap. Torez 18699396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp */ 187d8899bb2be91b3a19ebf82b138232919ffcf833aBharat Bhushan uint32_t dbsr; 18899396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp /* 18999396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * The following will contain addresses used by debug applications 19099396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * to help trace and trap on particular address locations. 19199396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * The bits in the Debug Control Registers above help define which 19299396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp * of the following registers will contain valid data and/or addresses. 19399396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp */ 19499396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long iac1; 19599396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long iac2; 19699396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#if CONFIG_PPC_ADV_DEBUG_IACS > 2 19799396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long iac3; 19899396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long iac4; 19999396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#endif 20099396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long dac1; 20199396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long dac2; 20299396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 20399396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long dvc1; 20499396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp unsigned long dvc2; 20599396ac105f54fe3584374c7c70a5cb6def766e6Dave Kleikamp#endif 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 20751ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan}; 20851ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan 20951ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushanstruct thread_struct { 21051ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan unsigned long ksp; /* Kernel stack pointer */ 21195791988fec645d196e746fcc0e329e19f7b1347Bharat Bhushan 21251ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan#ifdef CONFIG_PPC64 21351ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan unsigned long ksp_vsid; 21451ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan#endif 21551ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan struct pt_regs *regs; /* Pointer to saved register state */ 21651ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan mm_segment_t fs; /* for get_fs() validation */ 21751ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan#ifdef CONFIG_BOOKE 21851ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan /* BookE base exception scratch space; align on cacheline */ 21951ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan unsigned long normsave[8] ____cacheline_aligned; 22051ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan#endif 22151ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan#ifdef CONFIG_PPC32 22251ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan void *pgdir; /* root of page-table tree */ 22351ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ 22451ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan#endif 22595791988fec645d196e746fcc0e329e19f7b1347Bharat Bhushan /* Debug Registers */ 22651ae8d4a2b9e4aa9a502061b9c39168e08829b94Bharat Bhushan struct debug_reg debug; 227de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras struct thread_fp_state fp_state; 22818461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerras struct thread_fp_state *fp_save_area; 2299f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras int fpexc_mode; /* floating-point exception mode */ 230e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerras unsigned int align_ctl; /* alignment handling control */ 2319f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifdef CONFIG_PPC64 2329f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras unsigned long start_tb; /* Start purr when proc switched in */ 2339f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras unsigned long accum_tb; /* Total accumilated purr for process */ 2345aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad#ifdef CONFIG_HAVE_HW_BREAKPOINT 2355aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad struct perf_event *ptrace_bps[HBP_NUM]; 2365aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad /* 2375aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad * Helps identify source of single-step exception and subsequent 2385aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad * hw-breakpoint enablement 2395aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad */ 2405aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad struct perf_event *last_hit_ubp; 2415aae8a53708025d4e718f0d2e7c2f766779ddc71K.Prasad#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 2429f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif 2439422de3e953d0e60eb95f5430a9dd803eec1c6d7Michael Neuling struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */ 24441ab5266c3622354353433618edb92ab278025faAnanth N Mavinakayanahalli unsigned long trap_nr; /* last trap # on this thread */ 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_ALTIVEC 246de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras struct thread_vr_state vr_state; 24718461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerras struct thread_vr_state *vr_save_area; 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long vrsave; 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int used_vr; /* set if process has used altivec */ 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CONFIG_ALTIVEC */ 251c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling#ifdef CONFIG_VSX 252c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling /* VSR status */ 253c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling int used_vsr; /* set if process has used altivec */ 254c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8Michael Neuling#endif /* CONFIG_VSX */ 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_SPE 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long evr[32]; /* upper 32-bits of SPE regs */ 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u64 acc; /* Accumulator */ 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long spefscr; /* SPE & eFP status */ 259640e922501103aaf2e0abb4cf4de5d49fa8342f7Joseph Myers unsigned long spefscr_last; /* SPEFSCR value on last prctl 260640e922501103aaf2e0abb4cf4de5d49fa8342f7Joseph Myers call or trap return */ 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int used_spe; /* set if process has used spe */ 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CONFIG_SPE */ 263f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 264f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling u64 tm_tfhar; /* Transaction fail handler addr */ 265f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling u64 tm_texasr; /* Transaction exception & summary */ 266f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling u64 tm_tfiar; /* Transaction fail instr address reg */ 267f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling unsigned long tm_orig_msr; /* Thread's MSR on ctx switch */ 268f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling struct pt_regs ckpt_regs; /* Checkpointed registers */ 269f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling 27028e61cc466d8daace4b0f04ba2b83e0bd68f5832Michael Neuling unsigned long tm_tar; 27128e61cc466d8daace4b0f04ba2b83e0bd68f5832Michael Neuling unsigned long tm_ppr; 27228e61cc466d8daace4b0f04ba2b83e0bd68f5832Michael Neuling unsigned long tm_dscr; 27328e61cc466d8daace4b0f04ba2b83e0bd68f5832Michael Neuling 274f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling /* 275f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * Transactional FP and VSX 0-31 register set. 276f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * NOTE: the sense of these is the opposite of the integer ckpt_regs! 277f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * 278f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * When a transaction is active/signalled/scheduled etc., *regs is the 279f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * most recent set of/speculated GPRs with ckpt_regs being the older 280f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * checkpointed regs to which we roll back if transaction aborts. 281f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * 282f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * However, fpr[] is the checkpointed 'base state' of FP regs, and 283f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * transact_fpr[] is the new set of transactional values. 284f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling * VRs work the same way. 285f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling */ 286de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras struct thread_fp_state transact_fp; 287de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5ePaul Mackerras struct thread_vr_state transact_vr; 288f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling unsigned long transact_vrsave; 289f4c3aff2230bfe696a0683073b77446248d7895cMichael Neuling#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 29097e492558f423d99c51eb934506b7a3d7c64613bAlexander Graf#ifdef CONFIG_KVM_BOOK3S_32_HANDLER 29197e492558f423d99c51eb934506b7a3d7c64613bAlexander Graf void* kvm_shadow_vcpu; /* KVM internal data */ 29297e492558f423d99c51eb934506b7a3d7c64613bAlexander Graf#endif /* CONFIG_KVM_BOOK3S_32_HANDLER */ 293d30f6e480055e5be12e7a03fd11ea912a451daa5Scott Wood#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE) 294d30f6e480055e5be12e7a03fd11ea912a451daa5Scott Wood struct kvm_vcpu *kvm_vcpu; 295d30f6e480055e5be12e7a03fd11ea912a451daa5Scott Wood#endif 296efcac6589a277c10060e4be44b9455cf43838dc1Alexey Kardashevskiy#ifdef CONFIG_PPC64 297efcac6589a277c10060e4be44b9455cf43838dc1Alexey Kardashevskiy unsigned long dscr; 298efcac6589a277c10060e4be44b9455cf43838dc1Alexey Kardashevskiy int dscr_inherit; 29992779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni unsigned long ppr; /* used to save/restore SMT priority */ 300efcac6589a277c10060e4be44b9455cf43838dc1Alexey Kardashevskiy#endif 3012468dcf641e4f3e1b0153e3e11ca20740b2f4ce8Ian Munsie#ifdef CONFIG_PPC_BOOK3S_64 3022468dcf641e4f3e1b0153e3e11ca20740b2f4ce8Ian Munsie unsigned long tar; 3039353374b8e1585d5fa47a1e5c1d3e9155dd0eb7cMichael Ellerman unsigned long ebbrr; 3049353374b8e1585d5fa47a1e5c1d3e9155dd0eb7cMichael Ellerman unsigned long ebbhr; 3059353374b8e1585d5fa47a1e5c1d3e9155dd0eb7cMichael Ellerman unsigned long bescr; 30659affcd3e460b97492bc1aa2b843bafe7c54f596Michael Ellerman unsigned long siar; 30759affcd3e460b97492bc1aa2b843bafe7c54f596Michael Ellerman unsigned long sdar; 30859affcd3e460b97492bc1aa2b843bafe7c54f596Michael Ellerman unsigned long sier; 30959affcd3e460b97492bc1aa2b843bafe7c54f596Michael Ellerman unsigned long mmcr2; 310330a1eb7775ba876dbd46b9885556e57f705e3d4Michael Ellerman unsigned mmcr0; 311330a1eb7775ba876dbd46b9885556e57f705e3d4Michael Ellerman unsigned used_ebb; 3122468dcf641e4f3e1b0153e3e11ca20740b2f4ce8Ian Munsie#endif 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ARCH_MIN_TASKALIGN 16 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) 31885218827cc4ca900867807f19345418164ffc108Kumar Gala#define INIT_SP_LIMIT \ 31985218827cc4ca900867807f19345418164ffc108Kumar Gala (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack) 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3216a800f36acd5bf06b5fe2cb27c4d0524d60c3df5Liu Yu#ifdef CONFIG_SPE 322640e922501103aaf2e0abb4cf4de5d49fa8342f7Joseph Myers#define SPEFSCR_INIT \ 323640e922501103aaf2e0abb4cf4de5d49fa8342f7Joseph Myers .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE, \ 324640e922501103aaf2e0abb4cf4de5d49fa8342f7Joseph Myers .spefscr_last = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE, 3256a800f36acd5bf06b5fe2cb27c4d0524d60c3df5Liu Yu#else 3266a800f36acd5bf06b5fe2cb27c4d0524d60c3df5Liu Yu#define SPEFSCR_INIT 3276a800f36acd5bf06b5fe2cb27c4d0524d60c3df5Liu Yu#endif 3289f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 3299f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifdef CONFIG_PPC32 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INIT_THREAD { \ 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .ksp = INIT_SP, \ 33285218827cc4ca900867807f19345418164ffc108Kumar Gala .ksp_limit = INIT_SP_LIMIT, \ 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .fs = KERNEL_DS, \ 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .pgdir = swapper_pg_dir, \ 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .fpexc_mode = MSR_FE0 | MSR_FE1, \ 3366a800f36acd5bf06b5fe2cb27c4d0524d60c3df5Liu Yu SPEFSCR_INIT \ 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3389f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#else 3399f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define INIT_THREAD { \ 3409f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras .ksp = INIT_SP, \ 3419f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ 3429f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras .fs = KERNEL_DS, \ 343ddf5f75a16b3e7460ffee881795aa168dffcd0cfArnd Bergmann .fpexc_mode = 0, \ 34492779245599bb3d7fb48066b11c4bfd6aa477198Haren Myneni .ppr = INIT_PPR, \ 3459f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras} 3469f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Return saved PC of a blocked thread. For now, this is the "user" PC 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3519f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define thread_saved_pc(tsk) \ 3529f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 354e5093ff05d36c64e8f36a9ddb26358256dc133eaSrinivasa Ds#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.regs) 355e5093ff05d36c64e8f36a9ddb26358256dc133eaSrinivasa Ds 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsunsigned long get_wchan(struct task_struct *p); 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3589f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) 3599f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Get/set floating-point exception mode */ 3629f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) 3639f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 368fab5db97e44f76461f76b24adfa8ccb14d4df498Paul Mackerras#define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr)) 369fab5db97e44f76461f76b24adfa8ccb14d4df498Paul Mackerras#define SET_ENDIAN(tsk, val) set_endian((tsk), (val)) 370fab5db97e44f76461f76b24adfa8ccb14d4df498Paul Mackerras 371fab5db97e44f76461f76b24adfa8ccb14d4df498Paul Mackerrasextern int get_endian(struct task_struct *tsk, unsigned long adr); 372fab5db97e44f76461f76b24adfa8ccb14d4df498Paul Mackerrasextern int set_endian(struct task_struct *tsk, unsigned int val); 373fab5db97e44f76461f76b24adfa8ccb14d4df498Paul Mackerras 374e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerras#define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) 375e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerras#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val)) 376e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerras 377e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerrasextern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr); 378e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerrasextern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); 379e9370ae15dc2f8ba1e1889ce26f13cda565b6ecbPaul Mackerras 380d31626f70b6103f4d9153b75d07e0e8795728cc9Paul Mackerrasextern void fp_enable(void); 381d31626f70b6103f4d9153b75d07e0e8795728cc9Paul Mackerrasextern void vec_enable(void); 38218461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerrasextern void load_fp_state(struct thread_fp_state *fp); 38318461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerrasextern void store_fp_state(struct thread_fp_state *fp); 38418461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerrasextern void load_vr_state(struct thread_vr_state *vr); 38518461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerrasextern void store_vr_state(struct thread_vr_state *vr); 38618461960cbf50bf345ef0667d45d5f64de8fb893Paul Mackerras 3879f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerrasstatic inline unsigned int __unpack_fe01(unsigned long msr_bits) 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3929f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerrasstatic inline unsigned long __pack_fe01(unsigned int fpmode) 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3979f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#ifdef CONFIG_PPC64 3989f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0) 3999f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#else 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define cpu_relax() barrier() 4019f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4033a6bfbc91df04b081a44d419e0260bad54abddf7Davidlohr Bueso#define cpu_relax_lowlatency() cpu_relax() 4043a6bfbc91df04b081a44d419e0260bad54abddf7Davidlohr Bueso 4052f25194dbe0c4b2472ce133ea3e9bcbb14936ae7Anton Blanchard/* Check that a certain kernel stack pointer is valid in task_struct p */ 4062f25194dbe0c4b2472ce133ea3e9bcbb14936ae7Anton Blanchardint validate_sp(unsigned long sp, struct task_struct *p, 4072f25194dbe0c4b2472ce133ea3e9bcbb14936ae7Anton Blanchard unsigned long nbytes); 4082f25194dbe0c4b2472ce133ea3e9bcbb14936ae7Anton Blanchard 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Prefetch macros. 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ARCH_HAS_PREFETCH 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ARCH_HAS_PREFETCHW 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ARCH_HAS_SPINLOCK_PREFETCH 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4169f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerrasstatic inline void prefetch(const void *x) 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4189f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras if (unlikely(!x)) 4199f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras return; 4209f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 4219f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4249f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerrasstatic inline void prefetchw(const void *x) 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4269f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras if (unlikely(!x)) 4279f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras return; 4289f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras 4299f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define spin_lock_prefetch(x) prefetchw(x) 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4349f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#define HAVE_ARCH_PICK_MMAP_LAYOUT 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 436efbda86098455da014be849713df6498cefc5a2aJosh Boyer#ifdef CONFIG_PPC64 4372b3f8e87cf99a33fb6faf5026d7147748bbd77b6Michael Neulingstatic inline unsigned long get_clean_sp(unsigned long sp, int is_32) 438efbda86098455da014be849713df6498cefc5a2aJosh Boyer{ 439efbda86098455da014be849713df6498cefc5a2aJosh Boyer if (is_32) 4402b3f8e87cf99a33fb6faf5026d7147748bbd77b6Michael Neuling return sp & 0x0ffffffffUL; 441efbda86098455da014be849713df6498cefc5a2aJosh Boyer return sp; 442efbda86098455da014be849713df6498cefc5a2aJosh Boyer} 443efbda86098455da014be849713df6498cefc5a2aJosh Boyer#else 4442b3f8e87cf99a33fb6faf5026d7147748bbd77b6Michael Neulingstatic inline unsigned long get_clean_sp(unsigned long sp, int is_32) 445efbda86098455da014be849713df6498cefc5a2aJosh Boyer{ 4462b3f8e87cf99a33fb6faf5026d7147748bbd77b6Michael Neuling return sp; 447efbda86098455da014be849713df6498cefc5a2aJosh Boyer} 448efbda86098455da014be849713df6498cefc5a2aJosh Boyer#endif 449efbda86098455da014be849713df6498cefc5a2aJosh Boyer 450e8bb3e00cff93ef2a0cfc09c3294aa37b4737e09Deepthi Dharwarextern unsigned long cpuidle_disable; 451771dae81896855d25f7f8746aaf56c0238deafb6Deepthi Dharwarenum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF}; 452771dae81896855d25f7f8746aaf56c0238deafb6Deepthi Dharwar 453ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern int powersave_nap; /* set if nap mode can be used in idle loop */ 4548d6f7c5aa3db6f3e5e43d09f8a0166c7d96f33f3Michael Ellermanextern void power7_nap(int check_irq); 455aca79d2b6ec2c0b955b22abb71c6dab90fa1d4d5Vaidyanathan Srinivasanextern void power7_sleep(void); 456ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern void flush_instruction_cache(void); 457ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern void hard_reset_now(void); 458ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern void poweroff_now(void); 459ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern int fix_alignment(struct pt_regs *); 460ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern void cvt_fd(float *from, double *to); 461ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern void cvt_df(double *from, float *to); 462ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howellsextern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); 463ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells 464ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells#ifdef CONFIG_PPC64 465ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells/* 466ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells * We handle most unaligned accesses in hardware. On the other hand 467ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells * unaligned DMA can be very expensive on some ppc64 IO chips (it does 468ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells * powers of 2 writes until it reaches sufficient alignment). 469ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells * 470ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells * Based on this we disable the IP header alignment in network drivers. 471ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells */ 472ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells#define NET_IP_ALIGN 0 473ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells#endif 474ae3a197e3d0bfe3f4bf1693723e82dc018c096f3David Howells 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* __KERNEL__ */ 4769f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif /* __ASSEMBLY__ */ 4779f04b9e327c495f8ddbf89c08da6cbe626e1b1b3Paul Mackerras#endif /* _ASM_POWERPC_PROCESSOR_H */ 478