setup_64.c revision 44ae3ab3358e962039c36ad4ae461ae9fb29596c
1/* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#undef DEBUG 14 15#include <linux/module.h> 16#include <linux/string.h> 17#include <linux/sched.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/reboot.h> 21#include <linux/delay.h> 22#include <linux/initrd.h> 23#include <linux/seq_file.h> 24#include <linux/ioport.h> 25#include <linux/console.h> 26#include <linux/utsname.h> 27#include <linux/tty.h> 28#include <linux/root_dev.h> 29#include <linux/notifier.h> 30#include <linux/cpu.h> 31#include <linux/unistd.h> 32#include <linux/serial.h> 33#include <linux/serial_8250.h> 34#include <linux/bootmem.h> 35#include <linux/pci.h> 36#include <linux/lockdep.h> 37#include <linux/memblock.h> 38#include <asm/io.h> 39#include <asm/kdump.h> 40#include <asm/prom.h> 41#include <asm/processor.h> 42#include <asm/pgtable.h> 43#include <asm/smp.h> 44#include <asm/elf.h> 45#include <asm/machdep.h> 46#include <asm/paca.h> 47#include <asm/time.h> 48#include <asm/cputable.h> 49#include <asm/sections.h> 50#include <asm/btext.h> 51#include <asm/nvram.h> 52#include <asm/setup.h> 53#include <asm/system.h> 54#include <asm/rtas.h> 55#include <asm/iommu.h> 56#include <asm/serial.h> 57#include <asm/cache.h> 58#include <asm/page.h> 59#include <asm/mmu.h> 60#include <asm/firmware.h> 61#include <asm/xmon.h> 62#include <asm/udbg.h> 63#include <asm/kexec.h> 64#include <asm/mmu_context.h> 65 66#include "setup.h" 67 68#ifdef DEBUG 69#define DBG(fmt...) udbg_printf(fmt) 70#else 71#define DBG(fmt...) 72#endif 73 74int boot_cpuid = 0; 75int __initdata boot_cpu_count; 76u64 ppc64_pft_size; 77 78/* Pick defaults since we might want to patch instructions 79 * before we've read this from the device tree. 80 */ 81struct ppc64_caches ppc64_caches = { 82 .dline_size = 0x40, 83 .log_dline_size = 6, 84 .iline_size = 0x40, 85 .log_iline_size = 6 86}; 87EXPORT_SYMBOL_GPL(ppc64_caches); 88 89/* 90 * These are used in binfmt_elf.c to put aux entries on the stack 91 * for each elf executable being started. 92 */ 93int dcache_bsize; 94int icache_bsize; 95int ucache_bsize; 96 97#ifdef CONFIG_SMP 98 99static char *smt_enabled_cmdline; 100 101/* Look for ibm,smt-enabled OF option */ 102static void check_smt_enabled(void) 103{ 104 struct device_node *dn; 105 const char *smt_option; 106 107 /* Default to enabling all threads */ 108 smt_enabled_at_boot = threads_per_core; 109 110 /* Allow the command line to overrule the OF option */ 111 if (smt_enabled_cmdline) { 112 if (!strcmp(smt_enabled_cmdline, "on")) 113 smt_enabled_at_boot = threads_per_core; 114 else if (!strcmp(smt_enabled_cmdline, "off")) 115 smt_enabled_at_boot = 0; 116 else { 117 long smt; 118 int rc; 119 120 rc = strict_strtol(smt_enabled_cmdline, 10, &smt); 121 if (!rc) 122 smt_enabled_at_boot = 123 min(threads_per_core, (int)smt); 124 } 125 } else { 126 dn = of_find_node_by_path("/options"); 127 if (dn) { 128 smt_option = of_get_property(dn, "ibm,smt-enabled", 129 NULL); 130 131 if (smt_option) { 132 if (!strcmp(smt_option, "on")) 133 smt_enabled_at_boot = threads_per_core; 134 else if (!strcmp(smt_option, "off")) 135 smt_enabled_at_boot = 0; 136 } 137 138 of_node_put(dn); 139 } 140 } 141} 142 143/* Look for smt-enabled= cmdline option */ 144static int __init early_smt_enabled(char *p) 145{ 146 smt_enabled_cmdline = p; 147 return 0; 148} 149early_param("smt-enabled", early_smt_enabled); 150 151#else 152#define check_smt_enabled() 153#endif /* CONFIG_SMP */ 154 155/* 156 * Early initialization entry point. This is called by head.S 157 * with MMU translation disabled. We rely on the "feature" of 158 * the CPU that ignores the top 2 bits of the address in real 159 * mode so we can access kernel globals normally provided we 160 * only toy with things in the RMO region. From here, we do 161 * some early parsing of the device-tree to setup out MEMBLOCK 162 * data structures, and allocate & initialize the hash table 163 * and segment tables so we can start running with translation 164 * enabled. 165 * 166 * It is this function which will call the probe() callback of 167 * the various platform types and copy the matching one to the 168 * global ppc_md structure. Your platform can eventually do 169 * some very early initializations from the probe() routine, but 170 * this is not recommended, be very careful as, for example, the 171 * device-tree is not accessible via normal means at this point. 172 */ 173 174void __init early_setup(unsigned long dt_ptr) 175{ 176 /* -------- printk is _NOT_ safe to use here ! ------- */ 177 178 /* Identify CPU type */ 179 identify_cpu(0, mfspr(SPRN_PVR)); 180 181 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 182 initialise_paca(&boot_paca, 0); 183 setup_paca(&boot_paca); 184 185 /* Initialize lockdep early or else spinlocks will blow */ 186 lockdep_init(); 187 188 /* -------- printk is now safe to use ------- */ 189 190 /* Enable early debugging if any specified (see udbg.h) */ 191 udbg_early_init(); 192 193 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 194 195 /* 196 * Do early initialization using the flattened device 197 * tree, such as retrieving the physical memory map or 198 * calculating/retrieving the hash table size. 199 */ 200 early_init_devtree(__va(dt_ptr)); 201 202 /* Now we know the logical id of our boot cpu, setup the paca. */ 203 setup_paca(&paca[boot_cpuid]); 204 205 /* Fix up paca fields required for the boot cpu */ 206 get_paca()->cpu_start = 1; 207 208 /* Probe the machine type */ 209 probe_machine(); 210 211 setup_kdump_trampoline(); 212 213 DBG("Found, Initializing memory management...\n"); 214 215 /* Initialize the hash table or TLB handling */ 216 early_init_mmu(); 217 218 DBG(" <- early_setup()\n"); 219} 220 221#ifdef CONFIG_SMP 222void early_setup_secondary(void) 223{ 224 /* Mark interrupts enabled in PACA */ 225 get_paca()->soft_enabled = 0; 226 227 /* Initialize the hash table or TLB handling */ 228 early_init_mmu_secondary(); 229} 230 231#endif /* CONFIG_SMP */ 232 233#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 234void smp_release_cpus(void) 235{ 236 unsigned long *ptr; 237 int i; 238 239 DBG(" -> smp_release_cpus()\n"); 240 241 /* All secondary cpus are spinning on a common spinloop, release them 242 * all now so they can start to spin on their individual paca 243 * spinloops. For non SMP kernels, the secondary cpus never get out 244 * of the common spinloop. 245 */ 246 247 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 248 - PHYSICAL_START); 249 *ptr = __pa(generic_secondary_smp_init); 250 251 /* And wait a bit for them to catch up */ 252 for (i = 0; i < 100000; i++) { 253 mb(); 254 HMT_low(); 255 if (boot_cpu_count == 0) 256 break; 257 udelay(1); 258 } 259 DBG("boot_cpu_count = %d\n", boot_cpu_count); 260 261 DBG(" <- smp_release_cpus()\n"); 262} 263#endif /* CONFIG_SMP || CONFIG_KEXEC */ 264 265/* 266 * Initialize some remaining members of the ppc64_caches and systemcfg 267 * structures 268 * (at least until we get rid of them completely). This is mostly some 269 * cache informations about the CPU that will be used by cache flush 270 * routines and/or provided to userland 271 */ 272static void __init initialize_cache_info(void) 273{ 274 struct device_node *np; 275 unsigned long num_cpus = 0; 276 277 DBG(" -> initialize_cache_info()\n"); 278 279 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 280 num_cpus += 1; 281 282 /* We're assuming *all* of the CPUs have the same 283 * d-cache and i-cache sizes... -Peter 284 */ 285 286 if ( num_cpus == 1 ) { 287 const u32 *sizep, *lsizep; 288 u32 size, lsize; 289 290 size = 0; 291 lsize = cur_cpu_spec->dcache_bsize; 292 sizep = of_get_property(np, "d-cache-size", NULL); 293 if (sizep != NULL) 294 size = *sizep; 295 lsizep = of_get_property(np, "d-cache-block-size", NULL); 296 /* fallback if block size missing */ 297 if (lsizep == NULL) 298 lsizep = of_get_property(np, "d-cache-line-size", NULL); 299 if (lsizep != NULL) 300 lsize = *lsizep; 301 if (sizep == 0 || lsizep == 0) 302 DBG("Argh, can't find dcache properties ! " 303 "sizep: %p, lsizep: %p\n", sizep, lsizep); 304 305 ppc64_caches.dsize = size; 306 ppc64_caches.dline_size = lsize; 307 ppc64_caches.log_dline_size = __ilog2(lsize); 308 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 309 310 size = 0; 311 lsize = cur_cpu_spec->icache_bsize; 312 sizep = of_get_property(np, "i-cache-size", NULL); 313 if (sizep != NULL) 314 size = *sizep; 315 lsizep = of_get_property(np, "i-cache-block-size", NULL); 316 if (lsizep == NULL) 317 lsizep = of_get_property(np, "i-cache-line-size", NULL); 318 if (lsizep != NULL) 319 lsize = *lsizep; 320 if (sizep == 0 || lsizep == 0) 321 DBG("Argh, can't find icache properties ! " 322 "sizep: %p, lsizep: %p\n", sizep, lsizep); 323 324 ppc64_caches.isize = size; 325 ppc64_caches.iline_size = lsize; 326 ppc64_caches.log_iline_size = __ilog2(lsize); 327 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 328 } 329 } 330 331 DBG(" <- initialize_cache_info()\n"); 332} 333 334 335/* 336 * Do some initial setup of the system. The parameters are those which 337 * were passed in from the bootloader. 338 */ 339void __init setup_system(void) 340{ 341 DBG(" -> setup_system()\n"); 342 343 /* Apply the CPUs-specific and firmware specific fixups to kernel 344 * text (nop out sections not relevant to this CPU or this firmware) 345 */ 346 do_feature_fixups(cur_cpu_spec->cpu_features, 347 &__start___ftr_fixup, &__stop___ftr_fixup); 348 do_feature_fixups(cur_cpu_spec->mmu_features, 349 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); 350 do_feature_fixups(powerpc_firmware_features, 351 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 352 do_lwsync_fixups(cur_cpu_spec->cpu_features, 353 &__start___lwsync_fixup, &__stop___lwsync_fixup); 354 355 /* 356 * Unflatten the device-tree passed by prom_init or kexec 357 */ 358 unflatten_device_tree(); 359 360 /* 361 * Fill the ppc64_caches & systemcfg structures with informations 362 * retrieved from the device-tree. 363 */ 364 initialize_cache_info(); 365 366#ifdef CONFIG_PPC_RTAS 367 /* 368 * Initialize RTAS if available 369 */ 370 rtas_initialize(); 371#endif /* CONFIG_PPC_RTAS */ 372 373 /* 374 * Check if we have an initrd provided via the device-tree 375 */ 376 check_for_initrd(); 377 378 /* 379 * Do some platform specific early initializations, that includes 380 * setting up the hash table pointers. It also sets up some interrupt-mapping 381 * related options that will be used by finish_device_tree() 382 */ 383 if (ppc_md.init_early) 384 ppc_md.init_early(); 385 386 /* 387 * We can discover serial ports now since the above did setup the 388 * hash table management for us, thus ioremap works. We do that early 389 * so that further code can be debugged 390 */ 391 find_legacy_serial_ports(); 392 393 /* 394 * Register early console 395 */ 396 register_early_udbg_console(); 397 398 /* 399 * Initialize xmon 400 */ 401 xmon_setup(); 402 403 smp_setup_cpu_maps(); 404 check_smt_enabled(); 405 406#ifdef CONFIG_SMP 407 /* Release secondary cpus out of their spinloops at 0x60 now that 408 * we can map physical -> logical CPU ids 409 */ 410 smp_release_cpus(); 411#endif 412 413 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 414 415 printk("-----------------------------------------------------\n"); 416 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 417 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size()); 418 if (ppc64_caches.dline_size != 0x80) 419 printk("ppc64_caches.dcache_line_size = 0x%x\n", 420 ppc64_caches.dline_size); 421 if (ppc64_caches.iline_size != 0x80) 422 printk("ppc64_caches.icache_line_size = 0x%x\n", 423 ppc64_caches.iline_size); 424#ifdef CONFIG_PPC_STD_MMU_64 425 if (htab_address) 426 printk("htab_address = 0x%p\n", htab_address); 427 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 428#endif /* CONFIG_PPC_STD_MMU_64 */ 429 if (PHYSICAL_START > 0) 430 printk("physical_start = 0x%llx\n", 431 (unsigned long long)PHYSICAL_START); 432 printk("-----------------------------------------------------\n"); 433 434 DBG(" <- setup_system()\n"); 435} 436 437static u64 slb0_limit(void) 438{ 439 if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) { 440 return 1UL << SID_SHIFT_1T; 441 } 442 return 1UL << SID_SHIFT; 443} 444 445static void __init irqstack_early_init(void) 446{ 447 u64 limit = slb0_limit(); 448 unsigned int i; 449 450 /* 451 * Interrupt stacks must be in the first segment since we 452 * cannot afford to take SLB misses on them. 453 */ 454 for_each_possible_cpu(i) { 455 softirq_ctx[i] = (struct thread_info *) 456 __va(memblock_alloc_base(THREAD_SIZE, 457 THREAD_SIZE, limit)); 458 hardirq_ctx[i] = (struct thread_info *) 459 __va(memblock_alloc_base(THREAD_SIZE, 460 THREAD_SIZE, limit)); 461 } 462} 463 464#ifdef CONFIG_PPC_BOOK3E 465static void __init exc_lvl_early_init(void) 466{ 467 unsigned int i; 468 469 for_each_possible_cpu(i) { 470 critirq_ctx[i] = (struct thread_info *) 471 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 472 dbgirq_ctx[i] = (struct thread_info *) 473 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 474 mcheckirq_ctx[i] = (struct thread_info *) 475 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 476 } 477} 478#else 479#define exc_lvl_early_init() 480#endif 481 482/* 483 * Stack space used when we detect a bad kernel stack pointer, and 484 * early in SMP boots before relocation is enabled. 485 */ 486static void __init emergency_stack_init(void) 487{ 488 u64 limit; 489 unsigned int i; 490 491 /* 492 * Emergency stacks must be under 256MB, we cannot afford to take 493 * SLB misses on them. The ABI also requires them to be 128-byte 494 * aligned. 495 * 496 * Since we use these as temporary stacks during secondary CPU 497 * bringup, we need to get at them in real mode. This means they 498 * must also be within the RMO region. 499 */ 500 limit = min(slb0_limit(), ppc64_rma_size); 501 502 for_each_possible_cpu(i) { 503 unsigned long sp; 504 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); 505 sp += THREAD_SIZE; 506 paca[i].emergency_sp = __va(sp); 507 } 508} 509 510/* 511 * Called into from start_kernel this initializes bootmem, which is used 512 * to manage page allocation until mem_init is called. 513 */ 514void __init setup_arch(char **cmdline_p) 515{ 516 ppc64_boot_msg(0x12, "Setup Arch"); 517 518 *cmdline_p = cmd_line; 519 520 /* 521 * Set cache line size based on type of cpu as a default. 522 * Systems with OF can look in the properties on the cpu node(s) 523 * for a possibly more accurate value. 524 */ 525 dcache_bsize = ppc64_caches.dline_size; 526 icache_bsize = ppc64_caches.iline_size; 527 528 /* reboot on panic */ 529 panic_timeout = 180; 530 531 if (ppc_md.panic) 532 setup_panic(); 533 534 init_mm.start_code = (unsigned long)_stext; 535 init_mm.end_code = (unsigned long) _etext; 536 init_mm.end_data = (unsigned long) _edata; 537 init_mm.brk = klimit; 538 539 irqstack_early_init(); 540 exc_lvl_early_init(); 541 emergency_stack_init(); 542 543#ifdef CONFIG_PPC_STD_MMU_64 544 stabs_alloc(); 545#endif 546 /* set up the bootmem stuff with available memory */ 547 do_init_bootmem(); 548 sparse_init(); 549 550#ifdef CONFIG_DUMMY_CONSOLE 551 conswitchp = &dummy_con; 552#endif 553 554 if (ppc_md.setup_arch) 555 ppc_md.setup_arch(); 556 557 paging_init(); 558 559 /* Initialize the MMU context management stuff */ 560 mmu_context_init(); 561 562 ppc64_boot_msg(0x15, "Setup Done"); 563} 564 565 566/* ToDo: do something useful if ppc_md is not yet setup. */ 567#define PPC64_LINUX_FUNCTION 0x0f000000 568#define PPC64_IPL_MESSAGE 0xc0000000 569#define PPC64_TERM_MESSAGE 0xb0000000 570 571static void ppc64_do_msg(unsigned int src, const char *msg) 572{ 573 if (ppc_md.progress) { 574 char buf[128]; 575 576 sprintf(buf, "%08X\n", src); 577 ppc_md.progress(buf, 0); 578 snprintf(buf, 128, "%s", msg); 579 ppc_md.progress(buf, 0); 580 } 581} 582 583/* Print a boot progress message. */ 584void ppc64_boot_msg(unsigned int src, const char *msg) 585{ 586 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 587 printk("[boot]%04x %s\n", src, msg); 588} 589 590#ifdef CONFIG_SMP 591#define PCPU_DYN_SIZE () 592 593static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) 594{ 595 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, 596 __pa(MAX_DMA_ADDRESS)); 597} 598 599static void __init pcpu_fc_free(void *ptr, size_t size) 600{ 601 free_bootmem(__pa(ptr), size); 602} 603 604static int pcpu_cpu_distance(unsigned int from, unsigned int to) 605{ 606 if (cpu_to_node(from) == cpu_to_node(to)) 607 return LOCAL_DISTANCE; 608 else 609 return REMOTE_DISTANCE; 610} 611 612unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; 613EXPORT_SYMBOL(__per_cpu_offset); 614 615void __init setup_per_cpu_areas(void) 616{ 617 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; 618 size_t atom_size; 619 unsigned long delta; 620 unsigned int cpu; 621 int rc; 622 623 /* 624 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need 625 * to group units. For larger mappings, use 1M atom which 626 * should be large enough to contain a number of units. 627 */ 628 if (mmu_linear_psize == MMU_PAGE_4K) 629 atom_size = PAGE_SIZE; 630 else 631 atom_size = 1 << 20; 632 633 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, 634 pcpu_fc_alloc, pcpu_fc_free); 635 if (rc < 0) 636 panic("cannot initialize percpu area (err=%d)", rc); 637 638 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; 639 for_each_possible_cpu(cpu) { 640 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; 641 paca[cpu].data_offset = __per_cpu_offset[cpu]; 642 } 643} 644#endif 645 646 647#ifdef CONFIG_PPC_INDIRECT_IO 648struct ppc_pci_io ppc_pci_io; 649EXPORT_SYMBOL(ppc_pci_io); 650#endif /* CONFIG_PPC_INDIRECT_IO */ 651 652