setup_64.c revision 476792839467c08ddeedd8b44a7423d415b68259
1/* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#undef DEBUG 14 15#include <linux/module.h> 16#include <linux/string.h> 17#include <linux/sched.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/reboot.h> 21#include <linux/delay.h> 22#include <linux/initrd.h> 23#include <linux/ide.h> 24#include <linux/seq_file.h> 25#include <linux/ioport.h> 26#include <linux/console.h> 27#include <linux/utsname.h> 28#include <linux/tty.h> 29#include <linux/root_dev.h> 30#include <linux/notifier.h> 31#include <linux/cpu.h> 32#include <linux/unistd.h> 33#include <linux/serial.h> 34#include <linux/serial_8250.h> 35#include <linux/bootmem.h> 36#include <asm/io.h> 37#include <asm/kdump.h> 38#include <asm/prom.h> 39#include <asm/processor.h> 40#include <asm/pgtable.h> 41#include <asm/smp.h> 42#include <asm/elf.h> 43#include <asm/machdep.h> 44#include <asm/paca.h> 45#include <asm/time.h> 46#include <asm/cputable.h> 47#include <asm/sections.h> 48#include <asm/btext.h> 49#include <asm/nvram.h> 50#include <asm/setup.h> 51#include <asm/system.h> 52#include <asm/rtas.h> 53#include <asm/iommu.h> 54#include <asm/serial.h> 55#include <asm/cache.h> 56#include <asm/page.h> 57#include <asm/mmu.h> 58#include <asm/lmb.h> 59#include <asm/firmware.h> 60#include <asm/xmon.h> 61#include <asm/udbg.h> 62#include <asm/kexec.h> 63 64#include "setup.h" 65 66#ifdef DEBUG 67#define DBG(fmt...) udbg_printf(fmt) 68#else 69#define DBG(fmt...) 70#endif 71 72int have_of = 1; 73int boot_cpuid = 0; 74dev_t boot_dev; 75u64 ppc64_pft_size; 76 77/* Pick defaults since we might want to patch instructions 78 * before we've read this from the device tree. 79 */ 80struct ppc64_caches ppc64_caches = { 81 .dline_size = 0x40, 82 .log_dline_size = 6, 83 .iline_size = 0x40, 84 .log_iline_size = 6 85}; 86EXPORT_SYMBOL_GPL(ppc64_caches); 87 88/* 89 * These are used in binfmt_elf.c to put aux entries on the stack 90 * for each elf executable being started. 91 */ 92int dcache_bsize; 93int icache_bsize; 94int ucache_bsize; 95 96#ifdef CONFIG_SMP 97 98static int smt_enabled_cmdline; 99 100/* Look for ibm,smt-enabled OF option */ 101static void check_smt_enabled(void) 102{ 103 struct device_node *dn; 104 const char *smt_option; 105 106 /* Allow the command line to overrule the OF option */ 107 if (smt_enabled_cmdline) 108 return; 109 110 dn = of_find_node_by_path("/options"); 111 112 if (dn) { 113 smt_option = get_property(dn, "ibm,smt-enabled", NULL); 114 115 if (smt_option) { 116 if (!strcmp(smt_option, "on")) 117 smt_enabled_at_boot = 1; 118 else if (!strcmp(smt_option, "off")) 119 smt_enabled_at_boot = 0; 120 } 121 } 122} 123 124/* Look for smt-enabled= cmdline option */ 125static int __init early_smt_enabled(char *p) 126{ 127 smt_enabled_cmdline = 1; 128 129 if (!p) 130 return 0; 131 132 if (!strcmp(p, "on") || !strcmp(p, "1")) 133 smt_enabled_at_boot = 1; 134 else if (!strcmp(p, "off") || !strcmp(p, "0")) 135 smt_enabled_at_boot = 0; 136 137 return 0; 138} 139early_param("smt-enabled", early_smt_enabled); 140 141#else 142#define check_smt_enabled() 143#endif /* CONFIG_SMP */ 144 145/* Put the paca pointer into r13 and SPRG3 */ 146void __init setup_paca(int cpu) 147{ 148 local_paca = &paca[cpu]; 149 mtspr(SPRN_SPRG3, local_paca); 150} 151 152/* 153 * Early initialization entry point. This is called by head.S 154 * with MMU translation disabled. We rely on the "feature" of 155 * the CPU that ignores the top 2 bits of the address in real 156 * mode so we can access kernel globals normally provided we 157 * only toy with things in the RMO region. From here, we do 158 * some early parsing of the device-tree to setup out LMB 159 * data structures, and allocate & initialize the hash table 160 * and segment tables so we can start running with translation 161 * enabled. 162 * 163 * It is this function which will call the probe() callback of 164 * the various platform types and copy the matching one to the 165 * global ppc_md structure. Your platform can eventually do 166 * some very early initializations from the probe() routine, but 167 * this is not recommended, be very careful as, for example, the 168 * device-tree is not accessible via normal means at this point. 169 */ 170 171void __init early_setup(unsigned long dt_ptr) 172{ 173 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 174 setup_paca(0); 175 176 /* Enable early debugging if any specified (see udbg.h) */ 177 udbg_early_init(); 178 179 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 180 181 /* 182 * Do early initializations using the flattened device 183 * tree, like retreiving the physical memory map or 184 * calculating/retreiving the hash table size 185 */ 186 early_init_devtree(__va(dt_ptr)); 187 188 /* Now we know the logical id of our boot cpu, setup the paca. */ 189 setup_paca(boot_cpuid); 190 191 /* Fix up paca fields required for the boot cpu */ 192 get_paca()->cpu_start = 1; 193 get_paca()->stab_real = __pa((u64)&initial_stab); 194 get_paca()->stab_addr = (u64)&initial_stab; 195 196 /* Probe the machine type */ 197 probe_machine(); 198 199 setup_kdump_trampoline(); 200 201 DBG("Found, Initializing memory management...\n"); 202 203 /* 204 * Initialize the MMU Hash table and create the linear mapping 205 * of memory. Has to be done before stab/slb initialization as 206 * this is currently where the page size encoding is obtained 207 */ 208 htab_initialize(); 209 210 /* 211 * Initialize stab / SLB management except on iSeries 212 */ 213 if (cpu_has_feature(CPU_FTR_SLB)) 214 slb_initialize(); 215 else if (!firmware_has_feature(FW_FEATURE_ISERIES)) 216 stab_initialize(get_paca()->stab_real); 217 218 DBG(" <- early_setup()\n"); 219} 220 221#ifdef CONFIG_SMP 222void early_setup_secondary(void) 223{ 224 struct paca_struct *lpaca = get_paca(); 225 226 /* Mark enabled in PACA */ 227 lpaca->proc_enabled = 0; 228 229 /* Initialize hash table for that CPU */ 230 htab_initialize_secondary(); 231 232 /* Initialize STAB/SLB. We use a virtual address as it works 233 * in real mode on pSeries and we want a virutal address on 234 * iSeries anyway 235 */ 236 if (cpu_has_feature(CPU_FTR_SLB)) 237 slb_initialize(); 238 else 239 stab_initialize(lpaca->stab_addr); 240} 241 242#endif /* CONFIG_SMP */ 243 244#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 245void smp_release_cpus(void) 246{ 247 extern unsigned long __secondary_hold_spinloop; 248 unsigned long *ptr; 249 250 DBG(" -> smp_release_cpus()\n"); 251 252 /* All secondary cpus are spinning on a common spinloop, release them 253 * all now so they can start to spin on their individual paca 254 * spinloops. For non SMP kernels, the secondary cpus never get out 255 * of the common spinloop. 256 * This is useless but harmless on iSeries, secondaries are already 257 * waiting on their paca spinloops. */ 258 259 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 260 - PHYSICAL_START); 261 *ptr = 1; 262 mb(); 263 264 DBG(" <- smp_release_cpus()\n"); 265} 266#endif /* CONFIG_SMP || CONFIG_KEXEC */ 267 268/* 269 * Initialize some remaining members of the ppc64_caches and systemcfg 270 * structures 271 * (at least until we get rid of them completely). This is mostly some 272 * cache informations about the CPU that will be used by cache flush 273 * routines and/or provided to userland 274 */ 275static void __init initialize_cache_info(void) 276{ 277 struct device_node *np; 278 unsigned long num_cpus = 0; 279 280 DBG(" -> initialize_cache_info()\n"); 281 282 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 283 num_cpus += 1; 284 285 /* We're assuming *all* of the CPUs have the same 286 * d-cache and i-cache sizes... -Peter 287 */ 288 289 if ( num_cpus == 1 ) { 290 const u32 *sizep, *lsizep; 291 u32 size, lsize; 292 const char *dc, *ic; 293 294 /* Then read cache informations */ 295 if (machine_is(powermac)) { 296 dc = "d-cache-block-size"; 297 ic = "i-cache-block-size"; 298 } else { 299 dc = "d-cache-line-size"; 300 ic = "i-cache-line-size"; 301 } 302 303 size = 0; 304 lsize = cur_cpu_spec->dcache_bsize; 305 sizep = get_property(np, "d-cache-size", NULL); 306 if (sizep != NULL) 307 size = *sizep; 308 lsizep = get_property(np, dc, NULL); 309 if (lsizep != NULL) 310 lsize = *lsizep; 311 if (sizep == 0 || lsizep == 0) 312 DBG("Argh, can't find dcache properties ! " 313 "sizep: %p, lsizep: %p\n", sizep, lsizep); 314 315 ppc64_caches.dsize = size; 316 ppc64_caches.dline_size = lsize; 317 ppc64_caches.log_dline_size = __ilog2(lsize); 318 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 319 320 size = 0; 321 lsize = cur_cpu_spec->icache_bsize; 322 sizep = get_property(np, "i-cache-size", NULL); 323 if (sizep != NULL) 324 size = *sizep; 325 lsizep = get_property(np, ic, NULL); 326 if (lsizep != NULL) 327 lsize = *lsizep; 328 if (sizep == 0 || lsizep == 0) 329 DBG("Argh, can't find icache properties ! " 330 "sizep: %p, lsizep: %p\n", sizep, lsizep); 331 332 ppc64_caches.isize = size; 333 ppc64_caches.iline_size = lsize; 334 ppc64_caches.log_iline_size = __ilog2(lsize); 335 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 336 } 337 } 338 339 DBG(" <- initialize_cache_info()\n"); 340} 341 342 343/* 344 * Do some initial setup of the system. The parameters are those which 345 * were passed in from the bootloader. 346 */ 347void __init setup_system(void) 348{ 349 DBG(" -> setup_system()\n"); 350 351 /* 352 * Unflatten the device-tree passed by prom_init or kexec 353 */ 354 unflatten_device_tree(); 355 356 /* 357 * Fill the ppc64_caches & systemcfg structures with informations 358 * retrieved from the device-tree. 359 */ 360 initialize_cache_info(); 361 362 /* 363 * Initialize irq remapping subsystem 364 */ 365 irq_early_init(); 366 367#ifdef CONFIG_PPC_RTAS 368 /* 369 * Initialize RTAS if available 370 */ 371 rtas_initialize(); 372#endif /* CONFIG_PPC_RTAS */ 373 374 /* 375 * Check if we have an initrd provided via the device-tree 376 */ 377 check_for_initrd(); 378 379 /* 380 * Do some platform specific early initializations, that includes 381 * setting up the hash table pointers. It also sets up some interrupt-mapping 382 * related options that will be used by finish_device_tree() 383 */ 384 ppc_md.init_early(); 385 386 /* 387 * We can discover serial ports now since the above did setup the 388 * hash table management for us, thus ioremap works. We do that early 389 * so that further code can be debugged 390 */ 391 find_legacy_serial_ports(); 392 393 /* 394 * Register early console 395 */ 396 register_early_udbg_console(); 397 398 /* 399 * Initialize xmon 400 */ 401 xmon_setup(); 402 403 check_smt_enabled(); 404 smp_setup_cpu_maps(); 405 406#ifdef CONFIG_SMP 407 /* Release secondary cpus out of their spinloops at 0x60 now that 408 * we can map physical -> logical CPU ids 409 */ 410 smp_release_cpus(); 411#endif 412 413 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 414 415 printk("-----------------------------------------------------\n"); 416 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); 417 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); 418 printk("ppc64_caches.dcache_line_size = 0x%x\n", 419 ppc64_caches.dline_size); 420 printk("ppc64_caches.icache_line_size = 0x%x\n", 421 ppc64_caches.iline_size); 422 printk("htab_address = 0x%p\n", htab_address); 423 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 424#if PHYSICAL_START > 0 425 printk("physical_start = 0x%x\n", PHYSICAL_START); 426#endif 427 printk("-----------------------------------------------------\n"); 428 429 DBG(" <- setup_system()\n"); 430} 431 432#ifdef CONFIG_IRQSTACKS 433static void __init irqstack_early_init(void) 434{ 435 unsigned int i; 436 437 /* 438 * interrupt stacks must be under 256MB, we cannot afford to take 439 * SLB misses on them. 440 */ 441 for_each_possible_cpu(i) { 442 softirq_ctx[i] = (struct thread_info *) 443 __va(lmb_alloc_base(THREAD_SIZE, 444 THREAD_SIZE, 0x10000000)); 445 hardirq_ctx[i] = (struct thread_info *) 446 __va(lmb_alloc_base(THREAD_SIZE, 447 THREAD_SIZE, 0x10000000)); 448 } 449} 450#else 451#define irqstack_early_init() 452#endif 453 454/* 455 * Stack space used when we detect a bad kernel stack pointer, and 456 * early in SMP boots before relocation is enabled. 457 */ 458static void __init emergency_stack_init(void) 459{ 460 unsigned long limit; 461 unsigned int i; 462 463 /* 464 * Emergency stacks must be under 256MB, we cannot afford to take 465 * SLB misses on them. The ABI also requires them to be 128-byte 466 * aligned. 467 * 468 * Since we use these as temporary stacks during secondary CPU 469 * bringup, we need to get at them in real mode. This means they 470 * must also be within the RMO region. 471 */ 472 limit = min(0x10000000UL, lmb.rmo_size); 473 474 for_each_possible_cpu(i) 475 paca[i].emergency_sp = 476 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE; 477} 478 479/* 480 * Called into from start_kernel, after lock_kernel has been called. 481 * Initializes bootmem, which is unsed to manage page allocation until 482 * mem_init is called. 483 */ 484void __init setup_arch(char **cmdline_p) 485{ 486 ppc64_boot_msg(0x12, "Setup Arch"); 487 488 *cmdline_p = cmd_line; 489 490 /* 491 * Set cache line size based on type of cpu as a default. 492 * Systems with OF can look in the properties on the cpu node(s) 493 * for a possibly more accurate value. 494 */ 495 dcache_bsize = ppc64_caches.dline_size; 496 icache_bsize = ppc64_caches.iline_size; 497 498 /* reboot on panic */ 499 panic_timeout = 180; 500 501 if (ppc_md.panic) 502 setup_panic(); 503 504 init_mm.start_code = PAGE_OFFSET; 505 init_mm.end_code = (unsigned long) _etext; 506 init_mm.end_data = (unsigned long) _edata; 507 init_mm.brk = klimit; 508 509 irqstack_early_init(); 510 emergency_stack_init(); 511 512 stabs_alloc(); 513 514 /* set up the bootmem stuff with available memory */ 515 do_init_bootmem(); 516 sparse_init(); 517 518#ifdef CONFIG_DUMMY_CONSOLE 519 conswitchp = &dummy_con; 520#endif 521 522 ppc_md.setup_arch(); 523 524 paging_init(); 525 ppc64_boot_msg(0x15, "Setup Done"); 526} 527 528 529/* ToDo: do something useful if ppc_md is not yet setup. */ 530#define PPC64_LINUX_FUNCTION 0x0f000000 531#define PPC64_IPL_MESSAGE 0xc0000000 532#define PPC64_TERM_MESSAGE 0xb0000000 533 534static void ppc64_do_msg(unsigned int src, const char *msg) 535{ 536 if (ppc_md.progress) { 537 char buf[128]; 538 539 sprintf(buf, "%08X\n", src); 540 ppc_md.progress(buf, 0); 541 snprintf(buf, 128, "%s", msg); 542 ppc_md.progress(buf, 0); 543 } 544} 545 546/* Print a boot progress message. */ 547void ppc64_boot_msg(unsigned int src, const char *msg) 548{ 549 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 550 printk("[boot]%04x %s\n", src, msg); 551} 552 553/* Print a termination message (print only -- does not stop the kernel) */ 554void ppc64_terminate_msg(unsigned int src, const char *msg) 555{ 556 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); 557 printk("[terminate]%04x %s\n", src, msg); 558} 559 560void cpu_die(void) 561{ 562 if (ppc_md.cpu_die) 563 ppc_md.cpu_die(); 564} 565 566#ifdef CONFIG_SMP 567void __init setup_per_cpu_areas(void) 568{ 569 int i; 570 unsigned long size; 571 char *ptr; 572 573 /* Copy section for each CPU (we discard the original) */ 574 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES); 575#ifdef CONFIG_MODULES 576 if (size < PERCPU_ENOUGH_ROOM) 577 size = PERCPU_ENOUGH_ROOM; 578#endif 579 580 for_each_possible_cpu(i) { 581 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size); 582 if (!ptr) 583 panic("Cannot allocate cpu data for CPU %d\n", i); 584 585 paca[i].data_offset = ptr - __per_cpu_start; 586 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); 587 } 588} 589#endif 590