setup_64.c revision 4cb3cee03d558fd457cb58f56c80a2a09a66110c 
1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 *      This program is free software; you can redistribute it and/or
8 *      modify it under the terms of the GNU General Public License
9 *      as published by the Free Software Foundation; either version
10 *      2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
15#include <linux/module.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
23#include <linux/ide.h>
24#include <linux/seq_file.h>
25#include <linux/ioport.h>
26#include <linux/console.h>
27#include <linux/utsname.h>
28#include <linux/tty.h>
29#include <linux/root_dev.h>
30#include <linux/notifier.h>
31#include <linux/cpu.h>
32#include <linux/unistd.h>
33#include <linux/serial.h>
34#include <linux/serial_8250.h>
35#include <linux/bootmem.h>
36#include <linux/pci.h>
37#include <asm/io.h>
38#include <asm/kdump.h>
39#include <asm/prom.h>
40#include <asm/processor.h>
41#include <asm/pgtable.h>
42#include <asm/smp.h>
43#include <asm/elf.h>
44#include <asm/machdep.h>
45#include <asm/paca.h>
46#include <asm/time.h>
47#include <asm/cputable.h>
48#include <asm/sections.h>
49#include <asm/btext.h>
50#include <asm/nvram.h>
51#include <asm/setup.h>
52#include <asm/system.h>
53#include <asm/rtas.h>
54#include <asm/iommu.h>
55#include <asm/serial.h>
56#include <asm/cache.h>
57#include <asm/page.h>
58#include <asm/mmu.h>
59#include <asm/lmb.h>
60#include <asm/firmware.h>
61#include <asm/xmon.h>
62#include <asm/udbg.h>
63#include <asm/kexec.h>
64
65#include "setup.h"
66
67#ifdef DEBUG
68#define DBG(fmt...) udbg_printf(fmt)
69#else
70#define DBG(fmt...)
71#endif
72
73int have_of = 1;
74int boot_cpuid = 0;
75u64 ppc64_pft_size;
76
77/* Pick defaults since we might want to patch instructions
78 * before we've read this from the device tree.
79 */
80struct ppc64_caches ppc64_caches = {
81	.dline_size = 0x40,
82	.log_dline_size = 6,
83	.iline_size = 0x40,
84	.log_iline_size = 6
85};
86EXPORT_SYMBOL_GPL(ppc64_caches);
87
88/*
89 * These are used in binfmt_elf.c to put aux entries on the stack
90 * for each elf executable being started.
91 */
92int dcache_bsize;
93int icache_bsize;
94int ucache_bsize;
95
96#ifdef CONFIG_SMP
97
98static int smt_enabled_cmdline;
99
100/* Look for ibm,smt-enabled OF option */
101static void check_smt_enabled(void)
102{
103	struct device_node *dn;
104	const char *smt_option;
105
106	/* Allow the command line to overrule the OF option */
107	if (smt_enabled_cmdline)
108		return;
109
110	dn = of_find_node_by_path("/options");
111
112	if (dn) {
113		smt_option = get_property(dn, "ibm,smt-enabled", NULL);
114
115                if (smt_option) {
116			if (!strcmp(smt_option, "on"))
117				smt_enabled_at_boot = 1;
118			else if (!strcmp(smt_option, "off"))
119				smt_enabled_at_boot = 0;
120                }
121        }
122}
123
124/* Look for smt-enabled= cmdline option */
125static int __init early_smt_enabled(char *p)
126{
127	smt_enabled_cmdline = 1;
128
129	if (!p)
130		return 0;
131
132	if (!strcmp(p, "on") || !strcmp(p, "1"))
133		smt_enabled_at_boot = 1;
134	else if (!strcmp(p, "off") || !strcmp(p, "0"))
135		smt_enabled_at_boot = 0;
136
137	return 0;
138}
139early_param("smt-enabled", early_smt_enabled);
140
141#else
142#define check_smt_enabled()
143#endif /* CONFIG_SMP */
144
145/* Put the paca pointer into r13 and SPRG3 */
146void __init setup_paca(int cpu)
147{
148	local_paca = &paca[cpu];
149	mtspr(SPRN_SPRG3, local_paca);
150}
151
152/*
153 * Early initialization entry point. This is called by head.S
154 * with MMU translation disabled. We rely on the "feature" of
155 * the CPU that ignores the top 2 bits of the address in real
156 * mode so we can access kernel globals normally provided we
157 * only toy with things in the RMO region. From here, we do
158 * some early parsing of the device-tree to setup out LMB
159 * data structures, and allocate & initialize the hash table
160 * and segment tables so we can start running with translation
161 * enabled.
162 *
163 * It is this function which will call the probe() callback of
164 * the various platform types and copy the matching one to the
165 * global ppc_md structure. Your platform can eventually do
166 * some very early initializations from the probe() routine, but
167 * this is not recommended, be very careful as, for example, the
168 * device-tree is not accessible via normal means at this point.
169 */
170
171void __init early_setup(unsigned long dt_ptr)
172{
173	/* Identify CPU type */
174	identify_cpu(0);
175
176	/* Assume we're on cpu 0 for now. Don't write to the paca yet! */
177	setup_paca(0);
178
179	/* Enable early debugging if any specified (see udbg.h) */
180	udbg_early_init();
181
182 	DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
183
184	/*
185	 * Do early initializations using the flattened device
186	 * tree, like retreiving the physical memory map or
187	 * calculating/retreiving the hash table size
188	 */
189	early_init_devtree(__va(dt_ptr));
190
191	/* Now we know the logical id of our boot cpu, setup the paca. */
192	setup_paca(boot_cpuid);
193
194	/* Fix up paca fields required for the boot cpu */
195	get_paca()->cpu_start = 1;
196	get_paca()->stab_real = __pa((u64)&initial_stab);
197	get_paca()->stab_addr = (u64)&initial_stab;
198
199	/* Probe the machine type */
200	probe_machine();
201
202	setup_kdump_trampoline();
203
204	DBG("Found, Initializing memory management...\n");
205
206	/*
207	 * Initialize the MMU Hash table and create the linear mapping
208	 * of memory. Has to be done before stab/slb initialization as
209	 * this is currently where the page size encoding is obtained
210	 */
211	htab_initialize();
212
213	/*
214	 * Initialize stab / SLB management except on iSeries
215	 */
216	if (cpu_has_feature(CPU_FTR_SLB))
217		slb_initialize();
218	else if (!firmware_has_feature(FW_FEATURE_ISERIES))
219		stab_initialize(get_paca()->stab_real);
220
221	DBG(" <- early_setup()\n");
222}
223
224#ifdef CONFIG_SMP
225void early_setup_secondary(void)
226{
227	struct paca_struct *lpaca = get_paca();
228
229	/* Mark interrupts enabled in PACA */
230	lpaca->soft_enabled = 0;
231
232	/* Initialize hash table for that CPU */
233	htab_initialize_secondary();
234
235	/* Initialize STAB/SLB. We use a virtual address as it works
236	 * in real mode on pSeries and we want a virutal address on
237	 * iSeries anyway
238	 */
239	if (cpu_has_feature(CPU_FTR_SLB))
240		slb_initialize();
241	else
242		stab_initialize(lpaca->stab_addr);
243}
244
245#endif /* CONFIG_SMP */
246
247#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
248void smp_release_cpus(void)
249{
250	extern unsigned long __secondary_hold_spinloop;
251	unsigned long *ptr;
252
253	DBG(" -> smp_release_cpus()\n");
254
255	/* All secondary cpus are spinning on a common spinloop, release them
256	 * all now so they can start to spin on their individual paca
257	 * spinloops. For non SMP kernels, the secondary cpus never get out
258	 * of the common spinloop.
259	 * This is useless but harmless on iSeries, secondaries are already
260	 * waiting on their paca spinloops. */
261
262	ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
263			- PHYSICAL_START);
264	*ptr = 1;
265	mb();
266
267	DBG(" <- smp_release_cpus()\n");
268}
269#endif /* CONFIG_SMP || CONFIG_KEXEC */
270
271/*
272 * Initialize some remaining members of the ppc64_caches and systemcfg
273 * structures
274 * (at least until we get rid of them completely). This is mostly some
275 * cache informations about the CPU that will be used by cache flush
276 * routines and/or provided to userland
277 */
278static void __init initialize_cache_info(void)
279{
280	struct device_node *np;
281	unsigned long num_cpus = 0;
282
283	DBG(" -> initialize_cache_info()\n");
284
285	for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
286		num_cpus += 1;
287
288		/* We're assuming *all* of the CPUs have the same
289		 * d-cache and i-cache sizes... -Peter
290		 */
291
292		if ( num_cpus == 1 ) {
293			const u32 *sizep, *lsizep;
294			u32 size, lsize;
295			const char *dc, *ic;
296
297			/* Then read cache informations */
298			if (machine_is(powermac)) {
299				dc = "d-cache-block-size";
300				ic = "i-cache-block-size";
301			} else {
302				dc = "d-cache-line-size";
303				ic = "i-cache-line-size";
304			}
305
306			size = 0;
307			lsize = cur_cpu_spec->dcache_bsize;
308			sizep = get_property(np, "d-cache-size", NULL);
309			if (sizep != NULL)
310				size = *sizep;
311			lsizep = get_property(np, dc, NULL);
312			if (lsizep != NULL)
313				lsize = *lsizep;
314			if (sizep == 0 || lsizep == 0)
315				DBG("Argh, can't find dcache properties ! "
316				    "sizep: %p, lsizep: %p\n", sizep, lsizep);
317
318			ppc64_caches.dsize = size;
319			ppc64_caches.dline_size = lsize;
320			ppc64_caches.log_dline_size = __ilog2(lsize);
321			ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
322
323			size = 0;
324			lsize = cur_cpu_spec->icache_bsize;
325			sizep = get_property(np, "i-cache-size", NULL);
326			if (sizep != NULL)
327				size = *sizep;
328			lsizep = get_property(np, ic, NULL);
329			if (lsizep != NULL)
330				lsize = *lsizep;
331			if (sizep == 0 || lsizep == 0)
332				DBG("Argh, can't find icache properties ! "
333				    "sizep: %p, lsizep: %p\n", sizep, lsizep);
334
335			ppc64_caches.isize = size;
336			ppc64_caches.iline_size = lsize;
337			ppc64_caches.log_iline_size = __ilog2(lsize);
338			ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
339		}
340	}
341
342	DBG(" <- initialize_cache_info()\n");
343}
344
345
346/*
347 * Do some initial setup of the system.  The parameters are those which
348 * were passed in from the bootloader.
349 */
350void __init setup_system(void)
351{
352	DBG(" -> setup_system()\n");
353
354	/* Apply the CPUs-specific and firmware specific fixups to kernel
355	 * text (nop out sections not relevant to this CPU or this firmware)
356	 */
357	do_feature_fixups(cur_cpu_spec->cpu_features,
358			  &__start___ftr_fixup, &__stop___ftr_fixup);
359	do_feature_fixups(powerpc_firmware_features,
360			  &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
361
362	/*
363	 * Unflatten the device-tree passed by prom_init or kexec
364	 */
365	unflatten_device_tree();
366
367	/*
368	 * Fill the ppc64_caches & systemcfg structures with informations
369 	 * retrieved from the device-tree.
370	 */
371	initialize_cache_info();
372
373	/*
374	 * Initialize irq remapping subsystem
375	 */
376	irq_early_init();
377
378#ifdef CONFIG_PPC_RTAS
379	/*
380	 * Initialize RTAS if available
381	 */
382	rtas_initialize();
383#endif /* CONFIG_PPC_RTAS */
384
385	/*
386	 * Check if we have an initrd provided via the device-tree
387	 */
388	check_for_initrd();
389
390	/*
391	 * Do some platform specific early initializations, that includes
392	 * setting up the hash table pointers. It also sets up some interrupt-mapping
393	 * related options that will be used by finish_device_tree()
394	 */
395	if (ppc_md.init_early)
396		ppc_md.init_early();
397
398 	/*
399	 * We can discover serial ports now since the above did setup the
400	 * hash table management for us, thus ioremap works. We do that early
401	 * so that further code can be debugged
402	 */
403	find_legacy_serial_ports();
404
405	/*
406	 * Register early console
407	 */
408	register_early_udbg_console();
409
410	/*
411	 * Initialize xmon
412	 */
413	xmon_setup();
414
415	check_smt_enabled();
416	smp_setup_cpu_maps();
417
418#ifdef CONFIG_SMP
419	/* Release secondary cpus out of their spinloops at 0x60 now that
420	 * we can map physical -> logical CPU ids
421	 */
422	smp_release_cpus();
423#endif
424
425	printk("Starting Linux PPC64 %s\n", init_utsname()->version);
426
427	printk("-----------------------------------------------------\n");
428	printk("ppc64_pft_size                = 0x%lx\n", ppc64_pft_size);
429	printk("physicalMemorySize            = 0x%lx\n", lmb_phys_mem_size());
430	printk("ppc64_caches.dcache_line_size = 0x%x\n",
431	       ppc64_caches.dline_size);
432	printk("ppc64_caches.icache_line_size = 0x%x\n",
433	       ppc64_caches.iline_size);
434	printk("htab_address                  = 0x%p\n", htab_address);
435	printk("htab_hash_mask                = 0x%lx\n", htab_hash_mask);
436#if PHYSICAL_START > 0
437	printk("physical_start                = 0x%x\n", PHYSICAL_START);
438#endif
439	printk("-----------------------------------------------------\n");
440
441	DBG(" <- setup_system()\n");
442}
443
444#ifdef CONFIG_IRQSTACKS
445static void __init irqstack_early_init(void)
446{
447	unsigned int i;
448
449	/*
450	 * interrupt stacks must be under 256MB, we cannot afford to take
451	 * SLB misses on them.
452	 */
453	for_each_possible_cpu(i) {
454		softirq_ctx[i] = (struct thread_info *)
455			__va(lmb_alloc_base(THREAD_SIZE,
456					    THREAD_SIZE, 0x10000000));
457		hardirq_ctx[i] = (struct thread_info *)
458			__va(lmb_alloc_base(THREAD_SIZE,
459					    THREAD_SIZE, 0x10000000));
460	}
461}
462#else
463#define irqstack_early_init()
464#endif
465
466/*
467 * Stack space used when we detect a bad kernel stack pointer, and
468 * early in SMP boots before relocation is enabled.
469 */
470static void __init emergency_stack_init(void)
471{
472	unsigned long limit;
473	unsigned int i;
474
475	/*
476	 * Emergency stacks must be under 256MB, we cannot afford to take
477	 * SLB misses on them. The ABI also requires them to be 128-byte
478	 * aligned.
479	 *
480	 * Since we use these as temporary stacks during secondary CPU
481	 * bringup, we need to get at them in real mode. This means they
482	 * must also be within the RMO region.
483	 */
484	limit = min(0x10000000UL, lmb.rmo_size);
485
486	for_each_possible_cpu(i)
487		paca[i].emergency_sp =
488		__va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
489}
490
491/*
492 * Called into from start_kernel, after lock_kernel has been called.
493 * Initializes bootmem, which is unsed to manage page allocation until
494 * mem_init is called.
495 */
496void __init setup_arch(char **cmdline_p)
497{
498	ppc64_boot_msg(0x12, "Setup Arch");
499
500	*cmdline_p = cmd_line;
501
502	/*
503	 * Set cache line size based on type of cpu as a default.
504	 * Systems with OF can look in the properties on the cpu node(s)
505	 * for a possibly more accurate value.
506	 */
507	dcache_bsize = ppc64_caches.dline_size;
508	icache_bsize = ppc64_caches.iline_size;
509
510	/* reboot on panic */
511	panic_timeout = 180;
512
513	if (ppc_md.panic)
514		setup_panic();
515
516	init_mm.start_code = PAGE_OFFSET;
517	init_mm.end_code = (unsigned long) _etext;
518	init_mm.end_data = (unsigned long) _edata;
519	init_mm.brk = klimit;
520
521	irqstack_early_init();
522	emergency_stack_init();
523
524	stabs_alloc();
525
526	/* set up the bootmem stuff with available memory */
527	do_init_bootmem();
528	sparse_init();
529
530#ifdef CONFIG_DUMMY_CONSOLE
531	conswitchp = &dummy_con;
532#endif
533
534	ppc_md.setup_arch();
535
536	paging_init();
537	ppc64_boot_msg(0x15, "Setup Done");
538}
539
540
541/* ToDo: do something useful if ppc_md is not yet setup. */
542#define PPC64_LINUX_FUNCTION 0x0f000000
543#define PPC64_IPL_MESSAGE 0xc0000000
544#define PPC64_TERM_MESSAGE 0xb0000000
545
546static void ppc64_do_msg(unsigned int src, const char *msg)
547{
548	if (ppc_md.progress) {
549		char buf[128];
550
551		sprintf(buf, "%08X\n", src);
552		ppc_md.progress(buf, 0);
553		snprintf(buf, 128, "%s", msg);
554		ppc_md.progress(buf, 0);
555	}
556}
557
558/* Print a boot progress message. */
559void ppc64_boot_msg(unsigned int src, const char *msg)
560{
561	ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
562	printk("[boot]%04x %s\n", src, msg);
563}
564
565/* Print a termination message (print only -- does not stop the kernel) */
566void ppc64_terminate_msg(unsigned int src, const char *msg)
567{
568	ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
569	printk("[terminate]%04x %s\n", src, msg);
570}
571
572void cpu_die(void)
573{
574	if (ppc_md.cpu_die)
575		ppc_md.cpu_die();
576}
577
578#ifdef CONFIG_SMP
579void __init setup_per_cpu_areas(void)
580{
581	int i;
582	unsigned long size;
583	char *ptr;
584
585	/* Copy section for each CPU (we discard the original) */
586	size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
587#ifdef CONFIG_MODULES
588	if (size < PERCPU_ENOUGH_ROOM)
589		size = PERCPU_ENOUGH_ROOM;
590#endif
591
592	for_each_possible_cpu(i) {
593		ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
594		if (!ptr)
595			panic("Cannot allocate cpu data for CPU %d\n", i);
596
597		paca[i].data_offset = ptr - __per_cpu_start;
598		memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
599	}
600}
601#endif
602
603
604#ifdef CONFIG_PPC_INDIRECT_IO
605struct ppc_pci_io ppc_pci_io;
606EXPORT_SYMBOL(ppc_pci_io);
607#endif /* CONFIG_PPC_INDIRECT_IO */
608
609