setup_64.c revision ae3a197e3d0bfe3f4bf1693723e82dc018c096f3
1/* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#undef DEBUG 14 15#include <linux/export.h> 16#include <linux/string.h> 17#include <linux/sched.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/reboot.h> 21#include <linux/delay.h> 22#include <linux/initrd.h> 23#include <linux/seq_file.h> 24#include <linux/ioport.h> 25#include <linux/console.h> 26#include <linux/utsname.h> 27#include <linux/tty.h> 28#include <linux/root_dev.h> 29#include <linux/notifier.h> 30#include <linux/cpu.h> 31#include <linux/unistd.h> 32#include <linux/serial.h> 33#include <linux/serial_8250.h> 34#include <linux/bootmem.h> 35#include <linux/pci.h> 36#include <linux/lockdep.h> 37#include <linux/memblock.h> 38#include <linux/hugetlb.h> 39 40#include <asm/io.h> 41#include <asm/kdump.h> 42#include <asm/prom.h> 43#include <asm/processor.h> 44#include <asm/pgtable.h> 45#include <asm/smp.h> 46#include <asm/elf.h> 47#include <asm/machdep.h> 48#include <asm/paca.h> 49#include <asm/time.h> 50#include <asm/cputable.h> 51#include <asm/sections.h> 52#include <asm/btext.h> 53#include <asm/nvram.h> 54#include <asm/setup.h> 55#include <asm/rtas.h> 56#include <asm/iommu.h> 57#include <asm/serial.h> 58#include <asm/cache.h> 59#include <asm/page.h> 60#include <asm/mmu.h> 61#include <asm/firmware.h> 62#include <asm/xmon.h> 63#include <asm/udbg.h> 64#include <asm/kexec.h> 65#include <asm/mmu_context.h> 66#include <asm/code-patching.h> 67#include <asm/kvm_ppc.h> 68#include <asm/hugetlb.h> 69 70#include "setup.h" 71 72#ifdef DEBUG 73#define DBG(fmt...) udbg_printf(fmt) 74#else 75#define DBG(fmt...) 76#endif 77 78int boot_cpuid = 0; 79int __initdata spinning_secondaries; 80u64 ppc64_pft_size; 81 82/* Pick defaults since we might want to patch instructions 83 * before we've read this from the device tree. 84 */ 85struct ppc64_caches ppc64_caches = { 86 .dline_size = 0x40, 87 .log_dline_size = 6, 88 .iline_size = 0x40, 89 .log_iline_size = 6 90}; 91EXPORT_SYMBOL_GPL(ppc64_caches); 92 93/* 94 * These are used in binfmt_elf.c to put aux entries on the stack 95 * for each elf executable being started. 96 */ 97int dcache_bsize; 98int icache_bsize; 99int ucache_bsize; 100 101#ifdef CONFIG_SMP 102 103static char *smt_enabled_cmdline; 104 105/* Look for ibm,smt-enabled OF option */ 106static void check_smt_enabled(void) 107{ 108 struct device_node *dn; 109 const char *smt_option; 110 111 /* Default to enabling all threads */ 112 smt_enabled_at_boot = threads_per_core; 113 114 /* Allow the command line to overrule the OF option */ 115 if (smt_enabled_cmdline) { 116 if (!strcmp(smt_enabled_cmdline, "on")) 117 smt_enabled_at_boot = threads_per_core; 118 else if (!strcmp(smt_enabled_cmdline, "off")) 119 smt_enabled_at_boot = 0; 120 else { 121 long smt; 122 int rc; 123 124 rc = strict_strtol(smt_enabled_cmdline, 10, &smt); 125 if (!rc) 126 smt_enabled_at_boot = 127 min(threads_per_core, (int)smt); 128 } 129 } else { 130 dn = of_find_node_by_path("/options"); 131 if (dn) { 132 smt_option = of_get_property(dn, "ibm,smt-enabled", 133 NULL); 134 135 if (smt_option) { 136 if (!strcmp(smt_option, "on")) 137 smt_enabled_at_boot = threads_per_core; 138 else if (!strcmp(smt_option, "off")) 139 smt_enabled_at_boot = 0; 140 } 141 142 of_node_put(dn); 143 } 144 } 145} 146 147/* Look for smt-enabled= cmdline option */ 148static int __init early_smt_enabled(char *p) 149{ 150 smt_enabled_cmdline = p; 151 return 0; 152} 153early_param("smt-enabled", early_smt_enabled); 154 155#else 156#define check_smt_enabled() 157#endif /* CONFIG_SMP */ 158 159/* 160 * Early initialization entry point. This is called by head.S 161 * with MMU translation disabled. We rely on the "feature" of 162 * the CPU that ignores the top 2 bits of the address in real 163 * mode so we can access kernel globals normally provided we 164 * only toy with things in the RMO region. From here, we do 165 * some early parsing of the device-tree to setup out MEMBLOCK 166 * data structures, and allocate & initialize the hash table 167 * and segment tables so we can start running with translation 168 * enabled. 169 * 170 * It is this function which will call the probe() callback of 171 * the various platform types and copy the matching one to the 172 * global ppc_md structure. Your platform can eventually do 173 * some very early initializations from the probe() routine, but 174 * this is not recommended, be very careful as, for example, the 175 * device-tree is not accessible via normal means at this point. 176 */ 177 178void __init early_setup(unsigned long dt_ptr) 179{ 180 /* -------- printk is _NOT_ safe to use here ! ------- */ 181 182 /* Identify CPU type */ 183 identify_cpu(0, mfspr(SPRN_PVR)); 184 185 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 186 initialise_paca(&boot_paca, 0); 187 setup_paca(&boot_paca); 188 189 /* Initialize lockdep early or else spinlocks will blow */ 190 lockdep_init(); 191 192 /* -------- printk is now safe to use ------- */ 193 194 /* Enable early debugging if any specified (see udbg.h) */ 195 udbg_early_init(); 196 197 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 198 199 /* 200 * Do early initialization using the flattened device 201 * tree, such as retrieving the physical memory map or 202 * calculating/retrieving the hash table size. 203 */ 204 early_init_devtree(__va(dt_ptr)); 205 206 /* Now we know the logical id of our boot cpu, setup the paca. */ 207 setup_paca(&paca[boot_cpuid]); 208 209 /* Fix up paca fields required for the boot cpu */ 210 get_paca()->cpu_start = 1; 211 212 /* Probe the machine type */ 213 probe_machine(); 214 215 setup_kdump_trampoline(); 216 217 DBG("Found, Initializing memory management...\n"); 218 219 /* Initialize the hash table or TLB handling */ 220 early_init_mmu(); 221 222 /* 223 * Reserve any gigantic pages requested on the command line. 224 * memblock needs to have been initialized by the time this is 225 * called since this will reserve memory. 226 */ 227 reserve_hugetlb_gpages(); 228 229 DBG(" <- early_setup()\n"); 230} 231 232#ifdef CONFIG_SMP 233void early_setup_secondary(void) 234{ 235 /* Mark interrupts enabled in PACA */ 236 get_paca()->soft_enabled = 0; 237 238 /* Initialize the hash table or TLB handling */ 239 early_init_mmu_secondary(); 240} 241 242#endif /* CONFIG_SMP */ 243 244#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 245void smp_release_cpus(void) 246{ 247 unsigned long *ptr; 248 int i; 249 250 DBG(" -> smp_release_cpus()\n"); 251 252 /* All secondary cpus are spinning on a common spinloop, release them 253 * all now so they can start to spin on their individual paca 254 * spinloops. For non SMP kernels, the secondary cpus never get out 255 * of the common spinloop. 256 */ 257 258 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 259 - PHYSICAL_START); 260 *ptr = __pa(generic_secondary_smp_init); 261 262 /* And wait a bit for them to catch up */ 263 for (i = 0; i < 100000; i++) { 264 mb(); 265 HMT_low(); 266 if (spinning_secondaries == 0) 267 break; 268 udelay(1); 269 } 270 DBG("spinning_secondaries = %d\n", spinning_secondaries); 271 272 DBG(" <- smp_release_cpus()\n"); 273} 274#endif /* CONFIG_SMP || CONFIG_KEXEC */ 275 276/* 277 * Initialize some remaining members of the ppc64_caches and systemcfg 278 * structures 279 * (at least until we get rid of them completely). This is mostly some 280 * cache informations about the CPU that will be used by cache flush 281 * routines and/or provided to userland 282 */ 283static void __init initialize_cache_info(void) 284{ 285 struct device_node *np; 286 unsigned long num_cpus = 0; 287 288 DBG(" -> initialize_cache_info()\n"); 289 290 for_each_node_by_type(np, "cpu") { 291 num_cpus += 1; 292 293 /* 294 * We're assuming *all* of the CPUs have the same 295 * d-cache and i-cache sizes... -Peter 296 */ 297 if (num_cpus == 1) { 298 const u32 *sizep, *lsizep; 299 u32 size, lsize; 300 301 size = 0; 302 lsize = cur_cpu_spec->dcache_bsize; 303 sizep = of_get_property(np, "d-cache-size", NULL); 304 if (sizep != NULL) 305 size = *sizep; 306 lsizep = of_get_property(np, "d-cache-block-size", 307 NULL); 308 /* fallback if block size missing */ 309 if (lsizep == NULL) 310 lsizep = of_get_property(np, 311 "d-cache-line-size", 312 NULL); 313 if (lsizep != NULL) 314 lsize = *lsizep; 315 if (sizep == 0 || lsizep == 0) 316 DBG("Argh, can't find dcache properties ! " 317 "sizep: %p, lsizep: %p\n", sizep, lsizep); 318 319 ppc64_caches.dsize = size; 320 ppc64_caches.dline_size = lsize; 321 ppc64_caches.log_dline_size = __ilog2(lsize); 322 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 323 324 size = 0; 325 lsize = cur_cpu_spec->icache_bsize; 326 sizep = of_get_property(np, "i-cache-size", NULL); 327 if (sizep != NULL) 328 size = *sizep; 329 lsizep = of_get_property(np, "i-cache-block-size", 330 NULL); 331 if (lsizep == NULL) 332 lsizep = of_get_property(np, 333 "i-cache-line-size", 334 NULL); 335 if (lsizep != NULL) 336 lsize = *lsizep; 337 if (sizep == 0 || lsizep == 0) 338 DBG("Argh, can't find icache properties ! " 339 "sizep: %p, lsizep: %p\n", sizep, lsizep); 340 341 ppc64_caches.isize = size; 342 ppc64_caches.iline_size = lsize; 343 ppc64_caches.log_iline_size = __ilog2(lsize); 344 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 345 } 346 } 347 348 DBG(" <- initialize_cache_info()\n"); 349} 350 351 352/* 353 * Do some initial setup of the system. The parameters are those which 354 * were passed in from the bootloader. 355 */ 356void __init setup_system(void) 357{ 358 DBG(" -> setup_system()\n"); 359 360 /* Apply the CPUs-specific and firmware specific fixups to kernel 361 * text (nop out sections not relevant to this CPU or this firmware) 362 */ 363 do_feature_fixups(cur_cpu_spec->cpu_features, 364 &__start___ftr_fixup, &__stop___ftr_fixup); 365 do_feature_fixups(cur_cpu_spec->mmu_features, 366 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); 367 do_feature_fixups(powerpc_firmware_features, 368 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 369 do_lwsync_fixups(cur_cpu_spec->cpu_features, 370 &__start___lwsync_fixup, &__stop___lwsync_fixup); 371 do_final_fixups(); 372 373 /* 374 * Unflatten the device-tree passed by prom_init or kexec 375 */ 376 unflatten_device_tree(); 377 378 /* 379 * Fill the ppc64_caches & systemcfg structures with informations 380 * retrieved from the device-tree. 381 */ 382 initialize_cache_info(); 383 384#ifdef CONFIG_PPC_RTAS 385 /* 386 * Initialize RTAS if available 387 */ 388 rtas_initialize(); 389#endif /* CONFIG_PPC_RTAS */ 390 391 /* 392 * Check if we have an initrd provided via the device-tree 393 */ 394 check_for_initrd(); 395 396 /* 397 * Do some platform specific early initializations, that includes 398 * setting up the hash table pointers. It also sets up some interrupt-mapping 399 * related options that will be used by finish_device_tree() 400 */ 401 if (ppc_md.init_early) 402 ppc_md.init_early(); 403 404 /* 405 * We can discover serial ports now since the above did setup the 406 * hash table management for us, thus ioremap works. We do that early 407 * so that further code can be debugged 408 */ 409 find_legacy_serial_ports(); 410 411 /* 412 * Register early console 413 */ 414 register_early_udbg_console(); 415 416 /* 417 * Initialize xmon 418 */ 419 xmon_setup(); 420 421 smp_setup_cpu_maps(); 422 check_smt_enabled(); 423 424#ifdef CONFIG_SMP 425 /* Release secondary cpus out of their spinloops at 0x60 now that 426 * we can map physical -> logical CPU ids 427 */ 428 smp_release_cpus(); 429#endif 430 431 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 432 433 printk("-----------------------------------------------------\n"); 434 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 435 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size()); 436 if (ppc64_caches.dline_size != 0x80) 437 printk("ppc64_caches.dcache_line_size = 0x%x\n", 438 ppc64_caches.dline_size); 439 if (ppc64_caches.iline_size != 0x80) 440 printk("ppc64_caches.icache_line_size = 0x%x\n", 441 ppc64_caches.iline_size); 442#ifdef CONFIG_PPC_STD_MMU_64 443 if (htab_address) 444 printk("htab_address = 0x%p\n", htab_address); 445 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 446#endif /* CONFIG_PPC_STD_MMU_64 */ 447 if (PHYSICAL_START > 0) 448 printk("physical_start = 0x%llx\n", 449 (unsigned long long)PHYSICAL_START); 450 printk("-----------------------------------------------------\n"); 451 452 DBG(" <- setup_system()\n"); 453} 454 455/* This returns the limit below which memory accesses to the linear 456 * mapping are guarnateed not to cause a TLB or SLB miss. This is 457 * used to allocate interrupt or emergency stacks for which our 458 * exception entry path doesn't deal with being interrupted. 459 */ 460static u64 safe_stack_limit(void) 461{ 462#ifdef CONFIG_PPC_BOOK3E 463 /* Freescale BookE bolts the entire linear mapping */ 464 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) 465 return linear_map_top; 466 /* Other BookE, we assume the first GB is bolted */ 467 return 1ul << 30; 468#else 469 /* BookS, the first segment is bolted */ 470 if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 471 return 1UL << SID_SHIFT_1T; 472 return 1UL << SID_SHIFT; 473#endif 474} 475 476static void __init irqstack_early_init(void) 477{ 478 u64 limit = safe_stack_limit(); 479 unsigned int i; 480 481 /* 482 * Interrupt stacks must be in the first segment since we 483 * cannot afford to take SLB misses on them. 484 */ 485 for_each_possible_cpu(i) { 486 softirq_ctx[i] = (struct thread_info *) 487 __va(memblock_alloc_base(THREAD_SIZE, 488 THREAD_SIZE, limit)); 489 hardirq_ctx[i] = (struct thread_info *) 490 __va(memblock_alloc_base(THREAD_SIZE, 491 THREAD_SIZE, limit)); 492 } 493} 494 495#ifdef CONFIG_PPC_BOOK3E 496static void __init exc_lvl_early_init(void) 497{ 498 extern unsigned int interrupt_base_book3e; 499 extern unsigned int exc_debug_debug_book3e; 500 501 unsigned int i; 502 503 for_each_possible_cpu(i) { 504 critirq_ctx[i] = (struct thread_info *) 505 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 506 dbgirq_ctx[i] = (struct thread_info *) 507 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 508 mcheckirq_ctx[i] = (struct thread_info *) 509 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 510 } 511 512 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 513 patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1, 514 (unsigned long)&exc_debug_debug_book3e, 0); 515} 516#else 517#define exc_lvl_early_init() 518#endif 519 520/* 521 * Stack space used when we detect a bad kernel stack pointer, and 522 * early in SMP boots before relocation is enabled. 523 */ 524static void __init emergency_stack_init(void) 525{ 526 u64 limit; 527 unsigned int i; 528 529 /* 530 * Emergency stacks must be under 256MB, we cannot afford to take 531 * SLB misses on them. The ABI also requires them to be 128-byte 532 * aligned. 533 * 534 * Since we use these as temporary stacks during secondary CPU 535 * bringup, we need to get at them in real mode. This means they 536 * must also be within the RMO region. 537 */ 538 limit = min(safe_stack_limit(), ppc64_rma_size); 539 540 for_each_possible_cpu(i) { 541 unsigned long sp; 542 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); 543 sp += THREAD_SIZE; 544 paca[i].emergency_sp = __va(sp); 545 } 546} 547 548/* 549 * Called into from start_kernel this initializes bootmem, which is used 550 * to manage page allocation until mem_init is called. 551 */ 552void __init setup_arch(char **cmdline_p) 553{ 554 ppc64_boot_msg(0x12, "Setup Arch"); 555 556 *cmdline_p = cmd_line; 557 558 /* 559 * Set cache line size based on type of cpu as a default. 560 * Systems with OF can look in the properties on the cpu node(s) 561 * for a possibly more accurate value. 562 */ 563 dcache_bsize = ppc64_caches.dline_size; 564 icache_bsize = ppc64_caches.iline_size; 565 566 /* reboot on panic */ 567 panic_timeout = 180; 568 569 if (ppc_md.panic) 570 setup_panic(); 571 572 init_mm.start_code = (unsigned long)_stext; 573 init_mm.end_code = (unsigned long) _etext; 574 init_mm.end_data = (unsigned long) _edata; 575 init_mm.brk = klimit; 576 577 irqstack_early_init(); 578 exc_lvl_early_init(); 579 emergency_stack_init(); 580 581#ifdef CONFIG_PPC_STD_MMU_64 582 stabs_alloc(); 583#endif 584 /* set up the bootmem stuff with available memory */ 585 do_init_bootmem(); 586 sparse_init(); 587 588#ifdef CONFIG_DUMMY_CONSOLE 589 conswitchp = &dummy_con; 590#endif 591 592 if (ppc_md.setup_arch) 593 ppc_md.setup_arch(); 594 595 paging_init(); 596 597 /* Initialize the MMU context management stuff */ 598 mmu_context_init(); 599 600 kvm_rma_init(); 601 602 ppc64_boot_msg(0x15, "Setup Done"); 603} 604 605 606/* ToDo: do something useful if ppc_md is not yet setup. */ 607#define PPC64_LINUX_FUNCTION 0x0f000000 608#define PPC64_IPL_MESSAGE 0xc0000000 609#define PPC64_TERM_MESSAGE 0xb0000000 610 611static void ppc64_do_msg(unsigned int src, const char *msg) 612{ 613 if (ppc_md.progress) { 614 char buf[128]; 615 616 sprintf(buf, "%08X\n", src); 617 ppc_md.progress(buf, 0); 618 snprintf(buf, 128, "%s", msg); 619 ppc_md.progress(buf, 0); 620 } 621} 622 623/* Print a boot progress message. */ 624void ppc64_boot_msg(unsigned int src, const char *msg) 625{ 626 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 627 printk("[boot]%04x %s\n", src, msg); 628} 629 630#ifdef CONFIG_SMP 631#define PCPU_DYN_SIZE () 632 633static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) 634{ 635 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, 636 __pa(MAX_DMA_ADDRESS)); 637} 638 639static void __init pcpu_fc_free(void *ptr, size_t size) 640{ 641 free_bootmem(__pa(ptr), size); 642} 643 644static int pcpu_cpu_distance(unsigned int from, unsigned int to) 645{ 646 if (cpu_to_node(from) == cpu_to_node(to)) 647 return LOCAL_DISTANCE; 648 else 649 return REMOTE_DISTANCE; 650} 651 652unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; 653EXPORT_SYMBOL(__per_cpu_offset); 654 655void __init setup_per_cpu_areas(void) 656{ 657 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; 658 size_t atom_size; 659 unsigned long delta; 660 unsigned int cpu; 661 int rc; 662 663 /* 664 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need 665 * to group units. For larger mappings, use 1M atom which 666 * should be large enough to contain a number of units. 667 */ 668 if (mmu_linear_psize == MMU_PAGE_4K) 669 atom_size = PAGE_SIZE; 670 else 671 atom_size = 1 << 20; 672 673 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, 674 pcpu_fc_alloc, pcpu_fc_free); 675 if (rc < 0) 676 panic("cannot initialize percpu area (err=%d)", rc); 677 678 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; 679 for_each_possible_cpu(cpu) { 680 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; 681 paca[cpu].data_offset = __per_cpu_offset[cpu]; 682 } 683} 684#endif 685 686 687#ifdef CONFIG_PPC_INDIRECT_IO 688struct ppc_pci_io ppc_pci_io; 689EXPORT_SYMBOL(ppc_pci_io); 690#endif /* CONFIG_PPC_INDIRECT_IO */ 691 692